forked from OSchip/llvm-project
153 lines
4.1 KiB
YAML
153 lines
4.1 KiB
YAML
# RUN: llc -mtriple=x86_64-unknown-linux-gnu -run-pass x86-fixup-bw-insts %s -o - | FileCheck %s
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--- |
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define void @test1() { ret void }
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define void @test2() { ret void }
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define i16 @test3(i16* readonly %p) {
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; Keep original IR to show how the situation like this might happen
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; due to preceding CG passes.
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;
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; %0 is used in %if.end BB (before tail-duplication), so its
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; corresponding super-register (EAX) is live-in into that BB (%if.end)
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; and also has an implicit-def EAX flag. Make sure that we still change
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; the movw into movzwl because EAX is not live before the load (which
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; can be seen by the fact that implicit EAX flag is missing).
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entry:
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%tobool = icmp eq i16* %p, null
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br i1 %tobool, label %if.end, label %if.then
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if.then: ; preds = %entry
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%0 = load i16, i16* %p, align 2
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br label %if.end
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if.end: ; preds = %if.then, %entry
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%i.0 = phi i16 [ %0, %if.then ], [ 0, %entry ]
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ret i16 %i.0
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}
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define i16 @test4() {
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entry:
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%t1 = zext i1 undef to i16
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%t2 = or i16 undef, %t1
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ret i16 %t2
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}
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define void @test5() {ret void}
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...
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---
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# CHECK-LABEL: name: test1
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name: test1
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alignment: 16
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tracksRegLiveness: true
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liveins:
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- { reg: '$rax' }
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# Verify that "movw ($rax), $ax" is changed to "movzwl ($rax), $rax".
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#
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# For that to happen, the liveness information after the MOV16rm
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# instruction should be used, not before it because $rax is live
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# before the MOV and is killed by it.
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body: |
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bb.0:
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liveins: $rax
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$ax = MOV16rm killed $rax, 1, $noreg, 0, $noreg
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; CHECK: $eax = MOVZX32rm16 killed $rax
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RETQ $ax
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...
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---
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# CHECK-LABEL: name: test2
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name: test2
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alignment: 16
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tracksRegLiveness: true
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liveins:
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- { reg: '$rax' }
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# Imp-use of any super-register means the register is live before the MOV
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body: |
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bb.0:
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liveins: $dl, $rbx, $rcx, $r14
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$cl = MOV8rr killed $dl, implicit killed $rcx, implicit-def $rcx
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; CHECK: $cl = MOV8rr killed $dl, implicit killed $rcx, implicit-def $rcx
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JMP_1 %bb.1
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bb.1:
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liveins: $rcx
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RETQ $cl
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...
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---
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# CHECK-LABEL: name: test3
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name: test3
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alignment: 16
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tracksRegLiveness: true
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liveins:
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- { reg: '$rdi' }
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# After MOV16rm the whole $eax is not *really* live, as can be seen by
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# missing implicit-uses of it in that MOV. Make sure that MOV is
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# transformed into MOVZX.
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# See the comment near the original IR on what preceding decisions can
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# lead to that.
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body: |
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bb.0.entry:
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successors: %bb.1(0x30000000), %bb.2.if.then(0x50000000)
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liveins: $rdi
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TEST64rr $rdi, $rdi, implicit-def $eflags
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JCC_1 %bb.1, 4, implicit $eflags
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bb.2.if.then:
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liveins: $rdi
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$ax = MOV16rm killed $rdi, 1, $noreg, 0, $noreg, implicit-def $eax :: (load 2 from %ir.p)
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; CHECK: $eax = MOVZX32rm16 killed $rdi, 1, $noreg, 0, $noreg, implicit-def $eax :: (load 2 from %ir.p)
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$ax = KILL $ax, implicit killed $eax
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RETQ $ax
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bb.1:
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$eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags
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$ax = KILL $ax, implicit killed $eax
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RETQ $ax
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...
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---
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# CHECK-LABEL: name: test4
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name: test4
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alignment: 16
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tracksRegLiveness: true
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liveins:
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- { reg: '$r9d' }
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# This code copies r10b into r9b and then uses r9w. We would like to promote
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# the copy to a 32-bit copy, but because r9w is used this is not acceptable.
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body: |
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bb.0.entry:
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liveins: $r9d
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$r9b = MOV8rr undef $r10b, implicit-def $r9d, implicit killed $r9d, implicit-def $eflags
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; CHECK: $r9b = MOV8rr undef $r10b, implicit-def $r9d, implicit killed $r9d, implicit-def $eflags
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$ax = OR16rr undef $ax, $r9w, implicit-def $eflags
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RETQ $ax
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...
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---
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# CHECK-LABEL: name: test5
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name: test5
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alignment: 16
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tracksRegLiveness: true
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liveins:
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- { reg: '$ch', reg: '$bl' }
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body: |
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bb.0:
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liveins: $ch, $bl
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$cl = MOV8rr $bl, implicit-def $cx, implicit killed $ch, implicit-def $eflags
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; CHECK: $cl = MOV8rr $bl, implicit-def $cx, implicit killed $ch, implicit-def $eflags
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RETQ $cx
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...
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