Stefan Pintilie 15e6b10ee0 [PowerPC] Code cleanup. Remove instructions that were withdrawn from Power 9. ... The following set of instructions was originally planned to be added for Power 9 and so code was added to support them. However, a decision was made later on to withdraw support for these instructions in the hardware. xscmpnedp xvcmpnesp xvcmpnedp This patch removes support for the instructions that were not added. Differential Revision: https://reviews.llvm.org/D43641 llvm-svn: 325918		2018-02-23 15:55:16 +00:00
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AArch64	[AArch64] Fix spelling of ICH_ELRSR_EL2 system register	2018-02-06 09:39:04 +00:00
AMDGPU	[AMDGPU][MC] Added lds support for MUBUF instructions	2018-02-21 13:13:48 +00:00
ARC	[ARC] Add instruction subset for the ARC backend.	2017-12-02 05:25:17 +00:00
ARM	[ARM] Re-commit r324600 with fixed LLVMBuild.txt	2018-02-08 14:31:22 +00:00
Hexagon	[Hexagon] Remove trailing spaces, NFC	2017-11-22 20:43:00 +00:00
Lanai	[lanai] Add Lanai backend.	2016-03-28 13:09:54 +00:00
Mips	[mips] Define certain instructions in microMIPS32r3	2018-02-08 09:25:17 +00:00
PowerPC	[PowerPC] Code cleanup. Remove instructions that were withdrawn from Power 9.	2018-02-23 15:55:16 +00:00
Sparc	This change adds co-processor condition branching and conditional traps to the Sparc back-end.	2016-03-09 18:20:21 +00:00
SystemZ	[SystemZ] Add support for IBM z14 processor (3/3)	2017-07-17 17:44:20 +00:00
X86	[X86][3DNow!] Add PFRCP reg-reg disassembler test case (PR21168)	2018-02-17 14:58:16 +00:00
XCore	…