forked from OSchip/llvm-project
47 lines
1.2 KiB
MLIR
47 lines
1.2 KiB
MLIR
// RUN: mlir-opt -std-to-spirv %s -o - | FileCheck %s
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// CHECK-LABEL: @fmul_scalar
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func @fmul_scalar(%arg: f32) -> f32 {
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// CHECK: spv.FMul
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%0 = mulf %arg, %arg : f32
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return %0 : f32
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}
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// CHECK-LABEL: @fmul_vector2
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func @fmul_vector2(%arg: vector<2xf32>) -> vector<2xf32> {
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// CHECK: spv.FMul
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%0 = mulf %arg, %arg : vector<2xf32>
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return %0 : vector<2xf32>
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}
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// CHECK-LABEL: @fmul_vector3
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func @fmul_vector3(%arg: vector<3xf32>) -> vector<3xf32> {
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// CHECK: spv.FMul
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%0 = mulf %arg, %arg : vector<3xf32>
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return %0 : vector<3xf32>
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}
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// CHECK-LABEL: @fmul_vector4
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func @fmul_vector4(%arg: vector<4xf32>) -> vector<4xf32> {
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// CHECK: spv.FMul
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%0 = mulf %arg, %arg : vector<4xf32>
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return %0 : vector<4xf32>
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}
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// CHECK-LABEL: @fmul_vector5
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func @fmul_vector5(%arg: vector<5xf32>) -> vector<5xf32> {
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// Vector length of only 2, 3, and 4 is valid for SPIR-V
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// CHECK: mulf
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%0 = mulf %arg, %arg : vector<5xf32>
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return %0 : vector<5xf32>
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}
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// CHECK-LABEL: @fmul_tensor
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func @fmul_tensor(%arg: tensor<4xf32>) -> tensor<4xf32> {
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// For tensors mulf cannot be lowered directly to spv.FMul
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// CHECK: mulf
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%0 = mulf %arg, %arg : tensor<4xf32>
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return %0 : tensor<4xf32>
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}
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