forked from OSchip/llvm-project
45 lines
1.8 KiB
TableGen
45 lines
1.8 KiB
TableGen
//=- AMDGPUCombine.td - Define AMDGPU Combine Rules ----------*- tablegen -*-=//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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include "llvm/Target/GlobalISel/Combine.td"
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// TODO: This really belongs after legalization after scalarization.
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// TODO: GICombineRules should accept subtarget predicates
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def fmin_fmax_legacy_matchdata : GIDefMatchData<"FMinFMaxLegacyInfo">;
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def fcmp_select_to_fmin_fmax_legacy : GICombineRule<
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(defs root:$select, fmin_fmax_legacy_matchdata:$matchinfo),
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(match (wip_match_opcode G_SELECT):$select,
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[{ return matchFMinFMaxLegacy(*${select}, MRI, *MF, ${matchinfo}); }]),
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(apply [{ applySelectFCmpToFMinToFMaxLegacy(*${select}, ${matchinfo}); }])>;
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def uchar_to_float : GICombineRule<
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(defs root:$itofp),
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(match (wip_match_opcode G_UITOFP, G_SITOFP):$itofp,
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[{ return matchUCharToFloat(*${itofp}, MRI, *MF, Helper); }]),
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(apply [{ applyUCharToFloat(*${itofp}); }])>;
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// Combines which should only apply on SI/VI
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def gfx6gfx7_combines : GICombineGroup<[fcmp_select_to_fmin_fmax_legacy]>;
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def AMDGPUPreLegalizerCombinerHelper: GICombinerHelper<
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"AMDGPUGenPreLegalizerCombinerHelper", [all_combines,
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elide_br_by_inverting_cond]> {
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let DisableRuleOption = "amdgpuprelegalizercombiner-disable-rule";
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}
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def AMDGPUPostLegalizerCombinerHelper: GICombinerHelper<
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"AMDGPUGenPostLegalizerCombinerHelper", [all_combines,
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gfx6gfx7_combines, uchar_to_float]> {
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let DisableRuleOption = "amdgpupostlegalizercombiner-disable-rule";
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}
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