forked from OSchip/llvm-project
158 lines
5.8 KiB
C++
158 lines
5.8 KiB
C++
//===------ LeonPasses.cpp - Define passes specific to LEON ---------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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//
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//===----------------------------------------------------------------------===//
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#include "LeonPasses.h"
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#include "llvm/CodeGen/ISDOpcodes.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/IR/DiagnosticInfo.h"
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#include "llvm/IR/LLVMContext.h"
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#include "llvm/Support/raw_ostream.h"
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using namespace llvm;
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LEONMachineFunctionPass::LEONMachineFunctionPass(char &ID)
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: MachineFunctionPass(ID) {}
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//*****************************************************************************
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//**** InsertNOPLoad pass
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//*****************************************************************************
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// This pass fixes the incorrectly working Load instructions that exists for
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// some earlier versions of the LEON processor line. NOP instructions must
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// be inserted after the load instruction to ensure that the Load instruction
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// behaves as expected for these processors.
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//
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// This pass inserts a NOP after any LD or LDF instruction.
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//
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char InsertNOPLoad::ID = 0;
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InsertNOPLoad::InsertNOPLoad() : LEONMachineFunctionPass(ID) {}
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bool InsertNOPLoad::runOnMachineFunction(MachineFunction &MF) {
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Subtarget = &MF.getSubtarget<SparcSubtarget>();
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const TargetInstrInfo &TII = *Subtarget->getInstrInfo();
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DebugLoc DL = DebugLoc();
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bool Modified = false;
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for (auto MFI = MF.begin(), E = MF.end(); MFI != E; ++MFI) {
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MachineBasicBlock &MBB = *MFI;
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for (auto MBBI = MBB.begin(), E = MBB.end(); MBBI != E; ++MBBI) {
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MachineInstr &MI = *MBBI;
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unsigned Opcode = MI.getOpcode();
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if (Opcode >= SP::LDDArr && Opcode <= SP::LDrr) {
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MachineBasicBlock::iterator NMBBI = std::next(MBBI);
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BuildMI(MBB, NMBBI, DL, TII.get(SP::NOP));
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Modified = true;
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}
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}
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}
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return Modified;
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}
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//*****************************************************************************
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//**** DetectRoundChange pass
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//*****************************************************************************
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// To prevent any explicit change of the default rounding mode, this pass
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// detects any call of the fesetround function.
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// A warning is generated to ensure the user knows this has happened.
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//
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// Detects an erratum in UT699 LEON 3 processor
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char DetectRoundChange::ID = 0;
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DetectRoundChange::DetectRoundChange() : LEONMachineFunctionPass(ID) {}
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bool DetectRoundChange::runOnMachineFunction(MachineFunction &MF) {
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Subtarget = &MF.getSubtarget<SparcSubtarget>();
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bool Modified = false;
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for (auto MFI = MF.begin(), E = MF.end(); MFI != E; ++MFI) {
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MachineBasicBlock &MBB = *MFI;
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for (auto MBBI = MBB.begin(), E = MBB.end(); MBBI != E; ++MBBI) {
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MachineInstr &MI = *MBBI;
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unsigned Opcode = MI.getOpcode();
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if (Opcode == SP::CALL && MI.getNumOperands() > 0) {
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MachineOperand &MO = MI.getOperand(0);
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if (MO.isGlobal()) {
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StringRef FuncName = MO.getGlobal()->getName();
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if (FuncName.compare_lower("fesetround") == 0) {
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errs() << "Error: You are using the detectroundchange "
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"option to detect rounding changes that will "
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"cause LEON errata. The only way to fix this "
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"is to remove the call to fesetround from "
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"the source code.\n";
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}
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}
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}
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}
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}
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return Modified;
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}
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//*****************************************************************************
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//**** FixAllFDIVSQRT pass
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//*****************************************************************************
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// This pass fixes the incorrectly working FDIVx and FSQRTx instructions that
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// exist for some earlier versions of the LEON processor line. Five NOP
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// instructions need to be inserted after these instructions to ensure the
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// correct result is placed in the destination registers before they are used.
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//
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// This pass implements two fixes:
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// 1) fixing the FSQRTS and FSQRTD instructions.
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// 2) fixing the FDIVS and FDIVD instructions.
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//
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// FSQRTS and FDIVS are converted to FDIVD and FSQRTD respectively earlier in
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// the pipeline when this option is enabled, so this pass needs only to deal
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// with the changes that still need implementing for the "double" versions
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// of these instructions.
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//
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char FixAllFDIVSQRT::ID = 0;
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FixAllFDIVSQRT::FixAllFDIVSQRT() : LEONMachineFunctionPass(ID) {}
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bool FixAllFDIVSQRT::runOnMachineFunction(MachineFunction &MF) {
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Subtarget = &MF.getSubtarget<SparcSubtarget>();
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const TargetInstrInfo &TII = *Subtarget->getInstrInfo();
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DebugLoc DL = DebugLoc();
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bool Modified = false;
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for (auto MFI = MF.begin(), E = MF.end(); MFI != E; ++MFI) {
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MachineBasicBlock &MBB = *MFI;
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for (auto MBBI = MBB.begin(), E = MBB.end(); MBBI != E; ++MBBI) {
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MachineInstr &MI = *MBBI;
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unsigned Opcode = MI.getOpcode();
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// Note: FDIVS and FSQRTS cannot be generated when this erratum fix is
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// switched on so we don't need to check for them here. They will
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// already have been converted to FSQRTD or FDIVD earlier in the
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// pipeline.
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if (Opcode == SP::FSQRTD || Opcode == SP::FDIVD) {
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for (int InsertedCount = 0; InsertedCount < 5; InsertedCount++)
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BuildMI(MBB, MBBI, DL, TII.get(SP::NOP));
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MachineBasicBlock::iterator NMBBI = std::next(MBBI);
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for (int InsertedCount = 0; InsertedCount < 28; InsertedCount++)
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BuildMI(MBB, NMBBI, DL, TII.get(SP::NOP));
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Modified = true;
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}
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}
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}
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return Modified;
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}
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