llvm-project/llvm/test/CodeGen
Sam Elliott fe4245a4c1 [RISCV] Implement convertSelectOfConstantsToMath
Summary:
The current lowering of `select` on RISC-V uses a branch instruction to load a
register with one or other value. This is inefficient, especially in the case of
small constants that can be computed easily.

By implementing the TargetLowering::convertSelectOfConstantsToMath hook, some of
the simpler cases are covered that let us avoid introducing a branch in these
cases.

Reviewed By: luismarques

Differential Revision: https://reviews.llvm.org/D79260
2020-05-02 15:05:57 +01:00
..
AArch64 [AArch64][SVE] Custom lowering of floating-point reductions 2020-04-30 10:18:40 +00:00
AMDGPU [AMDGPU] Remove unnecessary s_waitcnt between VMEM loads 2020-05-01 10:10:23 +01:00
ARC
ARM [BPI][NFC] Reuse post dominantor tree from analysis manager when available 2020-04-30 11:31:03 +07:00
AVR [AVR] Do not place functions in .progmem.data 2020-04-20 13:56:38 +02:00
BPF BPF: fix a CORE optimization bug 2020-04-20 19:54:51 -07:00
Generic [MachineDebugify] Insert synthetic DBG_VALUE instructions 2020-04-22 17:03:39 -07:00
Hexagon Handle cases for subregisters. 2020-04-30 20:32:33 -05:00
Inputs
Lanai
MIR [AMDGPU] Avoid hard-coded line numbers in error message checks 2020-04-23 21:06:09 +01:00
MSP430
Mips [AsmPrinter] Fix emission of non-standard integer constants for BE targets 2020-04-27 14:57:29 -07:00
NVPTX [llvm] Fix missing FileCheck directive colons 2020-04-06 09:59:08 -06:00
PowerPC [AIX] emit .extern and .weak directive linkage 2020-04-30 09:54:10 -04:00
RISCV [RISCV] Implement convertSelectOfConstantsToMath 2020-05-02 15:05:57 +01:00
SPARC
SystemZ [SystemZ] Fix test case. 2020-04-28 09:43:03 +02:00
Thumb [ARM] Don't shrink STM if it would cause an unknown base register store 2020-04-22 14:50:42 +01:00
Thumb2 [ARM] Always replace FP16 bitcasts with VMOVhr or VMOVrh 2020-04-28 16:12:53 +01:00
VE [VE] Update branch instructions 2020-04-28 09:41:01 +02:00
WebAssembly [WebAssembly] Renumber SIMD opcodes 2020-05-01 17:20:49 -07:00
WinCFGuard
WinEH
X86 [X86] Use more accurate increments for the induction variables in sad.ll. NFC 2020-05-01 18:55:22 -07:00
XCore