forked from OSchip/llvm-project
177 lines
4.3 KiB
C++
177 lines
4.3 KiB
C++
//===- NeonEmitter.h - Generate arm_neon.h for use with clang ---*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This tablegen backend is responsible for emitting arm_neon.h, which includes
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// a declaration and definition of each function specified by the ARM NEON
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// compiler interface. See ARM document DUI0348B.
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//
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//===----------------------------------------------------------------------===//
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#ifndef NEON_EMITTER_H
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#define NEON_EMITTER_H
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#include "Record.h"
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#include "TableGenBackend.h"
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#include "llvm/ADT/DenseMap.h"
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#include "llvm/ADT/StringMap.h"
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enum OpKind {
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OpNone,
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OpAdd,
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OpAddl,
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OpAddw,
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OpSub,
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OpSubl,
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OpSubw,
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OpMul,
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OpMla,
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OpMlal,
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OpMls,
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OpMlsl,
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OpMulN,
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OpMlaN,
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OpMlsN,
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OpMlalN,
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OpMlslN,
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OpMulLane,
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OpMullLane,
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OpMlaLane,
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OpMlsLane,
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OpMlalLane,
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OpMlslLane,
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OpQDMullLane,
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OpQDMlalLane,
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OpQDMlslLane,
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OpQDMulhLane,
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OpQRDMulhLane,
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OpEq,
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OpGe,
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OpLe,
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OpGt,
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OpLt,
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OpNeg,
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OpNot,
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OpAnd,
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OpOr,
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OpXor,
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OpAndNot,
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OpOrNot,
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OpCast,
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OpConcat,
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OpDup,
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OpDupLane,
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OpHi,
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OpLo,
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OpSelect,
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OpRev16,
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OpRev32,
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OpRev64,
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OpReinterpret,
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OpAbdl,
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OpAba,
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OpAbal
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};
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enum ClassKind {
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ClassNone,
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ClassI, // generic integer instruction, e.g., "i8" suffix
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ClassS, // signed/unsigned/poly, e.g., "s8", "u8" or "p8" suffix
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ClassW, // width-specific instruction, e.g., "8" suffix
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ClassB // bitcast arguments with enum argument to specify type
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};
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namespace llvm {
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class NeonEmitter : public TableGenBackend {
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RecordKeeper &Records;
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StringMap<OpKind> OpMap;
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DenseMap<Record*, ClassKind> ClassMap;
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public:
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NeonEmitter(RecordKeeper &R) : Records(R) {
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OpMap["OP_NONE"] = OpNone;
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OpMap["OP_ADD"] = OpAdd;
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OpMap["OP_ADDL"] = OpAddl;
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OpMap["OP_ADDW"] = OpAddw;
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OpMap["OP_SUB"] = OpSub;
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OpMap["OP_SUBL"] = OpSubl;
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OpMap["OP_SUBW"] = OpSubw;
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OpMap["OP_MUL"] = OpMul;
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OpMap["OP_MLA"] = OpMla;
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OpMap["OP_MLAL"] = OpMlal;
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OpMap["OP_MLS"] = OpMls;
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OpMap["OP_MLSL"] = OpMlsl;
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OpMap["OP_MUL_N"] = OpMulN;
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OpMap["OP_MLA_N"] = OpMlaN;
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OpMap["OP_MLS_N"] = OpMlsN;
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OpMap["OP_MLAL_N"] = OpMlalN;
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OpMap["OP_MLSL_N"] = OpMlslN;
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OpMap["OP_MUL_LN"]= OpMulLane;
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OpMap["OP_MULL_LN"] = OpMullLane;
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OpMap["OP_MLA_LN"]= OpMlaLane;
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OpMap["OP_MLS_LN"]= OpMlsLane;
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OpMap["OP_MLAL_LN"] = OpMlalLane;
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OpMap["OP_MLSL_LN"] = OpMlslLane;
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OpMap["OP_QDMULL_LN"] = OpQDMullLane;
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OpMap["OP_QDMLAL_LN"] = OpQDMlalLane;
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OpMap["OP_QDMLSL_LN"] = OpQDMlslLane;
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OpMap["OP_QDMULH_LN"] = OpQDMulhLane;
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OpMap["OP_QRDMULH_LN"] = OpQRDMulhLane;
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OpMap["OP_EQ"] = OpEq;
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OpMap["OP_GE"] = OpGe;
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OpMap["OP_LE"] = OpLe;
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OpMap["OP_GT"] = OpGt;
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OpMap["OP_LT"] = OpLt;
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OpMap["OP_NEG"] = OpNeg;
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OpMap["OP_NOT"] = OpNot;
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OpMap["OP_AND"] = OpAnd;
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OpMap["OP_OR"] = OpOr;
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OpMap["OP_XOR"] = OpXor;
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OpMap["OP_ANDN"] = OpAndNot;
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OpMap["OP_ORN"] = OpOrNot;
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OpMap["OP_CAST"] = OpCast;
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OpMap["OP_CONC"] = OpConcat;
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OpMap["OP_HI"] = OpHi;
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OpMap["OP_LO"] = OpLo;
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OpMap["OP_DUP"] = OpDup;
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OpMap["OP_DUP_LN"] = OpDupLane;
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OpMap["OP_SEL"] = OpSelect;
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OpMap["OP_REV16"] = OpRev16;
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OpMap["OP_REV32"] = OpRev32;
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OpMap["OP_REV64"] = OpRev64;
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OpMap["OP_REINT"] = OpReinterpret;
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OpMap["OP_ABDL"] = OpAbdl;
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OpMap["OP_ABA"] = OpAba;
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OpMap["OP_ABAL"] = OpAbal;
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Record *SI = R.getClass("SInst");
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Record *II = R.getClass("IInst");
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Record *WI = R.getClass("WInst");
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ClassMap[SI] = ClassS;
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ClassMap[II] = ClassI;
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ClassMap[WI] = ClassW;
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}
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// run - Emit arm_neon.h.inc
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void run(raw_ostream &o);
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// runHeader - Emit all the __builtin prototypes used in arm_neon.h
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void runHeader(raw_ostream &o);
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// runTests - Emit tests for all the Neon intrinsics.
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void runTests(raw_ostream &o);
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private:
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void emitIntrinsic(raw_ostream &OS, Record *R);
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};
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} // End llvm namespace
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#endif
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