forked from OSchip/llvm-project
1480 lines
56 KiB
C++
1480 lines
56 KiB
C++
//===- InputSection.cpp ---------------------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "InputSection.h"
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#include "Config.h"
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#include "EhFrame.h"
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#include "InputFiles.h"
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#include "LinkerScript.h"
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#include "OutputSections.h"
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#include "Relocations.h"
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#include "SymbolTable.h"
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#include "Symbols.h"
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#include "SyntheticSections.h"
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#include "Target.h"
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#include "Thunks.h"
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#include "lld/Common/ErrorHandler.h"
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#include "lld/Common/Memory.h"
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#include "llvm/Support/Compiler.h"
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#include "llvm/Support/Compression.h"
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#include "llvm/Support/Endian.h"
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#include "llvm/Support/Threading.h"
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#include "llvm/Support/xxhash.h"
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#include <algorithm>
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#include <mutex>
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#include <set>
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#include <unordered_set>
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#include <vector>
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using namespace llvm;
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using namespace llvm::ELF;
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using namespace llvm::object;
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using namespace llvm::support;
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using namespace llvm::support::endian;
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using namespace llvm::sys;
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using namespace lld;
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using namespace lld::elf;
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SmallVector<InputSectionBase *, 0> elf::inputSections;
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DenseSet<std::pair<const Symbol *, uint64_t>> elf::ppc64noTocRelax;
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// Returns a string to construct an error message.
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std::string lld::toString(const InputSectionBase *sec) {
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return (toString(sec->file) + ":(" + sec->name + ")").str();
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}
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template <class ELFT>
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static ArrayRef<uint8_t> getSectionContents(ObjFile<ELFT> &file,
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const typename ELFT::Shdr &hdr) {
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if (hdr.sh_type == SHT_NOBITS)
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return makeArrayRef<uint8_t>(nullptr, hdr.sh_size);
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return check(file.getObj().getSectionContents(hdr));
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}
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InputSectionBase::InputSectionBase(InputFile *file, uint64_t flags,
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uint32_t type, uint64_t entsize,
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uint32_t link, uint32_t info,
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uint32_t alignment, ArrayRef<uint8_t> data,
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StringRef name, Kind sectionKind)
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: SectionBase(sectionKind, name, flags, entsize, alignment, type, info,
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link),
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file(file), rawData(data) {
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// In order to reduce memory allocation, we assume that mergeable
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// sections are smaller than 4 GiB, which is not an unreasonable
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// assumption as of 2017.
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if (sectionKind == SectionBase::Merge && rawData.size() > UINT32_MAX)
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error(toString(this) + ": section too large");
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// The ELF spec states that a value of 0 means the section has
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// no alignment constraints.
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uint32_t v = std::max<uint32_t>(alignment, 1);
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if (!isPowerOf2_64(v))
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fatal(toString(this) + ": sh_addralign is not a power of 2");
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this->alignment = v;
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// In ELF, each section can be compressed by zlib, and if compressed,
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// section name may be mangled by appending "z" (e.g. ".zdebug_info").
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// If that's the case, demangle section name so that we can handle a
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// section as if it weren't compressed.
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if ((flags & SHF_COMPRESSED) || name.startswith(".zdebug")) {
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if (!zlib::isAvailable())
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error(toString(file) + ": contains a compressed section, " +
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"but zlib is not available");
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switch (config->ekind) {
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case ELF32LEKind:
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parseCompressedHeader<ELF32LE>();
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break;
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case ELF32BEKind:
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parseCompressedHeader<ELF32BE>();
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break;
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case ELF64LEKind:
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parseCompressedHeader<ELF64LE>();
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break;
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case ELF64BEKind:
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parseCompressedHeader<ELF64BE>();
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break;
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default:
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llvm_unreachable("unknown ELFT");
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}
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}
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}
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// Drop SHF_GROUP bit unless we are producing a re-linkable object file.
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// SHF_GROUP is a marker that a section belongs to some comdat group.
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// That flag doesn't make sense in an executable.
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static uint64_t getFlags(uint64_t flags) {
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flags &= ~(uint64_t)SHF_INFO_LINK;
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if (!config->relocatable)
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flags &= ~(uint64_t)SHF_GROUP;
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return flags;
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}
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template <class ELFT>
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InputSectionBase::InputSectionBase(ObjFile<ELFT> &file,
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const typename ELFT::Shdr &hdr,
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StringRef name, Kind sectionKind)
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: InputSectionBase(&file, getFlags(hdr.sh_flags), hdr.sh_type,
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hdr.sh_entsize, hdr.sh_link, hdr.sh_info,
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hdr.sh_addralign, getSectionContents(file, hdr), name,
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sectionKind) {
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// We reject object files having insanely large alignments even though
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// they are allowed by the spec. I think 4GB is a reasonable limitation.
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// We might want to relax this in the future.
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if (hdr.sh_addralign > UINT32_MAX)
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fatal(toString(&file) + ": section sh_addralign is too large");
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}
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size_t InputSectionBase::getSize() const {
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if (auto *s = dyn_cast<SyntheticSection>(this))
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return s->getSize();
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if (uncompressedSize >= 0)
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return uncompressedSize;
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return rawData.size() - bytesDropped;
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}
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void InputSectionBase::uncompress() const {
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size_t size = uncompressedSize;
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char *uncompressedBuf;
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{
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static std::mutex mu;
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std::lock_guard<std::mutex> lock(mu);
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uncompressedBuf = bAlloc.Allocate<char>(size);
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}
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if (Error e = zlib::uncompress(toStringRef(rawData), uncompressedBuf, size))
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fatal(toString(this) +
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": uncompress failed: " + llvm::toString(std::move(e)));
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rawData = makeArrayRef((uint8_t *)uncompressedBuf, size);
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uncompressedSize = -1;
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}
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template <class ELFT> RelsOrRelas<ELFT> InputSectionBase::relsOrRelas() const {
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if (relSecIdx == 0)
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return {};
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RelsOrRelas<ELFT> ret;
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typename ELFT::Shdr shdr =
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cast<ELFFileBase>(file)->getELFShdrs<ELFT>()[relSecIdx];
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if (shdr.sh_type == SHT_REL) {
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ret.rels = makeArrayRef(reinterpret_cast<const typename ELFT::Rel *>(
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file->mb.getBufferStart() + shdr.sh_offset),
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shdr.sh_size / sizeof(typename ELFT::Rel));
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} else {
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assert(shdr.sh_type == SHT_RELA);
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ret.relas = makeArrayRef(reinterpret_cast<const typename ELFT::Rela *>(
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file->mb.getBufferStart() + shdr.sh_offset),
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shdr.sh_size / sizeof(typename ELFT::Rela));
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}
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return ret;
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}
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uint64_t SectionBase::getOffset(uint64_t offset) const {
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switch (kind()) {
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case Output: {
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auto *os = cast<OutputSection>(this);
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// For output sections we treat offset -1 as the end of the section.
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return offset == uint64_t(-1) ? os->size : offset;
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}
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case Regular:
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case Synthetic:
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return cast<InputSection>(this)->outSecOff + offset;
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case EHFrame:
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// The file crtbeginT.o has relocations pointing to the start of an empty
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// .eh_frame that is known to be the first in the link. It does that to
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// identify the start of the output .eh_frame.
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return offset;
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case Merge:
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const MergeInputSection *ms = cast<MergeInputSection>(this);
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if (InputSection *isec = ms->getParent())
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return isec->outSecOff + ms->getParentOffset(offset);
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return ms->getParentOffset(offset);
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}
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llvm_unreachable("invalid section kind");
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}
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uint64_t SectionBase::getVA(uint64_t offset) const {
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const OutputSection *out = getOutputSection();
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return (out ? out->addr : 0) + getOffset(offset);
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}
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OutputSection *SectionBase::getOutputSection() {
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InputSection *sec;
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if (auto *isec = dyn_cast<InputSection>(this))
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sec = isec;
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else if (auto *ms = dyn_cast<MergeInputSection>(this))
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sec = ms->getParent();
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else if (auto *eh = dyn_cast<EhInputSection>(this))
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sec = eh->getParent();
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else
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return cast<OutputSection>(this);
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return sec ? sec->getParent() : nullptr;
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}
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// When a section is compressed, `rawData` consists with a header followed
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// by zlib-compressed data. This function parses a header to initialize
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// `uncompressedSize` member and remove the header from `rawData`.
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template <typename ELFT> void InputSectionBase::parseCompressedHeader() {
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// Old-style header
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if (name.startswith(".zdebug")) {
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if (!toStringRef(rawData).startswith("ZLIB")) {
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error(toString(this) + ": corrupted compressed section header");
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return;
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}
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rawData = rawData.slice(4);
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if (rawData.size() < 8) {
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error(toString(this) + ": corrupted compressed section header");
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return;
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}
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uncompressedSize = read64be(rawData.data());
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rawData = rawData.slice(8);
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// Restore the original section name.
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// (e.g. ".zdebug_info" -> ".debug_info")
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name = saver.save("." + name.substr(2));
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return;
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}
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assert(flags & SHF_COMPRESSED);
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flags &= ~(uint64_t)SHF_COMPRESSED;
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// New-style header
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if (rawData.size() < sizeof(typename ELFT::Chdr)) {
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error(toString(this) + ": corrupted compressed section");
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return;
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}
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auto *hdr = reinterpret_cast<const typename ELFT::Chdr *>(rawData.data());
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if (hdr->ch_type != ELFCOMPRESS_ZLIB) {
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error(toString(this) + ": unsupported compression type");
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return;
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}
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uncompressedSize = hdr->ch_size;
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alignment = std::max<uint32_t>(hdr->ch_addralign, 1);
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rawData = rawData.slice(sizeof(*hdr));
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}
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InputSection *InputSectionBase::getLinkOrderDep() const {
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assert(flags & SHF_LINK_ORDER);
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if (!link)
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return nullptr;
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return cast<InputSection>(file->getSections()[link]);
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}
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// Find a function symbol that encloses a given location.
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Defined *InputSectionBase::getEnclosingFunction(uint64_t offset) {
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for (Symbol *b : file->getSymbols())
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if (Defined *d = dyn_cast<Defined>(b))
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if (d->section == this && d->type == STT_FUNC && d->value <= offset &&
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offset < d->value + d->size)
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return d;
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return nullptr;
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}
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// Returns an object file location string. Used to construct an error message.
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template <class ELFT>
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std::string InputSectionBase::getLocation(uint64_t offset) {
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std::string secAndOffset =
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(name + "+0x" + Twine::utohexstr(offset) + ")").str();
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// We don't have file for synthetic sections.
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if (getFile<ELFT>() == nullptr)
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return (config->outputFile + ":(" + secAndOffset).str();
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std::string file = toString(getFile<ELFT>());
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if (Defined *d = getEnclosingFunction(offset))
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return file + ":(function " + toString(*d) + ": " + secAndOffset;
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return file + ":(" + secAndOffset;
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}
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// This function is intended to be used for constructing an error message.
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// The returned message looks like this:
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//
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// foo.c:42 (/home/alice/possibly/very/long/path/foo.c:42)
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//
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// Returns an empty string if there's no way to get line info.
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std::string InputSectionBase::getSrcMsg(const Symbol &sym, uint64_t offset) {
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return file->getSrcMsg(sym, *this, offset);
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}
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// Returns a filename string along with an optional section name. This
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// function is intended to be used for constructing an error
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// message. The returned message looks like this:
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//
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// path/to/foo.o:(function bar)
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//
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// or
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//
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// path/to/foo.o:(function bar) in archive path/to/bar.a
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std::string InputSectionBase::getObjMsg(uint64_t off) {
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std::string filename = std::string(file->getName());
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std::string archive;
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if (!file->archiveName.empty())
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archive = (" in archive " + file->archiveName).str();
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// Find a symbol that encloses a given location.
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for (Symbol *b : file->getSymbols())
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if (auto *d = dyn_cast<Defined>(b))
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if (d->section == this && d->value <= off && off < d->value + d->size)
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return filename + ":(" + toString(*d) + ")" + archive;
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// If there's no symbol, print out the offset in the section.
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return (filename + ":(" + name + "+0x" + utohexstr(off) + ")" + archive)
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.str();
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}
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InputSection InputSection::discarded(nullptr, 0, 0, 0, ArrayRef<uint8_t>(), "");
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InputSection::InputSection(InputFile *f, uint64_t flags, uint32_t type,
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uint32_t alignment, ArrayRef<uint8_t> data,
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StringRef name, Kind k)
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: InputSectionBase(f, flags, type,
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/*Entsize*/ 0, /*Link*/ 0, /*Info*/ 0, alignment, data,
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name, k) {}
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template <class ELFT>
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InputSection::InputSection(ObjFile<ELFT> &f, const typename ELFT::Shdr &header,
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StringRef name)
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: InputSectionBase(f, header, name, InputSectionBase::Regular) {}
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bool InputSection::classof(const SectionBase *s) {
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return s->kind() == SectionBase::Regular ||
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s->kind() == SectionBase::Synthetic;
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}
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OutputSection *InputSection::getParent() const {
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return cast_or_null<OutputSection>(parent);
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}
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// Copy SHT_GROUP section contents. Used only for the -r option.
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template <class ELFT> void InputSection::copyShtGroup(uint8_t *buf) {
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// ELFT::Word is the 32-bit integral type in the target endianness.
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using u32 = typename ELFT::Word;
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ArrayRef<u32> from = getDataAs<u32>();
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auto *to = reinterpret_cast<u32 *>(buf);
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// The first entry is not a section number but a flag.
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*to++ = from[0];
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// Adjust section numbers because section numbers in an input object files are
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// different in the output. We also need to handle combined or discarded
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// members.
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ArrayRef<InputSectionBase *> sections = file->getSections();
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std::unordered_set<uint32_t> seen;
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for (uint32_t idx : from.slice(1)) {
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OutputSection *osec = sections[idx]->getOutputSection();
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if (osec && seen.insert(osec->sectionIndex).second)
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*to++ = osec->sectionIndex;
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}
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}
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InputSectionBase *InputSection::getRelocatedSection() const {
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if (!file || (type != SHT_RELA && type != SHT_REL))
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return nullptr;
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ArrayRef<InputSectionBase *> sections = file->getSections();
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return sections[info];
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}
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// This is used for -r and --emit-relocs. We can't use memcpy to copy
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// relocations because we need to update symbol table offset and section index
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// for each relocation. So we copy relocations one by one.
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template <class ELFT, class RelTy>
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void InputSection::copyRelocations(uint8_t *buf, ArrayRef<RelTy> rels) {
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const TargetInfo &target = *elf::target;
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InputSectionBase *sec = getRelocatedSection();
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for (const RelTy &rel : rels) {
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RelType type = rel.getType(config->isMips64EL);
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const ObjFile<ELFT> *file = getFile<ELFT>();
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Symbol &sym = file->getRelocTargetSym(rel);
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auto *p = reinterpret_cast<typename ELFT::Rela *>(buf);
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buf += sizeof(RelTy);
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if (RelTy::IsRela)
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p->r_addend = getAddend<ELFT>(rel);
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// Output section VA is zero for -r, so r_offset is an offset within the
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// section, but for --emit-relocs it is a virtual address.
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p->r_offset = sec->getVA(rel.r_offset);
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p->setSymbolAndType(in.symTab->getSymbolIndex(&sym), type,
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config->isMips64EL);
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if (sym.type == STT_SECTION) {
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// We combine multiple section symbols into only one per
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// section. This means we have to update the addend. That is
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// trivial for Elf_Rela, but for Elf_Rel we have to write to the
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// section data. We do that by adding to the Relocation vector.
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// .eh_frame is horribly special and can reference discarded sections. To
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// avoid having to parse and recreate .eh_frame, we just replace any
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// relocation in it pointing to discarded sections with R_*_NONE, which
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// hopefully creates a frame that is ignored at runtime. Also, don't warn
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// on .gcc_except_table and debug sections.
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//
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// See the comment in maybeReportUndefined for PPC32 .got2 and PPC64 .toc
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auto *d = dyn_cast<Defined>(&sym);
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if (!d) {
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if (!isDebugSection(*sec) && sec->name != ".eh_frame" &&
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sec->name != ".gcc_except_table" && sec->name != ".got2" &&
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sec->name != ".toc") {
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uint32_t secIdx = cast<Undefined>(sym).discardedSecIdx;
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Elf_Shdr_Impl<ELFT> sec = file->template getELFShdrs<ELFT>()[secIdx];
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warn("relocation refers to a discarded section: " +
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CHECK(file->getObj().getSectionName(sec), file) +
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"\n>>> referenced by " + getObjMsg(p->r_offset));
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}
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p->setSymbolAndType(0, 0, false);
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continue;
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}
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SectionBase *section = d->section;
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if (!section->isLive()) {
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p->setSymbolAndType(0, 0, false);
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continue;
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}
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int64_t addend = getAddend<ELFT>(rel);
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const uint8_t *bufLoc = sec->data().begin() + rel.r_offset;
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if (!RelTy::IsRela)
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addend = target.getImplicitAddend(bufLoc, type);
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if (config->emachine == EM_MIPS &&
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target.getRelExpr(type, sym, bufLoc) == R_MIPS_GOTREL) {
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// Some MIPS relocations depend on "gp" value. By default,
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// this value has 0x7ff0 offset from a .got section. But
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// relocatable files produced by a compiler or a linker
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// might redefine this default value and we must use it
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// for a calculation of the relocation result. When we
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// generate EXE or DSO it's trivial. Generating a relocatable
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// output is more difficult case because the linker does
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// not calculate relocations in this mode and loses
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// individual "gp" values used by each input object file.
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// As a workaround we add the "gp" value to the relocation
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// addend and save it back to the file.
|
|
addend += sec->getFile<ELFT>()->mipsGp0;
|
|
}
|
|
|
|
if (RelTy::IsRela)
|
|
p->r_addend = sym.getVA(addend) - section->getOutputSection()->addr;
|
|
else if (config->relocatable && type != target.noneRel)
|
|
sec->relocations.push_back({R_ABS, type, rel.r_offset, addend, &sym});
|
|
} else if (config->emachine == EM_PPC && type == R_PPC_PLTREL24 &&
|
|
p->r_addend >= 0x8000 && sec->file->ppc32Got2) {
|
|
// Similar to R_MIPS_GPREL{16,32}. If the addend of R_PPC_PLTREL24
|
|
// indicates that r30 is relative to the input section .got2
|
|
// (r_addend>=0x8000), after linking, r30 should be relative to the output
|
|
// section .got2 . To compensate for the shift, adjust r_addend by
|
|
// ppc32Got->outSecOff.
|
|
p->r_addend += sec->file->ppc32Got2->outSecOff;
|
|
}
|
|
}
|
|
}
|
|
|
|
// The ARM and AArch64 ABI handle pc-relative relocations to undefined weak
|
|
// references specially. The general rule is that the value of the symbol in
|
|
// this context is the address of the place P. A further special case is that
|
|
// branch relocations to an undefined weak reference resolve to the next
|
|
// instruction.
|
|
static uint32_t getARMUndefinedRelativeWeakVA(RelType type, uint32_t a,
|
|
uint32_t p) {
|
|
switch (type) {
|
|
// Unresolved branch relocations to weak references resolve to next
|
|
// instruction, this will be either 2 or 4 bytes on from P.
|
|
case R_ARM_THM_JUMP8:
|
|
case R_ARM_THM_JUMP11:
|
|
return p + 2 + a;
|
|
case R_ARM_CALL:
|
|
case R_ARM_JUMP24:
|
|
case R_ARM_PC24:
|
|
case R_ARM_PLT32:
|
|
case R_ARM_PREL31:
|
|
case R_ARM_THM_JUMP19:
|
|
case R_ARM_THM_JUMP24:
|
|
return p + 4 + a;
|
|
case R_ARM_THM_CALL:
|
|
// We don't want an interworking BLX to ARM
|
|
return p + 5 + a;
|
|
// Unresolved non branch pc-relative relocations
|
|
// R_ARM_TARGET2 which can be resolved relatively is not present as it never
|
|
// targets a weak-reference.
|
|
case R_ARM_MOVW_PREL_NC:
|
|
case R_ARM_MOVT_PREL:
|
|
case R_ARM_REL32:
|
|
case R_ARM_THM_ALU_PREL_11_0:
|
|
case R_ARM_THM_MOVW_PREL_NC:
|
|
case R_ARM_THM_MOVT_PREL:
|
|
case R_ARM_THM_PC12:
|
|
return p + a;
|
|
// p + a is unrepresentable as negative immediates can't be encoded.
|
|
case R_ARM_THM_PC8:
|
|
return p;
|
|
}
|
|
llvm_unreachable("ARM pc-relative relocation expected\n");
|
|
}
|
|
|
|
// The comment above getARMUndefinedRelativeWeakVA applies to this function.
|
|
static uint64_t getAArch64UndefinedRelativeWeakVA(uint64_t type, uint64_t p) {
|
|
switch (type) {
|
|
// Unresolved branch relocations to weak references resolve to next
|
|
// instruction, this is 4 bytes on from P.
|
|
case R_AARCH64_CALL26:
|
|
case R_AARCH64_CONDBR19:
|
|
case R_AARCH64_JUMP26:
|
|
case R_AARCH64_TSTBR14:
|
|
return p + 4;
|
|
// Unresolved non branch pc-relative relocations
|
|
case R_AARCH64_PREL16:
|
|
case R_AARCH64_PREL32:
|
|
case R_AARCH64_PREL64:
|
|
case R_AARCH64_ADR_PREL_LO21:
|
|
case R_AARCH64_LD_PREL_LO19:
|
|
case R_AARCH64_PLT32:
|
|
return p;
|
|
}
|
|
llvm_unreachable("AArch64 pc-relative relocation expected\n");
|
|
}
|
|
|
|
static uint64_t getRISCVUndefinedRelativeWeakVA(uint64_t type, uint64_t p) {
|
|
switch (type) {
|
|
case R_RISCV_BRANCH:
|
|
case R_RISCV_JAL:
|
|
case R_RISCV_CALL:
|
|
case R_RISCV_CALL_PLT:
|
|
case R_RISCV_RVC_BRANCH:
|
|
case R_RISCV_RVC_JUMP:
|
|
return p;
|
|
default:
|
|
return 0;
|
|
}
|
|
}
|
|
|
|
// ARM SBREL relocations are of the form S + A - B where B is the static base
|
|
// The ARM ABI defines base to be "addressing origin of the output segment
|
|
// defining the symbol S". We defined the "addressing origin"/static base to be
|
|
// the base of the PT_LOAD segment containing the Sym.
|
|
// The procedure call standard only defines a Read Write Position Independent
|
|
// RWPI variant so in practice we should expect the static base to be the base
|
|
// of the RW segment.
|
|
static uint64_t getARMStaticBase(const Symbol &sym) {
|
|
OutputSection *os = sym.getOutputSection();
|
|
if (!os || !os->ptLoad || !os->ptLoad->firstSec)
|
|
fatal("SBREL relocation to " + sym.getName() + " without static base");
|
|
return os->ptLoad->firstSec->addr;
|
|
}
|
|
|
|
// For R_RISCV_PC_INDIRECT (R_RISCV_PCREL_LO12_{I,S}), the symbol actually
|
|
// points the corresponding R_RISCV_PCREL_HI20 relocation, and the target VA
|
|
// is calculated using PCREL_HI20's symbol.
|
|
//
|
|
// This function returns the R_RISCV_PCREL_HI20 relocation from
|
|
// R_RISCV_PCREL_LO12's symbol and addend.
|
|
static Relocation *getRISCVPCRelHi20(const Symbol *sym, uint64_t addend) {
|
|
const Defined *d = cast<Defined>(sym);
|
|
if (!d->section) {
|
|
error("R_RISCV_PCREL_LO12 relocation points to an absolute symbol: " +
|
|
sym->getName());
|
|
return nullptr;
|
|
}
|
|
InputSection *isec = cast<InputSection>(d->section);
|
|
|
|
if (addend != 0)
|
|
warn("Non-zero addend in R_RISCV_PCREL_LO12 relocation to " +
|
|
isec->getObjMsg(d->value) + " is ignored");
|
|
|
|
// Relocations are sorted by offset, so we can use std::equal_range to do
|
|
// binary search.
|
|
Relocation r;
|
|
r.offset = d->value;
|
|
auto range =
|
|
std::equal_range(isec->relocations.begin(), isec->relocations.end(), r,
|
|
[](const Relocation &lhs, const Relocation &rhs) {
|
|
return lhs.offset < rhs.offset;
|
|
});
|
|
|
|
for (auto it = range.first; it != range.second; ++it)
|
|
if (it->type == R_RISCV_PCREL_HI20 || it->type == R_RISCV_GOT_HI20 ||
|
|
it->type == R_RISCV_TLS_GD_HI20 || it->type == R_RISCV_TLS_GOT_HI20)
|
|
return &*it;
|
|
|
|
error("R_RISCV_PCREL_LO12 relocation points to " + isec->getObjMsg(d->value) +
|
|
" without an associated R_RISCV_PCREL_HI20 relocation");
|
|
return nullptr;
|
|
}
|
|
|
|
// A TLS symbol's virtual address is relative to the TLS segment. Add a
|
|
// target-specific adjustment to produce a thread-pointer-relative offset.
|
|
static int64_t getTlsTpOffset(const Symbol &s) {
|
|
// On targets that support TLSDESC, _TLS_MODULE_BASE_@tpoff = 0.
|
|
if (&s == ElfSym::tlsModuleBase)
|
|
return 0;
|
|
|
|
// There are 2 TLS layouts. Among targets we support, x86 uses TLS Variant 2
|
|
// while most others use Variant 1. At run time TP will be aligned to p_align.
|
|
|
|
// Variant 1. TP will be followed by an optional gap (which is the size of 2
|
|
// pointers on ARM/AArch64, 0 on other targets), followed by alignment
|
|
// padding, then the static TLS blocks. The alignment padding is added so that
|
|
// (TP + gap + padding) is congruent to p_vaddr modulo p_align.
|
|
//
|
|
// Variant 2. Static TLS blocks, followed by alignment padding are placed
|
|
// before TP. The alignment padding is added so that (TP - padding -
|
|
// p_memsz) is congruent to p_vaddr modulo p_align.
|
|
PhdrEntry *tls = Out::tlsPhdr;
|
|
switch (config->emachine) {
|
|
// Variant 1.
|
|
case EM_ARM:
|
|
case EM_AARCH64:
|
|
return s.getVA(0) + config->wordsize * 2 +
|
|
((tls->p_vaddr - config->wordsize * 2) & (tls->p_align - 1));
|
|
case EM_MIPS:
|
|
case EM_PPC:
|
|
case EM_PPC64:
|
|
// Adjusted Variant 1. TP is placed with a displacement of 0x7000, which is
|
|
// to allow a signed 16-bit offset to reach 0x1000 of TCB/thread-library
|
|
// data and 0xf000 of the program's TLS segment.
|
|
return s.getVA(0) + (tls->p_vaddr & (tls->p_align - 1)) - 0x7000;
|
|
case EM_RISCV:
|
|
return s.getVA(0) + (tls->p_vaddr & (tls->p_align - 1));
|
|
|
|
// Variant 2.
|
|
case EM_HEXAGON:
|
|
case EM_SPARCV9:
|
|
case EM_386:
|
|
case EM_X86_64:
|
|
return s.getVA(0) - tls->p_memsz -
|
|
((-tls->p_vaddr - tls->p_memsz) & (tls->p_align - 1));
|
|
default:
|
|
llvm_unreachable("unhandled Config->EMachine");
|
|
}
|
|
}
|
|
|
|
uint64_t InputSectionBase::getRelocTargetVA(const InputFile *file, RelType type,
|
|
int64_t a, uint64_t p,
|
|
const Symbol &sym, RelExpr expr) {
|
|
switch (expr) {
|
|
case R_ABS:
|
|
case R_DTPREL:
|
|
case R_RELAX_TLS_LD_TO_LE_ABS:
|
|
case R_RELAX_GOT_PC_NOPIC:
|
|
case R_RISCV_ADD:
|
|
return sym.getVA(a);
|
|
case R_ADDEND:
|
|
return a;
|
|
case R_ARM_SBREL:
|
|
return sym.getVA(a) - getARMStaticBase(sym);
|
|
case R_GOT:
|
|
case R_RELAX_TLS_GD_TO_IE_ABS:
|
|
return sym.getGotVA() + a;
|
|
case R_GOTONLY_PC:
|
|
return in.got->getVA() + a - p;
|
|
case R_GOTPLTONLY_PC:
|
|
return in.gotPlt->getVA() + a - p;
|
|
case R_GOTREL:
|
|
case R_PPC64_RELAX_TOC:
|
|
return sym.getVA(a) - in.got->getVA();
|
|
case R_GOTPLTREL:
|
|
return sym.getVA(a) - in.gotPlt->getVA();
|
|
case R_GOTPLT:
|
|
case R_RELAX_TLS_GD_TO_IE_GOTPLT:
|
|
return sym.getGotVA() + a - in.gotPlt->getVA();
|
|
case R_TLSLD_GOT_OFF:
|
|
case R_GOT_OFF:
|
|
case R_RELAX_TLS_GD_TO_IE_GOT_OFF:
|
|
return sym.getGotOffset() + a;
|
|
case R_AARCH64_GOT_PAGE_PC:
|
|
case R_AARCH64_RELAX_TLS_GD_TO_IE_PAGE_PC:
|
|
return getAArch64Page(sym.getGotVA() + a) - getAArch64Page(p);
|
|
case R_AARCH64_GOT_PAGE:
|
|
return sym.getGotVA() + a - getAArch64Page(in.got->getVA());
|
|
case R_GOT_PC:
|
|
case R_RELAX_TLS_GD_TO_IE:
|
|
return sym.getGotVA() + a - p;
|
|
case R_MIPS_GOTREL:
|
|
return sym.getVA(a) - in.mipsGot->getGp(file);
|
|
case R_MIPS_GOT_GP:
|
|
return in.mipsGot->getGp(file) + a;
|
|
case R_MIPS_GOT_GP_PC: {
|
|
// R_MIPS_LO16 expression has R_MIPS_GOT_GP_PC type iif the target
|
|
// is _gp_disp symbol. In that case we should use the following
|
|
// formula for calculation "AHL + GP - P + 4". For details see p. 4-19 at
|
|
// ftp://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf
|
|
// microMIPS variants of these relocations use slightly different
|
|
// expressions: AHL + GP - P + 3 for %lo() and AHL + GP - P - 1 for %hi()
|
|
// to correctly handle less-significant bit of the microMIPS symbol.
|
|
uint64_t v = in.mipsGot->getGp(file) + a - p;
|
|
if (type == R_MIPS_LO16 || type == R_MICROMIPS_LO16)
|
|
v += 4;
|
|
if (type == R_MICROMIPS_LO16 || type == R_MICROMIPS_HI16)
|
|
v -= 1;
|
|
return v;
|
|
}
|
|
case R_MIPS_GOT_LOCAL_PAGE:
|
|
// If relocation against MIPS local symbol requires GOT entry, this entry
|
|
// should be initialized by 'page address'. This address is high 16-bits
|
|
// of sum the symbol's value and the addend.
|
|
return in.mipsGot->getVA() + in.mipsGot->getPageEntryOffset(file, sym, a) -
|
|
in.mipsGot->getGp(file);
|
|
case R_MIPS_GOT_OFF:
|
|
case R_MIPS_GOT_OFF32:
|
|
// In case of MIPS if a GOT relocation has non-zero addend this addend
|
|
// should be applied to the GOT entry content not to the GOT entry offset.
|
|
// That is why we use separate expression type.
|
|
return in.mipsGot->getVA() + in.mipsGot->getSymEntryOffset(file, sym, a) -
|
|
in.mipsGot->getGp(file);
|
|
case R_MIPS_TLSGD:
|
|
return in.mipsGot->getVA() + in.mipsGot->getGlobalDynOffset(file, sym) -
|
|
in.mipsGot->getGp(file);
|
|
case R_MIPS_TLSLD:
|
|
return in.mipsGot->getVA() + in.mipsGot->getTlsIndexOffset(file) -
|
|
in.mipsGot->getGp(file);
|
|
case R_AARCH64_PAGE_PC: {
|
|
uint64_t val = sym.isUndefWeak() ? p + a : sym.getVA(a);
|
|
return getAArch64Page(val) - getAArch64Page(p);
|
|
}
|
|
case R_RISCV_PC_INDIRECT: {
|
|
if (const Relocation *hiRel = getRISCVPCRelHi20(&sym, a))
|
|
return getRelocTargetVA(file, hiRel->type, hiRel->addend, sym.getVA(),
|
|
*hiRel->sym, hiRel->expr);
|
|
return 0;
|
|
}
|
|
case R_PC:
|
|
case R_ARM_PCA: {
|
|
uint64_t dest;
|
|
if (expr == R_ARM_PCA)
|
|
// Some PC relative ARM (Thumb) relocations align down the place.
|
|
p = p & 0xfffffffc;
|
|
if (sym.isUndefWeak()) {
|
|
// On ARM and AArch64 a branch to an undefined weak resolves to the next
|
|
// instruction, otherwise the place. On RISCV, resolve an undefined weak
|
|
// to the same instruction to cause an infinite loop (making the user
|
|
// aware of the issue) while ensuring no overflow.
|
|
if (config->emachine == EM_ARM)
|
|
dest = getARMUndefinedRelativeWeakVA(type, a, p);
|
|
else if (config->emachine == EM_AARCH64)
|
|
dest = getAArch64UndefinedRelativeWeakVA(type, p) + a;
|
|
else if (config->emachine == EM_PPC)
|
|
dest = p;
|
|
else if (config->emachine == EM_RISCV)
|
|
dest = getRISCVUndefinedRelativeWeakVA(type, p) + a;
|
|
else
|
|
dest = sym.getVA(a);
|
|
} else {
|
|
dest = sym.getVA(a);
|
|
}
|
|
return dest - p;
|
|
}
|
|
case R_PLT:
|
|
return sym.getPltVA() + a;
|
|
case R_PLT_PC:
|
|
case R_PPC64_CALL_PLT:
|
|
return sym.getPltVA() + a - p;
|
|
case R_PLT_GOTPLT:
|
|
return sym.getPltVA() + a - in.gotPlt->getVA();
|
|
case R_PPC32_PLTREL:
|
|
// R_PPC_PLTREL24 uses the addend (usually 0 or 0x8000) to indicate r30
|
|
// stores _GLOBAL_OFFSET_TABLE_ or .got2+0x8000. The addend is ignored for
|
|
// target VA computation.
|
|
return sym.getPltVA() - p;
|
|
case R_PPC64_CALL: {
|
|
uint64_t symVA = sym.getVA(a);
|
|
// If we have an undefined weak symbol, we might get here with a symbol
|
|
// address of zero. That could overflow, but the code must be unreachable,
|
|
// so don't bother doing anything at all.
|
|
if (!symVA)
|
|
return 0;
|
|
|
|
// PPC64 V2 ABI describes two entry points to a function. The global entry
|
|
// point is used for calls where the caller and callee (may) have different
|
|
// TOC base pointers and r2 needs to be modified to hold the TOC base for
|
|
// the callee. For local calls the caller and callee share the same
|
|
// TOC base and so the TOC pointer initialization code should be skipped by
|
|
// branching to the local entry point.
|
|
return symVA - p + getPPC64GlobalEntryToLocalEntryOffset(sym.stOther);
|
|
}
|
|
case R_PPC64_TOCBASE:
|
|
return getPPC64TocBase() + a;
|
|
case R_RELAX_GOT_PC:
|
|
case R_PPC64_RELAX_GOT_PC:
|
|
return sym.getVA(a) - p;
|
|
case R_RELAX_TLS_GD_TO_LE:
|
|
case R_RELAX_TLS_IE_TO_LE:
|
|
case R_RELAX_TLS_LD_TO_LE:
|
|
case R_TPREL:
|
|
// It is not very clear what to return if the symbol is undefined. With
|
|
// --noinhibit-exec, even a non-weak undefined reference may reach here.
|
|
// Just return A, which matches R_ABS, and the behavior of some dynamic
|
|
// loaders.
|
|
if (sym.isUndefined())
|
|
return a;
|
|
return getTlsTpOffset(sym) + a;
|
|
case R_RELAX_TLS_GD_TO_LE_NEG:
|
|
case R_TPREL_NEG:
|
|
if (sym.isUndefined())
|
|
return a;
|
|
return -getTlsTpOffset(sym) + a;
|
|
case R_SIZE:
|
|
return sym.getSize() + a;
|
|
case R_TLSDESC:
|
|
return in.got->getGlobalDynAddr(sym) + a;
|
|
case R_TLSDESC_PC:
|
|
return in.got->getGlobalDynAddr(sym) + a - p;
|
|
case R_TLSDESC_GOTPLT:
|
|
return in.got->getGlobalDynAddr(sym) + a - in.gotPlt->getVA();
|
|
case R_AARCH64_TLSDESC_PAGE:
|
|
return getAArch64Page(in.got->getGlobalDynAddr(sym) + a) -
|
|
getAArch64Page(p);
|
|
case R_TLSGD_GOT:
|
|
return in.got->getGlobalDynOffset(sym) + a;
|
|
case R_TLSGD_GOTPLT:
|
|
return in.got->getGlobalDynAddr(sym) + a - in.gotPlt->getVA();
|
|
case R_TLSGD_PC:
|
|
return in.got->getGlobalDynAddr(sym) + a - p;
|
|
case R_TLSLD_GOTPLT:
|
|
return in.got->getVA() + in.got->getTlsIndexOff() + a - in.gotPlt->getVA();
|
|
case R_TLSLD_GOT:
|
|
return in.got->getTlsIndexOff() + a;
|
|
case R_TLSLD_PC:
|
|
return in.got->getTlsIndexVA() + a - p;
|
|
default:
|
|
llvm_unreachable("invalid expression");
|
|
}
|
|
}
|
|
|
|
// This function applies relocations to sections without SHF_ALLOC bit.
|
|
// Such sections are never mapped to memory at runtime. Debug sections are
|
|
// an example. Relocations in non-alloc sections are much easier to
|
|
// handle than in allocated sections because it will never need complex
|
|
// treatment such as GOT or PLT (because at runtime no one refers them).
|
|
// So, we handle relocations for non-alloc sections directly in this
|
|
// function as a performance optimization.
|
|
template <class ELFT, class RelTy>
|
|
void InputSection::relocateNonAlloc(uint8_t *buf, ArrayRef<RelTy> rels) {
|
|
const unsigned bits = sizeof(typename ELFT::uint) * 8;
|
|
const TargetInfo &target = *elf::target;
|
|
const bool isDebug = isDebugSection(*this);
|
|
const bool isDebugLocOrRanges =
|
|
isDebug && (name == ".debug_loc" || name == ".debug_ranges");
|
|
const bool isDebugLine = isDebug && name == ".debug_line";
|
|
Optional<uint64_t> tombstone;
|
|
for (const auto &patAndValue : llvm::reverse(config->deadRelocInNonAlloc))
|
|
if (patAndValue.first.match(this->name)) {
|
|
tombstone = patAndValue.second;
|
|
break;
|
|
}
|
|
|
|
for (const RelTy &rel : rels) {
|
|
RelType type = rel.getType(config->isMips64EL);
|
|
|
|
// GCC 8.0 or earlier have a bug that they emit R_386_GOTPC relocations
|
|
// against _GLOBAL_OFFSET_TABLE_ for .debug_info. The bug has been fixed
|
|
// in 2017 (https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82630), but we
|
|
// need to keep this bug-compatible code for a while.
|
|
if (config->emachine == EM_386 && type == R_386_GOTPC)
|
|
continue;
|
|
|
|
uint64_t offset = rel.r_offset;
|
|
uint8_t *bufLoc = buf + offset;
|
|
int64_t addend = getAddend<ELFT>(rel);
|
|
if (!RelTy::IsRela)
|
|
addend += target.getImplicitAddend(bufLoc, type);
|
|
|
|
Symbol &sym = getFile<ELFT>()->getRelocTargetSym(rel);
|
|
RelExpr expr = target.getRelExpr(type, sym, bufLoc);
|
|
if (expr == R_NONE)
|
|
continue;
|
|
|
|
if (expr == R_SIZE) {
|
|
target.relocateNoSym(bufLoc, type,
|
|
SignExtend64<bits>(sym.getSize() + addend));
|
|
continue;
|
|
}
|
|
|
|
// R_ABS/R_DTPREL and some other relocations can be used from non-SHF_ALLOC
|
|
// sections.
|
|
if (expr != R_ABS && expr != R_DTPREL && expr != R_GOTPLTREL &&
|
|
expr != R_RISCV_ADD) {
|
|
std::string msg = getLocation<ELFT>(offset) +
|
|
": has non-ABS relocation " + toString(type) +
|
|
" against symbol '" + toString(sym) + "'";
|
|
if (expr != R_PC && expr != R_ARM_PCA) {
|
|
error(msg);
|
|
return;
|
|
}
|
|
|
|
// If the control reaches here, we found a PC-relative relocation in a
|
|
// non-ALLOC section. Since non-ALLOC section is not loaded into memory
|
|
// at runtime, the notion of PC-relative doesn't make sense here. So,
|
|
// this is a usage error. However, GNU linkers historically accept such
|
|
// relocations without any errors and relocate them as if they were at
|
|
// address 0. For bug-compatibilty, we accept them with warnings. We
|
|
// know Steel Bank Common Lisp as of 2018 have this bug.
|
|
warn(msg);
|
|
target.relocateNoSym(
|
|
bufLoc, type,
|
|
SignExtend64<bits>(sym.getVA(addend - offset - outSecOff)));
|
|
continue;
|
|
}
|
|
|
|
if (tombstone ||
|
|
(isDebug && (type == target.symbolicRel || expr == R_DTPREL))) {
|
|
// Resolve relocations in .debug_* referencing (discarded symbols or ICF
|
|
// folded section symbols) to a tombstone value. Resolving to addend is
|
|
// unsatisfactory because the result address range may collide with a
|
|
// valid range of low address, or leave multiple CUs claiming ownership of
|
|
// the same range of code, which may confuse consumers.
|
|
//
|
|
// To address the problems, we use -1 as a tombstone value for most
|
|
// .debug_* sections. We have to ignore the addend because we don't want
|
|
// to resolve an address attribute (which may have a non-zero addend) to
|
|
// -1+addend (wrap around to a low address).
|
|
//
|
|
// R_DTPREL type relocations represent an offset into the dynamic thread
|
|
// vector. The computed value is st_value plus a non-negative offset.
|
|
// Negative values are invalid, so -1 can be used as the tombstone value.
|
|
//
|
|
// If the referenced symbol is discarded (made Undefined), or the
|
|
// section defining the referenced symbol is garbage collected,
|
|
// sym.getOutputSection() is nullptr. `ds->folded` catches the ICF folded
|
|
// case. However, resolving a relocation in .debug_line to -1 would stop
|
|
// debugger users from setting breakpoints on the folded-in function, so
|
|
// exclude .debug_line.
|
|
//
|
|
// For pre-DWARF-v5 .debug_loc and .debug_ranges, -1 is a reserved value
|
|
// (base address selection entry), use 1 (which is used by GNU ld for
|
|
// .debug_ranges).
|
|
//
|
|
// TODO To reduce disruption, we use 0 instead of -1 as the tombstone
|
|
// value. Enable -1 in a future release.
|
|
auto *ds = dyn_cast<Defined>(&sym);
|
|
if (!sym.getOutputSection() || (ds && ds->folded && !isDebugLine)) {
|
|
// If -z dead-reloc-in-nonalloc= is specified, respect it.
|
|
const uint64_t value = tombstone ? SignExtend64<bits>(*tombstone)
|
|
: (isDebugLocOrRanges ? 1 : 0);
|
|
target.relocateNoSym(bufLoc, type, value);
|
|
continue;
|
|
}
|
|
}
|
|
target.relocateNoSym(bufLoc, type, SignExtend64<bits>(sym.getVA(addend)));
|
|
}
|
|
}
|
|
|
|
// This is used when '-r' is given.
|
|
// For REL targets, InputSection::copyRelocations() may store artificial
|
|
// relocations aimed to update addends. They are handled in relocateAlloc()
|
|
// for allocatable sections, and this function does the same for
|
|
// non-allocatable sections, such as sections with debug information.
|
|
static void relocateNonAllocForRelocatable(InputSection *sec, uint8_t *buf) {
|
|
const unsigned bits = config->is64 ? 64 : 32;
|
|
|
|
for (const Relocation &rel : sec->relocations) {
|
|
// InputSection::copyRelocations() adds only R_ABS relocations.
|
|
assert(rel.expr == R_ABS);
|
|
uint8_t *bufLoc = buf + rel.offset;
|
|
uint64_t targetVA = SignExtend64(rel.sym->getVA(rel.addend), bits);
|
|
target->relocate(bufLoc, rel, targetVA);
|
|
}
|
|
}
|
|
|
|
template <class ELFT>
|
|
void InputSectionBase::relocate(uint8_t *buf, uint8_t *bufEnd) {
|
|
if ((flags & SHF_EXECINSTR) && LLVM_UNLIKELY(getFile<ELFT>()->splitStack))
|
|
adjustSplitStackFunctionPrologues<ELFT>(buf, bufEnd);
|
|
|
|
if (flags & SHF_ALLOC) {
|
|
relocateAlloc(buf, bufEnd);
|
|
return;
|
|
}
|
|
|
|
auto *sec = cast<InputSection>(this);
|
|
if (config->relocatable) {
|
|
relocateNonAllocForRelocatable(sec, buf);
|
|
} else {
|
|
const RelsOrRelas<ELFT> rels = sec->template relsOrRelas<ELFT>();
|
|
if (rels.areRelocsRel())
|
|
sec->relocateNonAlloc<ELFT>(buf, rels.rels);
|
|
else
|
|
sec->relocateNonAlloc<ELFT>(buf, rels.relas);
|
|
}
|
|
}
|
|
|
|
void InputSectionBase::relocateAlloc(uint8_t *buf, uint8_t *bufEnd) {
|
|
assert(flags & SHF_ALLOC);
|
|
const unsigned bits = config->wordsize * 8;
|
|
const TargetInfo &target = *elf::target;
|
|
uint64_t lastPPCRelaxedRelocOff = UINT64_C(-1);
|
|
|
|
for (const Relocation &rel : relocations) {
|
|
if (rel.expr == R_NONE)
|
|
continue;
|
|
uint64_t offset = rel.offset;
|
|
uint8_t *bufLoc = buf + offset;
|
|
|
|
uint64_t addrLoc = getOutputSection()->addr + offset;
|
|
if (auto *sec = dyn_cast<InputSection>(this))
|
|
addrLoc += sec->outSecOff;
|
|
const uint64_t targetVA =
|
|
SignExtend64(getRelocTargetVA(file, rel.type, rel.addend, addrLoc,
|
|
*rel.sym, rel.expr), bits);
|
|
|
|
switch (rel.expr) {
|
|
case R_RELAX_GOT_PC:
|
|
case R_RELAX_GOT_PC_NOPIC:
|
|
target.relaxGot(bufLoc, rel, targetVA);
|
|
break;
|
|
case R_PPC64_RELAX_GOT_PC: {
|
|
// The R_PPC64_PCREL_OPT relocation must appear immediately after
|
|
// R_PPC64_GOT_PCREL34 in the relocations table at the same offset.
|
|
// We can only relax R_PPC64_PCREL_OPT if we have also relaxed
|
|
// the associated R_PPC64_GOT_PCREL34 since only the latter has an
|
|
// associated symbol. So save the offset when relaxing R_PPC64_GOT_PCREL34
|
|
// and only relax the other if the saved offset matches.
|
|
if (rel.type == R_PPC64_GOT_PCREL34)
|
|
lastPPCRelaxedRelocOff = offset;
|
|
if (rel.type == R_PPC64_PCREL_OPT && offset != lastPPCRelaxedRelocOff)
|
|
break;
|
|
target.relaxGot(bufLoc, rel, targetVA);
|
|
break;
|
|
}
|
|
case R_PPC64_RELAX_TOC:
|
|
// rel.sym refers to the STT_SECTION symbol associated to the .toc input
|
|
// section. If an R_PPC64_TOC16_LO (.toc + addend) references the TOC
|
|
// entry, there may be R_PPC64_TOC16_HA not paired with
|
|
// R_PPC64_TOC16_LO_DS. Don't relax. This loses some relaxation
|
|
// opportunities but is safe.
|
|
if (ppc64noTocRelax.count({rel.sym, rel.addend}) ||
|
|
!tryRelaxPPC64TocIndirection(rel, bufLoc))
|
|
target.relocate(bufLoc, rel, targetVA);
|
|
break;
|
|
case R_RELAX_TLS_IE_TO_LE:
|
|
target.relaxTlsIeToLe(bufLoc, rel, targetVA);
|
|
break;
|
|
case R_RELAX_TLS_LD_TO_LE:
|
|
case R_RELAX_TLS_LD_TO_LE_ABS:
|
|
target.relaxTlsLdToLe(bufLoc, rel, targetVA);
|
|
break;
|
|
case R_RELAX_TLS_GD_TO_LE:
|
|
case R_RELAX_TLS_GD_TO_LE_NEG:
|
|
target.relaxTlsGdToLe(bufLoc, rel, targetVA);
|
|
break;
|
|
case R_AARCH64_RELAX_TLS_GD_TO_IE_PAGE_PC:
|
|
case R_RELAX_TLS_GD_TO_IE:
|
|
case R_RELAX_TLS_GD_TO_IE_ABS:
|
|
case R_RELAX_TLS_GD_TO_IE_GOT_OFF:
|
|
case R_RELAX_TLS_GD_TO_IE_GOTPLT:
|
|
target.relaxTlsGdToIe(bufLoc, rel, targetVA);
|
|
break;
|
|
case R_PPC64_CALL:
|
|
// If this is a call to __tls_get_addr, it may be part of a TLS
|
|
// sequence that has been relaxed and turned into a nop. In this
|
|
// case, we don't want to handle it as a call.
|
|
if (read32(bufLoc) == 0x60000000) // nop
|
|
break;
|
|
|
|
// Patch a nop (0x60000000) to a ld.
|
|
if (rel.sym->needsTocRestore) {
|
|
// gcc/gfortran 5.4, 6.3 and earlier versions do not add nop for
|
|
// recursive calls even if the function is preemptible. This is not
|
|
// wrong in the common case where the function is not preempted at
|
|
// runtime. Just ignore.
|
|
if ((bufLoc + 8 > bufEnd || read32(bufLoc + 4) != 0x60000000) &&
|
|
rel.sym->file != file) {
|
|
// Use substr(6) to remove the "__plt_" prefix.
|
|
errorOrWarn(getErrorLocation(bufLoc) + "call to " +
|
|
lld::toString(*rel.sym).substr(6) +
|
|
" lacks nop, can't restore toc");
|
|
break;
|
|
}
|
|
write32(bufLoc + 4, 0xe8410018); // ld %r2, 24(%r1)
|
|
}
|
|
target.relocate(bufLoc, rel, targetVA);
|
|
break;
|
|
default:
|
|
target.relocate(bufLoc, rel, targetVA);
|
|
break;
|
|
}
|
|
}
|
|
|
|
// Apply jumpInstrMods. jumpInstrMods are created when the opcode of
|
|
// a jmp insn must be modified to shrink the jmp insn or to flip the jmp
|
|
// insn. This is primarily used to relax and optimize jumps created with
|
|
// basic block sections.
|
|
if (jumpInstrMod) {
|
|
target.applyJumpInstrMod(buf + jumpInstrMod->offset, jumpInstrMod->original,
|
|
jumpInstrMod->size);
|
|
}
|
|
}
|
|
|
|
// For each function-defining prologue, find any calls to __morestack,
|
|
// and replace them with calls to __morestack_non_split.
|
|
static void switchMorestackCallsToMorestackNonSplit(
|
|
DenseSet<Defined *> &prologues, std::vector<Relocation *> &morestackCalls) {
|
|
|
|
// If the target adjusted a function's prologue, all calls to
|
|
// __morestack inside that function should be switched to
|
|
// __morestack_non_split.
|
|
Symbol *moreStackNonSplit = symtab->find("__morestack_non_split");
|
|
if (!moreStackNonSplit) {
|
|
error("Mixing split-stack objects requires a definition of "
|
|
"__morestack_non_split");
|
|
return;
|
|
}
|
|
|
|
// Sort both collections to compare addresses efficiently.
|
|
llvm::sort(morestackCalls, [](const Relocation *l, const Relocation *r) {
|
|
return l->offset < r->offset;
|
|
});
|
|
std::vector<Defined *> functions(prologues.begin(), prologues.end());
|
|
llvm::sort(functions, [](const Defined *l, const Defined *r) {
|
|
return l->value < r->value;
|
|
});
|
|
|
|
auto it = morestackCalls.begin();
|
|
for (Defined *f : functions) {
|
|
// Find the first call to __morestack within the function.
|
|
while (it != morestackCalls.end() && (*it)->offset < f->value)
|
|
++it;
|
|
// Adjust all calls inside the function.
|
|
while (it != morestackCalls.end() && (*it)->offset < f->value + f->size) {
|
|
(*it)->sym = moreStackNonSplit;
|
|
++it;
|
|
}
|
|
}
|
|
}
|
|
|
|
static bool enclosingPrologueAttempted(uint64_t offset,
|
|
const DenseSet<Defined *> &prologues) {
|
|
for (Defined *f : prologues)
|
|
if (f->value <= offset && offset < f->value + f->size)
|
|
return true;
|
|
return false;
|
|
}
|
|
|
|
// If a function compiled for split stack calls a function not
|
|
// compiled for split stack, then the caller needs its prologue
|
|
// adjusted to ensure that the called function will have enough stack
|
|
// available. Find those functions, and adjust their prologues.
|
|
template <class ELFT>
|
|
void InputSectionBase::adjustSplitStackFunctionPrologues(uint8_t *buf,
|
|
uint8_t *end) {
|
|
DenseSet<Defined *> prologues;
|
|
std::vector<Relocation *> morestackCalls;
|
|
|
|
for (Relocation &rel : relocations) {
|
|
// Local symbols can't possibly be cross-calls, and should have been
|
|
// resolved long before this line.
|
|
if (rel.sym->isLocal())
|
|
continue;
|
|
|
|
// Ignore calls into the split-stack api.
|
|
if (rel.sym->getName().startswith("__morestack")) {
|
|
if (rel.sym->getName().equals("__morestack"))
|
|
morestackCalls.push_back(&rel);
|
|
continue;
|
|
}
|
|
|
|
// A relocation to non-function isn't relevant. Sometimes
|
|
// __morestack is not marked as a function, so this check comes
|
|
// after the name check.
|
|
if (rel.sym->type != STT_FUNC)
|
|
continue;
|
|
|
|
// If the callee's-file was compiled with split stack, nothing to do. In
|
|
// this context, a "Defined" symbol is one "defined by the binary currently
|
|
// being produced". So an "undefined" symbol might be provided by a shared
|
|
// library. It is not possible to tell how such symbols were compiled, so be
|
|
// conservative.
|
|
if (Defined *d = dyn_cast<Defined>(rel.sym))
|
|
if (InputSection *isec = cast_or_null<InputSection>(d->section))
|
|
if (!isec || !isec->getFile<ELFT>() || isec->getFile<ELFT>()->splitStack)
|
|
continue;
|
|
|
|
if (enclosingPrologueAttempted(rel.offset, prologues))
|
|
continue;
|
|
|
|
if (Defined *f = getEnclosingFunction(rel.offset)) {
|
|
prologues.insert(f);
|
|
if (target->adjustPrologueForCrossSplitStack(buf + f->value, end,
|
|
f->stOther))
|
|
continue;
|
|
if (!getFile<ELFT>()->someNoSplitStack)
|
|
error(lld::toString(this) + ": " + f->getName() +
|
|
" (with -fsplit-stack) calls " + rel.sym->getName() +
|
|
" (without -fsplit-stack), but couldn't adjust its prologue");
|
|
}
|
|
}
|
|
|
|
if (target->needsMoreStackNonSplit)
|
|
switchMorestackCallsToMorestackNonSplit(prologues, morestackCalls);
|
|
}
|
|
|
|
template <class ELFT> void InputSection::writeTo(uint8_t *buf) {
|
|
if (auto *s = dyn_cast<SyntheticSection>(this)) {
|
|
s->writeTo(buf);
|
|
return;
|
|
}
|
|
|
|
if (LLVM_UNLIKELY(type == SHT_NOBITS))
|
|
return;
|
|
// If -r or --emit-relocs is given, then an InputSection
|
|
// may be a relocation section.
|
|
if (LLVM_UNLIKELY(type == SHT_RELA)) {
|
|
copyRelocations<ELFT>(buf, getDataAs<typename ELFT::Rela>());
|
|
return;
|
|
}
|
|
if (LLVM_UNLIKELY(type == SHT_REL)) {
|
|
copyRelocations<ELFT>(buf, getDataAs<typename ELFT::Rel>());
|
|
return;
|
|
}
|
|
|
|
// If -r is given, we may have a SHT_GROUP section.
|
|
if (LLVM_UNLIKELY(type == SHT_GROUP)) {
|
|
copyShtGroup<ELFT>(buf);
|
|
return;
|
|
}
|
|
|
|
// If this is a compressed section, uncompress section contents directly
|
|
// to the buffer.
|
|
if (uncompressedSize >= 0) {
|
|
size_t size = uncompressedSize;
|
|
if (Error e = zlib::uncompress(toStringRef(rawData), (char *)buf, size))
|
|
fatal(toString(this) +
|
|
": uncompress failed: " + llvm::toString(std::move(e)));
|
|
uint8_t *bufEnd = buf + size;
|
|
relocate<ELFT>(buf, bufEnd);
|
|
return;
|
|
}
|
|
|
|
// Copy section contents from source object file to output file
|
|
// and then apply relocations.
|
|
memcpy(buf, data().data(), data().size());
|
|
uint8_t *bufEnd = buf + data().size();
|
|
relocate<ELFT>(buf, bufEnd);
|
|
}
|
|
|
|
void InputSection::replace(InputSection *other) {
|
|
alignment = std::max(alignment, other->alignment);
|
|
|
|
// When a section is replaced with another section that was allocated to
|
|
// another partition, the replacement section (and its associated sections)
|
|
// need to be placed in the main partition so that both partitions will be
|
|
// able to access it.
|
|
if (partition != other->partition) {
|
|
partition = 1;
|
|
for (InputSection *isec : dependentSections)
|
|
isec->partition = 1;
|
|
}
|
|
|
|
other->repl = repl;
|
|
other->markDead();
|
|
}
|
|
|
|
template <class ELFT>
|
|
EhInputSection::EhInputSection(ObjFile<ELFT> &f,
|
|
const typename ELFT::Shdr &header,
|
|
StringRef name)
|
|
: InputSectionBase(f, header, name, InputSectionBase::EHFrame) {}
|
|
|
|
SyntheticSection *EhInputSection::getParent() const {
|
|
return cast_or_null<SyntheticSection>(parent);
|
|
}
|
|
|
|
// Returns the index of the first relocation that points to a region between
|
|
// Begin and Begin+Size.
|
|
template <class IntTy, class RelTy>
|
|
static unsigned getReloc(IntTy begin, IntTy size, const ArrayRef<RelTy> &rels,
|
|
unsigned &relocI) {
|
|
// Start search from RelocI for fast access. That works because the
|
|
// relocations are sorted in .eh_frame.
|
|
for (unsigned n = rels.size(); relocI < n; ++relocI) {
|
|
const RelTy &rel = rels[relocI];
|
|
if (rel.r_offset < begin)
|
|
continue;
|
|
|
|
if (rel.r_offset < begin + size)
|
|
return relocI;
|
|
return -1;
|
|
}
|
|
return -1;
|
|
}
|
|
|
|
// .eh_frame is a sequence of CIE or FDE records.
|
|
// This function splits an input section into records and returns them.
|
|
template <class ELFT> void EhInputSection::split() {
|
|
const RelsOrRelas<ELFT> rels = relsOrRelas<ELFT>();
|
|
if (rels.areRelocsRel())
|
|
split<ELFT>(rels.rels);
|
|
else
|
|
split<ELFT>(rels.relas);
|
|
}
|
|
|
|
template <class ELFT, class RelTy>
|
|
void EhInputSection::split(ArrayRef<RelTy> rels) {
|
|
// getReloc expects the relocations to be sorted by r_offset. See the comment
|
|
// in scanRelocs.
|
|
SmallVector<RelTy, 0> storage;
|
|
rels = sortRels(rels, storage);
|
|
|
|
unsigned relI = 0;
|
|
for (size_t off = 0, end = data().size(); off != end;) {
|
|
size_t size = readEhRecordSize(this, off);
|
|
pieces.emplace_back(off, this, size, getReloc(off, size, rels, relI));
|
|
// The empty record is the end marker.
|
|
if (size == 4)
|
|
break;
|
|
off += size;
|
|
}
|
|
}
|
|
|
|
static size_t findNull(StringRef s, size_t entSize) {
|
|
// Optimize the common case.
|
|
if (entSize == 1)
|
|
return s.find(0);
|
|
|
|
for (unsigned i = 0, n = s.size(); i != n; i += entSize) {
|
|
const char *b = s.begin() + i;
|
|
if (std::all_of(b, b + entSize, [](char c) { return c == 0; }))
|
|
return i;
|
|
}
|
|
return StringRef::npos;
|
|
}
|
|
|
|
SyntheticSection *MergeInputSection::getParent() const {
|
|
return cast_or_null<SyntheticSection>(parent);
|
|
}
|
|
|
|
// Split SHF_STRINGS section. Such section is a sequence of
|
|
// null-terminated strings.
|
|
void MergeInputSection::splitStrings(ArrayRef<uint8_t> data, size_t entSize) {
|
|
size_t off = 0;
|
|
const bool live = !(flags & SHF_ALLOC) || !config->gcSections;
|
|
StringRef s = toStringRef(data);
|
|
|
|
while (!s.empty()) {
|
|
size_t end = findNull(s, entSize);
|
|
if (end == StringRef::npos)
|
|
fatal(toString(this) + ": string is not null terminated");
|
|
size_t size = end + entSize;
|
|
|
|
pieces.emplace_back(off, xxHash64(s.substr(0, size)), live);
|
|
s = s.substr(size);
|
|
off += size;
|
|
}
|
|
}
|
|
|
|
// Split non-SHF_STRINGS section. Such section is a sequence of
|
|
// fixed size records.
|
|
void MergeInputSection::splitNonStrings(ArrayRef<uint8_t> data,
|
|
size_t entSize) {
|
|
size_t size = data.size();
|
|
assert((size % entSize) == 0);
|
|
const bool live = !(flags & SHF_ALLOC) || !config->gcSections;
|
|
|
|
pieces.assign(size / entSize, SectionPiece(0, 0, false));
|
|
for (size_t i = 0, j = 0; i != size; i += entSize, j++)
|
|
pieces[j] = {i, (uint32_t)xxHash64(data.slice(i, entSize)), live};
|
|
}
|
|
|
|
template <class ELFT>
|
|
MergeInputSection::MergeInputSection(ObjFile<ELFT> &f,
|
|
const typename ELFT::Shdr &header,
|
|
StringRef name)
|
|
: InputSectionBase(f, header, name, InputSectionBase::Merge) {}
|
|
|
|
MergeInputSection::MergeInputSection(uint64_t flags, uint32_t type,
|
|
uint64_t entsize, ArrayRef<uint8_t> data,
|
|
StringRef name)
|
|
: InputSectionBase(nullptr, flags, type, entsize, /*Link*/ 0, /*Info*/ 0,
|
|
/*Alignment*/ entsize, data, name, SectionBase::Merge) {}
|
|
|
|
// This function is called after we obtain a complete list of input sections
|
|
// that need to be linked. This is responsible to split section contents
|
|
// into small chunks for further processing.
|
|
//
|
|
// Note that this function is called from parallelForEach. This must be
|
|
// thread-safe (i.e. no memory allocation from the pools).
|
|
void MergeInputSection::splitIntoPieces() {
|
|
assert(pieces.empty());
|
|
|
|
if (flags & SHF_STRINGS)
|
|
splitStrings(data(), entsize);
|
|
else
|
|
splitNonStrings(data(), entsize);
|
|
}
|
|
|
|
SectionPiece *MergeInputSection::getSectionPiece(uint64_t offset) {
|
|
if (this->data().size() <= offset)
|
|
fatal(toString(this) + ": offset is outside the section");
|
|
|
|
// If Offset is not at beginning of a section piece, it is not in the map.
|
|
// In that case we need to do a binary search of the original section piece vector.
|
|
auto it = partition_point(
|
|
pieces, [=](SectionPiece p) { return p.inputOff <= offset; });
|
|
return &it[-1];
|
|
}
|
|
|
|
// Returns the offset in an output section for a given input offset.
|
|
// Because contents of a mergeable section is not contiguous in output,
|
|
// it is not just an addition to a base output offset.
|
|
uint64_t MergeInputSection::getParentOffset(uint64_t offset) const {
|
|
// If Offset is not at beginning of a section piece, it is not in the map.
|
|
// In that case we need to search from the original section piece vector.
|
|
const SectionPiece &piece = *getSectionPiece(offset);
|
|
uint64_t addend = offset - piece.inputOff;
|
|
return piece.outputOff + addend;
|
|
}
|
|
|
|
template InputSection::InputSection(ObjFile<ELF32LE> &, const ELF32LE::Shdr &,
|
|
StringRef);
|
|
template InputSection::InputSection(ObjFile<ELF32BE> &, const ELF32BE::Shdr &,
|
|
StringRef);
|
|
template InputSection::InputSection(ObjFile<ELF64LE> &, const ELF64LE::Shdr &,
|
|
StringRef);
|
|
template InputSection::InputSection(ObjFile<ELF64BE> &, const ELF64BE::Shdr &,
|
|
StringRef);
|
|
|
|
template std::string InputSectionBase::getLocation<ELF32LE>(uint64_t);
|
|
template std::string InputSectionBase::getLocation<ELF32BE>(uint64_t);
|
|
template std::string InputSectionBase::getLocation<ELF64LE>(uint64_t);
|
|
template std::string InputSectionBase::getLocation<ELF64BE>(uint64_t);
|
|
|
|
template void InputSection::writeTo<ELF32LE>(uint8_t *);
|
|
template void InputSection::writeTo<ELF32BE>(uint8_t *);
|
|
template void InputSection::writeTo<ELF64LE>(uint8_t *);
|
|
template void InputSection::writeTo<ELF64BE>(uint8_t *);
|
|
|
|
template RelsOrRelas<ELF32LE> InputSectionBase::relsOrRelas<ELF32LE>() const;
|
|
template RelsOrRelas<ELF32BE> InputSectionBase::relsOrRelas<ELF32BE>() const;
|
|
template RelsOrRelas<ELF64LE> InputSectionBase::relsOrRelas<ELF64LE>() const;
|
|
template RelsOrRelas<ELF64BE> InputSectionBase::relsOrRelas<ELF64BE>() const;
|
|
|
|
template MergeInputSection::MergeInputSection(ObjFile<ELF32LE> &,
|
|
const ELF32LE::Shdr &, StringRef);
|
|
template MergeInputSection::MergeInputSection(ObjFile<ELF32BE> &,
|
|
const ELF32BE::Shdr &, StringRef);
|
|
template MergeInputSection::MergeInputSection(ObjFile<ELF64LE> &,
|
|
const ELF64LE::Shdr &, StringRef);
|
|
template MergeInputSection::MergeInputSection(ObjFile<ELF64BE> &,
|
|
const ELF64BE::Shdr &, StringRef);
|
|
|
|
template EhInputSection::EhInputSection(ObjFile<ELF32LE> &,
|
|
const ELF32LE::Shdr &, StringRef);
|
|
template EhInputSection::EhInputSection(ObjFile<ELF32BE> &,
|
|
const ELF32BE::Shdr &, StringRef);
|
|
template EhInputSection::EhInputSection(ObjFile<ELF64LE> &,
|
|
const ELF64LE::Shdr &, StringRef);
|
|
template EhInputSection::EhInputSection(ObjFile<ELF64BE> &,
|
|
const ELF64BE::Shdr &, StringRef);
|
|
|
|
template void EhInputSection::split<ELF32LE>();
|
|
template void EhInputSection::split<ELF32BE>();
|
|
template void EhInputSection::split<ELF64LE>();
|
|
template void EhInputSection::split<ELF64BE>();
|