forked from OSchip/llvm-project
843 lines
33 KiB
C++
843 lines
33 KiB
C++
//===- InstCombineShifts.cpp ----------------------------------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the visitShl, visitLShr, and visitAShr functions.
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//
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//===----------------------------------------------------------------------===//
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#include "InstCombineInternal.h"
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#include "llvm/Analysis/ConstantFolding.h"
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#include "llvm/Analysis/InstructionSimplify.h"
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#include "llvm/IR/IntrinsicInst.h"
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#include "llvm/IR/PatternMatch.h"
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using namespace llvm;
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using namespace PatternMatch;
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#define DEBUG_TYPE "instcombine"
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Instruction *InstCombiner::commonShiftTransforms(BinaryOperator &I) {
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assert(I.getOperand(1)->getType() == I.getOperand(0)->getType());
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Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1);
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// See if we can fold away this shift.
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if (SimplifyDemandedInstructionBits(I))
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return &I;
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// Try to fold constant and into select arguments.
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if (isa<Constant>(Op0))
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if (SelectInst *SI = dyn_cast<SelectInst>(Op1))
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if (Instruction *R = FoldOpIntoSelect(I, SI))
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return R;
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if (Constant *CUI = dyn_cast<Constant>(Op1))
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if (Instruction *Res = FoldShiftByConstant(Op0, CUI, I))
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return Res;
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// (C1 shift (A add C2)) -> (C1 shift C2) shift A)
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// iff A and C2 are both positive.
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Value *A;
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Constant *C;
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if (match(Op0, m_Constant()) && match(Op1, m_Add(m_Value(A), m_Constant(C))))
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if (isKnownNonNegative(A, DL) && isKnownNonNegative(C, DL))
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return BinaryOperator::Create(
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I.getOpcode(), Builder->CreateBinOp(I.getOpcode(), Op0, C), A);
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// X shift (A srem B) -> X shift (A and B-1) iff B is a power of 2.
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// Because shifts by negative values (which could occur if A were negative)
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// are undefined.
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const APInt *B;
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if (Op1->hasOneUse() && match(Op1, m_SRem(m_Value(A), m_Power2(B)))) {
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// FIXME: Should this get moved into SimplifyDemandedBits by saying we don't
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// demand the sign bit (and many others) here??
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Value *Rem = Builder->CreateAnd(A, ConstantInt::get(I.getType(), *B-1),
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Op1->getName());
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I.setOperand(1, Rem);
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return &I;
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}
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return nullptr;
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}
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/// Return true if we can simplify two logical (either left or right) shifts
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/// that have constant shift amounts.
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static bool canEvaluateShiftedShift(unsigned FirstShiftAmt,
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bool IsFirstShiftLeft,
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Instruction *SecondShift, InstCombiner &IC,
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Instruction *CxtI) {
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assert(SecondShift->isLogicalShift() && "Unexpected instruction type");
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// We need constant shifts.
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auto *SecondShiftConst = dyn_cast<ConstantInt>(SecondShift->getOperand(1));
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if (!SecondShiftConst)
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return false;
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unsigned SecondShiftAmt = SecondShiftConst->getZExtValue();
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bool IsSecondShiftLeft = SecondShift->getOpcode() == Instruction::Shl;
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// We can always fold shl(c1) + shl(c2) -> shl(c1+c2).
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// We can always fold lshr(c1) + lshr(c2) -> lshr(c1+c2).
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if (IsFirstShiftLeft == IsSecondShiftLeft)
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return true;
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// We can always fold lshr(c) + shl(c) -> and(c2).
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// We can always fold shl(c) + lshr(c) -> and(c2).
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if (FirstShiftAmt == SecondShiftAmt)
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return true;
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unsigned TypeWidth = SecondShift->getType()->getScalarSizeInBits();
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// If the 2nd shift is bigger than the 1st, we can fold:
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// lshr(c1) + shl(c2) -> shl(c3) + and(c4) or
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// shl(c1) + lshr(c2) -> lshr(c3) + and(c4),
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// but it isn't profitable unless we know the and'd out bits are already zero.
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// Also check that the 2nd shift is valid (less than the type width) or we'll
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// crash trying to produce the bit mask for the 'and'.
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if (SecondShiftAmt > FirstShiftAmt && SecondShiftAmt < TypeWidth) {
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unsigned MaskShift = IsSecondShiftLeft ? TypeWidth - SecondShiftAmt
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: SecondShiftAmt - FirstShiftAmt;
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APInt Mask = APInt::getLowBitsSet(TypeWidth, FirstShiftAmt) << MaskShift;
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if (IC.MaskedValueIsZero(SecondShift->getOperand(0), Mask, 0, CxtI))
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return true;
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}
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return false;
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}
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/// See if we can compute the specified value, but shifted
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/// logically to the left or right by some number of bits. This should return
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/// true if the expression can be computed for the same cost as the current
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/// expression tree. This is used to eliminate extraneous shifting from things
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/// like:
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/// %C = shl i128 %A, 64
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/// %D = shl i128 %B, 96
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/// %E = or i128 %C, %D
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/// %F = lshr i128 %E, 64
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/// where the client will ask if E can be computed shifted right by 64-bits. If
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/// this succeeds, the GetShiftedValue function will be called to produce the
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/// value.
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static bool CanEvaluateShifted(Value *V, unsigned NumBits, bool IsLeftShift,
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InstCombiner &IC, Instruction *CxtI) {
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// We can always evaluate constants shifted.
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if (isa<Constant>(V))
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return true;
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Instruction *I = dyn_cast<Instruction>(V);
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if (!I) return false;
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// If this is the opposite shift, we can directly reuse the input of the shift
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// if the needed bits are already zero in the input. This allows us to reuse
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// the value which means that we don't care if the shift has multiple uses.
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// TODO: Handle opposite shift by exact value.
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ConstantInt *CI = nullptr;
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if ((IsLeftShift && match(I, m_LShr(m_Value(), m_ConstantInt(CI)))) ||
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(!IsLeftShift && match(I, m_Shl(m_Value(), m_ConstantInt(CI))))) {
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if (CI->getZExtValue() == NumBits) {
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// TODO: Check that the input bits are already zero with MaskedValueIsZero
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#if 0
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// If this is a truncate of a logical shr, we can truncate it to a smaller
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// lshr iff we know that the bits we would otherwise be shifting in are
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// already zeros.
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uint32_t OrigBitWidth = OrigTy->getScalarSizeInBits();
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uint32_t BitWidth = Ty->getScalarSizeInBits();
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if (MaskedValueIsZero(I->getOperand(0),
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APInt::getHighBitsSet(OrigBitWidth, OrigBitWidth-BitWidth)) &&
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CI->getLimitedValue(BitWidth) < BitWidth) {
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return CanEvaluateTruncated(I->getOperand(0), Ty);
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}
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#endif
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}
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}
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// We can't mutate something that has multiple uses: doing so would
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// require duplicating the instruction in general, which isn't profitable.
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if (!I->hasOneUse()) return false;
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switch (I->getOpcode()) {
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default: return false;
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case Instruction::And:
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case Instruction::Or:
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case Instruction::Xor:
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// Bitwise operators can all arbitrarily be arbitrarily evaluated shifted.
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return CanEvaluateShifted(I->getOperand(0), NumBits, IsLeftShift, IC, I) &&
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CanEvaluateShifted(I->getOperand(1), NumBits, IsLeftShift, IC, I);
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case Instruction::Shl:
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case Instruction::LShr:
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return canEvaluateShiftedShift(NumBits, IsLeftShift, I, IC, CxtI);
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case Instruction::Select: {
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SelectInst *SI = cast<SelectInst>(I);
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Value *TrueVal = SI->getTrueValue();
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Value *FalseVal = SI->getFalseValue();
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return CanEvaluateShifted(TrueVal, NumBits, IsLeftShift, IC, SI) &&
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CanEvaluateShifted(FalseVal, NumBits, IsLeftShift, IC, SI);
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}
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case Instruction::PHI: {
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// We can change a phi if we can change all operands. Note that we never
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// get into trouble with cyclic PHIs here because we only consider
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// instructions with a single use.
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PHINode *PN = cast<PHINode>(I);
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for (Value *IncValue : PN->incoming_values())
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if (!CanEvaluateShifted(IncValue, NumBits, IsLeftShift, IC, PN))
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return false;
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return true;
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}
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}
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}
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/// When CanEvaluateShifted returned true for an expression,
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/// this value inserts the new computation that produces the shifted value.
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static Value *GetShiftedValue(Value *V, unsigned NumBits, bool isLeftShift,
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InstCombiner &IC, const DataLayout &DL) {
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// We can always evaluate constants shifted.
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if (Constant *C = dyn_cast<Constant>(V)) {
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if (isLeftShift)
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V = IC.Builder->CreateShl(C, NumBits);
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else
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V = IC.Builder->CreateLShr(C, NumBits);
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// If we got a constantexpr back, try to simplify it with TD info.
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if (auto *C = dyn_cast<Constant>(V))
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if (auto *FoldedC =
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ConstantFoldConstant(C, DL, &IC.getTargetLibraryInfo()))
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V = FoldedC;
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return V;
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}
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Instruction *I = cast<Instruction>(V);
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IC.Worklist.Add(I);
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switch (I->getOpcode()) {
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default: llvm_unreachable("Inconsistency with CanEvaluateShifted");
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case Instruction::And:
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case Instruction::Or:
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case Instruction::Xor:
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// Bitwise operators can all arbitrarily be arbitrarily evaluated shifted.
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I->setOperand(
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0, GetShiftedValue(I->getOperand(0), NumBits, isLeftShift, IC, DL));
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I->setOperand(
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1, GetShiftedValue(I->getOperand(1), NumBits, isLeftShift, IC, DL));
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return I;
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case Instruction::Shl: {
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BinaryOperator *BO = cast<BinaryOperator>(I);
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unsigned TypeWidth = BO->getType()->getScalarSizeInBits();
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// We only accept shifts-by-a-constant in CanEvaluateShifted.
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ConstantInt *CI = cast<ConstantInt>(BO->getOperand(1));
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// We can always fold shl(c1)+shl(c2) -> shl(c1+c2).
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if (isLeftShift) {
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// If this is oversized composite shift, then unsigned shifts get 0.
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unsigned NewShAmt = NumBits+CI->getZExtValue();
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if (NewShAmt >= TypeWidth)
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return Constant::getNullValue(I->getType());
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BO->setOperand(1, ConstantInt::get(BO->getType(), NewShAmt));
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BO->setHasNoUnsignedWrap(false);
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BO->setHasNoSignedWrap(false);
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return I;
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}
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// We turn shl(c)+lshr(c) -> and(c2) if the input doesn't already have
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// zeros.
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if (CI->getValue() == NumBits) {
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APInt Mask(APInt::getLowBitsSet(TypeWidth, TypeWidth - NumBits));
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V = IC.Builder->CreateAnd(BO->getOperand(0),
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ConstantInt::get(BO->getContext(), Mask));
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if (Instruction *VI = dyn_cast<Instruction>(V)) {
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VI->moveBefore(BO);
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VI->takeName(BO);
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}
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return V;
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}
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// We turn shl(c1)+shr(c2) -> shl(c3)+and(c4), but only when we know that
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// the and won't be needed.
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assert(CI->getZExtValue() > NumBits);
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BO->setOperand(1, ConstantInt::get(BO->getType(),
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CI->getZExtValue() - NumBits));
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BO->setHasNoUnsignedWrap(false);
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BO->setHasNoSignedWrap(false);
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return BO;
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}
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// FIXME: This is almost identical to the SHL case. Refactor both cases into
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// a helper function.
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case Instruction::LShr: {
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BinaryOperator *BO = cast<BinaryOperator>(I);
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unsigned TypeWidth = BO->getType()->getScalarSizeInBits();
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// We only accept shifts-by-a-constant in CanEvaluateShifted.
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ConstantInt *CI = cast<ConstantInt>(BO->getOperand(1));
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// We can always fold lshr(c1)+lshr(c2) -> lshr(c1+c2).
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if (!isLeftShift) {
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// If this is oversized composite shift, then unsigned shifts get 0.
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unsigned NewShAmt = NumBits+CI->getZExtValue();
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if (NewShAmt >= TypeWidth)
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return Constant::getNullValue(BO->getType());
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BO->setOperand(1, ConstantInt::get(BO->getType(), NewShAmt));
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BO->setIsExact(false);
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return I;
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}
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// We turn lshr(c)+shl(c) -> and(c2) if the input doesn't already have
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// zeros.
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if (CI->getValue() == NumBits) {
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APInt Mask(APInt::getHighBitsSet(TypeWidth, TypeWidth - NumBits));
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V = IC.Builder->CreateAnd(I->getOperand(0),
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ConstantInt::get(BO->getContext(), Mask));
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if (Instruction *VI = dyn_cast<Instruction>(V)) {
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VI->moveBefore(I);
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VI->takeName(I);
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}
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return V;
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}
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// We turn lshr(c1)+shl(c2) -> lshr(c3)+and(c4), but only when we know that
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// the and won't be needed.
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assert(CI->getZExtValue() > NumBits);
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BO->setOperand(1, ConstantInt::get(BO->getType(),
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CI->getZExtValue() - NumBits));
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BO->setIsExact(false);
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return BO;
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}
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case Instruction::Select:
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I->setOperand(
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1, GetShiftedValue(I->getOperand(1), NumBits, isLeftShift, IC, DL));
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I->setOperand(
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2, GetShiftedValue(I->getOperand(2), NumBits, isLeftShift, IC, DL));
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return I;
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case Instruction::PHI: {
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// We can change a phi if we can change all operands. Note that we never
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// get into trouble with cyclic PHIs here because we only consider
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// instructions with a single use.
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PHINode *PN = cast<PHINode>(I);
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for (unsigned i = 0, e = PN->getNumIncomingValues(); i != e; ++i)
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PN->setIncomingValue(i, GetShiftedValue(PN->getIncomingValue(i), NumBits,
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isLeftShift, IC, DL));
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return PN;
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}
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}
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}
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Instruction *InstCombiner::FoldShiftByConstant(Value *Op0, Constant *Op1,
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BinaryOperator &I) {
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bool isLeftShift = I.getOpcode() == Instruction::Shl;
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ConstantInt *COp1 = nullptr;
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if (ConstantDataVector *CV = dyn_cast<ConstantDataVector>(Op1))
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COp1 = dyn_cast_or_null<ConstantInt>(CV->getSplatValue());
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else if (ConstantVector *CV = dyn_cast<ConstantVector>(Op1))
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COp1 = dyn_cast_or_null<ConstantInt>(CV->getSplatValue());
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else
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COp1 = dyn_cast<ConstantInt>(Op1);
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if (!COp1)
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return nullptr;
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// See if we can propagate this shift into the input, this covers the trivial
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// cast of lshr(shl(x,c1),c2) as well as other more complex cases.
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if (I.getOpcode() != Instruction::AShr &&
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CanEvaluateShifted(Op0, COp1->getZExtValue(), isLeftShift, *this, &I)) {
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DEBUG(dbgs() << "ICE: GetShiftedValue propagating shift through expression"
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" to eliminate shift:\n IN: " << *Op0 << "\n SH: " << I <<"\n");
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return replaceInstUsesWith(
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I, GetShiftedValue(Op0, COp1->getZExtValue(), isLeftShift, *this, DL));
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}
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// See if we can simplify any instructions used by the instruction whose sole
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// purpose is to compute bits we don't care about.
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uint32_t TypeBits = Op0->getType()->getScalarSizeInBits();
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assert(!COp1->uge(TypeBits) &&
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"Shift over the type width should have been removed already");
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// ((X*C1) << C2) == (X * (C1 << C2))
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if (BinaryOperator *BO = dyn_cast<BinaryOperator>(Op0))
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if (BO->getOpcode() == Instruction::Mul && isLeftShift)
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if (Constant *BOOp = dyn_cast<Constant>(BO->getOperand(1)))
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return BinaryOperator::CreateMul(BO->getOperand(0),
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ConstantExpr::getShl(BOOp, Op1));
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// Try to fold constant and into select arguments.
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if (SelectInst *SI = dyn_cast<SelectInst>(Op0))
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if (Instruction *R = FoldOpIntoSelect(I, SI))
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return R;
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if (isa<PHINode>(Op0))
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if (Instruction *NV = FoldOpIntoPhi(I))
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return NV;
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// Fold shift2(trunc(shift1(x,c1)), c2) -> trunc(shift2(shift1(x,c1),c2))
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if (TruncInst *TI = dyn_cast<TruncInst>(Op0)) {
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Instruction *TrOp = dyn_cast<Instruction>(TI->getOperand(0));
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// If 'shift2' is an ashr, we would have to get the sign bit into a funny
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// place. Don't try to do this transformation in this case. Also, we
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// require that the input operand is a shift-by-constant so that we have
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// confidence that the shifts will get folded together. We could do this
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// xform in more cases, but it is unlikely to be profitable.
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if (TrOp && I.isLogicalShift() && TrOp->isShift() &&
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isa<ConstantInt>(TrOp->getOperand(1))) {
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// Okay, we'll do this xform. Make the shift of shift.
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Constant *ShAmt = ConstantExpr::getZExt(COp1, TrOp->getType());
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// (shift2 (shift1 & 0x00FF), c2)
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Value *NSh = Builder->CreateBinOp(I.getOpcode(), TrOp, ShAmt,I.getName());
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// For logical shifts, the truncation has the effect of making the high
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// part of the register be zeros. Emulate this by inserting an AND to
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// clear the top bits as needed. This 'and' will usually be zapped by
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// other xforms later if dead.
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unsigned SrcSize = TrOp->getType()->getScalarSizeInBits();
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unsigned DstSize = TI->getType()->getScalarSizeInBits();
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APInt MaskV(APInt::getLowBitsSet(SrcSize, DstSize));
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// The mask we constructed says what the trunc would do if occurring
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// between the shifts. We want to know the effect *after* the second
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// shift. We know that it is a logical shift by a constant, so adjust the
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// mask as appropriate.
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if (I.getOpcode() == Instruction::Shl)
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MaskV <<= COp1->getZExtValue();
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else {
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assert(I.getOpcode() == Instruction::LShr && "Unknown logical shift");
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MaskV = MaskV.lshr(COp1->getZExtValue());
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}
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// shift1 & 0x00FF
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Value *And = Builder->CreateAnd(NSh,
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ConstantInt::get(I.getContext(), MaskV),
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TI->getName());
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// Return the value truncated to the interesting size.
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return new TruncInst(And, I.getType());
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}
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}
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if (Op0->hasOneUse()) {
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if (BinaryOperator *Op0BO = dyn_cast<BinaryOperator>(Op0)) {
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// Turn ((X >> C) + Y) << C -> (X + (Y << C)) & (~0 << C)
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Value *V1, *V2;
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ConstantInt *CC;
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switch (Op0BO->getOpcode()) {
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default: break;
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case Instruction::Add:
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case Instruction::And:
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case Instruction::Or:
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case Instruction::Xor: {
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// These operators commute.
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// Turn (Y + (X >> C)) << C -> (X + (Y << C)) & (~0 << C)
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if (isLeftShift && Op0BO->getOperand(1)->hasOneUse() &&
|
|
match(Op0BO->getOperand(1), m_Shr(m_Value(V1),
|
|
m_Specific(Op1)))) {
|
|
Value *YS = // (Y << C)
|
|
Builder->CreateShl(Op0BO->getOperand(0), Op1, Op0BO->getName());
|
|
// (X + (Y << C))
|
|
Value *X = Builder->CreateBinOp(Op0BO->getOpcode(), YS, V1,
|
|
Op0BO->getOperand(1)->getName());
|
|
uint32_t Op1Val = COp1->getLimitedValue(TypeBits);
|
|
|
|
APInt Bits = APInt::getHighBitsSet(TypeBits, TypeBits - Op1Val);
|
|
Constant *Mask = ConstantInt::get(I.getContext(), Bits);
|
|
if (VectorType *VT = dyn_cast<VectorType>(X->getType()))
|
|
Mask = ConstantVector::getSplat(VT->getNumElements(), Mask);
|
|
return BinaryOperator::CreateAnd(X, Mask);
|
|
}
|
|
|
|
// Turn (Y + ((X >> C) & CC)) << C -> ((X & (CC << C)) + (Y << C))
|
|
Value *Op0BOOp1 = Op0BO->getOperand(1);
|
|
if (isLeftShift && Op0BOOp1->hasOneUse() &&
|
|
match(Op0BOOp1,
|
|
m_And(m_OneUse(m_Shr(m_Value(V1), m_Specific(Op1))),
|
|
m_ConstantInt(CC)))) {
|
|
Value *YS = // (Y << C)
|
|
Builder->CreateShl(Op0BO->getOperand(0), Op1,
|
|
Op0BO->getName());
|
|
// X & (CC << C)
|
|
Value *XM = Builder->CreateAnd(V1, ConstantExpr::getShl(CC, Op1),
|
|
V1->getName()+".mask");
|
|
return BinaryOperator::Create(Op0BO->getOpcode(), YS, XM);
|
|
}
|
|
LLVM_FALLTHROUGH;
|
|
}
|
|
|
|
case Instruction::Sub: {
|
|
// Turn ((X >> C) + Y) << C -> (X + (Y << C)) & (~0 << C)
|
|
if (isLeftShift && Op0BO->getOperand(0)->hasOneUse() &&
|
|
match(Op0BO->getOperand(0), m_Shr(m_Value(V1),
|
|
m_Specific(Op1)))) {
|
|
Value *YS = // (Y << C)
|
|
Builder->CreateShl(Op0BO->getOperand(1), Op1, Op0BO->getName());
|
|
// (X + (Y << C))
|
|
Value *X = Builder->CreateBinOp(Op0BO->getOpcode(), V1, YS,
|
|
Op0BO->getOperand(0)->getName());
|
|
uint32_t Op1Val = COp1->getLimitedValue(TypeBits);
|
|
|
|
APInt Bits = APInt::getHighBitsSet(TypeBits, TypeBits - Op1Val);
|
|
Constant *Mask = ConstantInt::get(I.getContext(), Bits);
|
|
if (VectorType *VT = dyn_cast<VectorType>(X->getType()))
|
|
Mask = ConstantVector::getSplat(VT->getNumElements(), Mask);
|
|
return BinaryOperator::CreateAnd(X, Mask);
|
|
}
|
|
|
|
// Turn (((X >> C)&CC) + Y) << C -> (X + (Y << C)) & (CC << C)
|
|
if (isLeftShift && Op0BO->getOperand(0)->hasOneUse() &&
|
|
match(Op0BO->getOperand(0),
|
|
m_And(m_OneUse(m_Shr(m_Value(V1), m_Value(V2))),
|
|
m_ConstantInt(CC))) && V2 == Op1) {
|
|
Value *YS = // (Y << C)
|
|
Builder->CreateShl(Op0BO->getOperand(1), Op1, Op0BO->getName());
|
|
// X & (CC << C)
|
|
Value *XM = Builder->CreateAnd(V1, ConstantExpr::getShl(CC, Op1),
|
|
V1->getName()+".mask");
|
|
|
|
return BinaryOperator::Create(Op0BO->getOpcode(), XM, YS);
|
|
}
|
|
|
|
break;
|
|
}
|
|
}
|
|
|
|
|
|
// If the operand is a bitwise operator with a constant RHS, and the
|
|
// shift is the only use, we can pull it out of the shift.
|
|
if (ConstantInt *Op0C = dyn_cast<ConstantInt>(Op0BO->getOperand(1))) {
|
|
bool isValid = true; // Valid only for And, Or, Xor
|
|
bool highBitSet = false; // Transform if high bit of constant set?
|
|
|
|
switch (Op0BO->getOpcode()) {
|
|
default: isValid = false; break; // Do not perform transform!
|
|
case Instruction::Add:
|
|
isValid = isLeftShift;
|
|
break;
|
|
case Instruction::Or:
|
|
case Instruction::Xor:
|
|
highBitSet = false;
|
|
break;
|
|
case Instruction::And:
|
|
highBitSet = true;
|
|
break;
|
|
}
|
|
|
|
// If this is a signed shift right, and the high bit is modified
|
|
// by the logical operation, do not perform the transformation.
|
|
// The highBitSet boolean indicates the value of the high bit of
|
|
// the constant which would cause it to be modified for this
|
|
// operation.
|
|
//
|
|
if (isValid && I.getOpcode() == Instruction::AShr)
|
|
isValid = Op0C->getValue()[TypeBits-1] == highBitSet;
|
|
|
|
if (isValid) {
|
|
Constant *NewRHS = ConstantExpr::get(I.getOpcode(), Op0C, Op1);
|
|
|
|
Value *NewShift =
|
|
Builder->CreateBinOp(I.getOpcode(), Op0BO->getOperand(0), Op1);
|
|
NewShift->takeName(Op0BO);
|
|
|
|
return BinaryOperator::Create(Op0BO->getOpcode(), NewShift,
|
|
NewRHS);
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
// Find out if this is a shift of a shift by a constant.
|
|
BinaryOperator *ShiftOp = dyn_cast<BinaryOperator>(Op0);
|
|
if (ShiftOp && !ShiftOp->isShift())
|
|
ShiftOp = nullptr;
|
|
|
|
if (ShiftOp && isa<ConstantInt>(ShiftOp->getOperand(1))) {
|
|
|
|
// This is a constant shift of a constant shift. Be careful about hiding
|
|
// shl instructions behind bit masks. They are used to represent multiplies
|
|
// by a constant, and it is important that simple arithmetic expressions
|
|
// are still recognizable by scalar evolution.
|
|
//
|
|
// The transforms applied to shl are very similar to the transforms applied
|
|
// to mul by constant. We can be more aggressive about optimizing right
|
|
// shifts.
|
|
//
|
|
// Combinations of right and left shifts will still be optimized in
|
|
// DAGCombine where scalar evolution no longer applies.
|
|
|
|
ConstantInt *ShiftAmt1C = cast<ConstantInt>(ShiftOp->getOperand(1));
|
|
uint32_t ShiftAmt1 = ShiftAmt1C->getLimitedValue(TypeBits);
|
|
uint32_t ShiftAmt2 = COp1->getLimitedValue(TypeBits);
|
|
assert(ShiftAmt2 != 0 && "Should have been simplified earlier");
|
|
if (ShiftAmt1 == 0) return nullptr; // Will be simplified in the future.
|
|
Value *X = ShiftOp->getOperand(0);
|
|
|
|
IntegerType *Ty = cast<IntegerType>(I.getType());
|
|
|
|
// Check for (X << c1) << c2 and (X >> c1) >> c2
|
|
if (I.getOpcode() == ShiftOp->getOpcode()) {
|
|
uint32_t AmtSum = ShiftAmt1 + ShiftAmt2; // Fold into one big shift.
|
|
// If this is an oversized composite shift, then unsigned shifts become
|
|
// zero (handled in InstSimplify) and ashr saturates.
|
|
if (AmtSum >= TypeBits) {
|
|
if (I.getOpcode() != Instruction::AShr)
|
|
return nullptr;
|
|
AmtSum = TypeBits - 1; // Saturate to 31 for i32 ashr.
|
|
}
|
|
|
|
return BinaryOperator::Create(I.getOpcode(), X,
|
|
ConstantInt::get(Ty, AmtSum));
|
|
}
|
|
|
|
if (ShiftAmt1 == ShiftAmt2) {
|
|
// If we have ((X << C) >>u C), turn this into X & (-1 >>u C).
|
|
if (I.getOpcode() == Instruction::LShr &&
|
|
ShiftOp->getOpcode() == Instruction::Shl) {
|
|
APInt Mask(APInt::getLowBitsSet(TypeBits, TypeBits - ShiftAmt1));
|
|
return BinaryOperator::CreateAnd(X,
|
|
ConstantInt::get(I.getContext(), Mask));
|
|
}
|
|
} else if (ShiftAmt1 < ShiftAmt2) {
|
|
uint32_t ShiftDiff = ShiftAmt2-ShiftAmt1;
|
|
|
|
// (X >>?,exact C1) << C2 --> X << (C2-C1)
|
|
// The inexact version is deferred to DAGCombine so we don't hide shl
|
|
// behind a bit mask.
|
|
if (I.getOpcode() == Instruction::Shl &&
|
|
ShiftOp->getOpcode() != Instruction::Shl &&
|
|
ShiftOp->isExact()) {
|
|
assert(ShiftOp->getOpcode() == Instruction::LShr ||
|
|
ShiftOp->getOpcode() == Instruction::AShr);
|
|
ConstantInt *ShiftDiffCst = ConstantInt::get(Ty, ShiftDiff);
|
|
BinaryOperator *NewShl = BinaryOperator::Create(Instruction::Shl,
|
|
X, ShiftDiffCst);
|
|
NewShl->setHasNoUnsignedWrap(I.hasNoUnsignedWrap());
|
|
NewShl->setHasNoSignedWrap(I.hasNoSignedWrap());
|
|
return NewShl;
|
|
}
|
|
|
|
// (X << C1) >>u C2 --> X >>u (C2-C1) & (-1 >> C2)
|
|
if (I.getOpcode() == Instruction::LShr &&
|
|
ShiftOp->getOpcode() == Instruction::Shl) {
|
|
ConstantInt *ShiftDiffCst = ConstantInt::get(Ty, ShiftDiff);
|
|
// (X <<nuw C1) >>u C2 --> X >>u (C2-C1)
|
|
if (ShiftOp->hasNoUnsignedWrap()) {
|
|
BinaryOperator *NewLShr = BinaryOperator::Create(Instruction::LShr,
|
|
X, ShiftDiffCst);
|
|
NewLShr->setIsExact(I.isExact());
|
|
return NewLShr;
|
|
}
|
|
Value *Shift = Builder->CreateLShr(X, ShiftDiffCst);
|
|
|
|
APInt Mask(APInt::getLowBitsSet(TypeBits, TypeBits - ShiftAmt2));
|
|
return BinaryOperator::CreateAnd(Shift,
|
|
ConstantInt::get(I.getContext(),Mask));
|
|
}
|
|
|
|
// We can't handle (X << C1) >>s C2, it shifts arbitrary bits in. However,
|
|
// we can handle (X <<nsw C1) >>s C2 since it only shifts in sign bits.
|
|
if (I.getOpcode() == Instruction::AShr &&
|
|
ShiftOp->getOpcode() == Instruction::Shl) {
|
|
if (ShiftOp->hasNoSignedWrap()) {
|
|
// (X <<nsw C1) >>s C2 --> X >>s (C2-C1)
|
|
ConstantInt *ShiftDiffCst = ConstantInt::get(Ty, ShiftDiff);
|
|
BinaryOperator *NewAShr = BinaryOperator::Create(Instruction::AShr,
|
|
X, ShiftDiffCst);
|
|
NewAShr->setIsExact(I.isExact());
|
|
return NewAShr;
|
|
}
|
|
}
|
|
} else {
|
|
assert(ShiftAmt2 < ShiftAmt1);
|
|
uint32_t ShiftDiff = ShiftAmt1-ShiftAmt2;
|
|
|
|
// (X >>?exact C1) << C2 --> X >>?exact (C1-C2)
|
|
// The inexact version is deferred to DAGCombine so we don't hide shl
|
|
// behind a bit mask.
|
|
if (I.getOpcode() == Instruction::Shl &&
|
|
ShiftOp->getOpcode() != Instruction::Shl &&
|
|
ShiftOp->isExact()) {
|
|
ConstantInt *ShiftDiffCst = ConstantInt::get(Ty, ShiftDiff);
|
|
BinaryOperator *NewShr = BinaryOperator::Create(ShiftOp->getOpcode(),
|
|
X, ShiftDiffCst);
|
|
NewShr->setIsExact(true);
|
|
return NewShr;
|
|
}
|
|
|
|
// (X << C1) >>u C2 --> X << (C1-C2) & (-1 >> C2)
|
|
if (I.getOpcode() == Instruction::LShr &&
|
|
ShiftOp->getOpcode() == Instruction::Shl) {
|
|
ConstantInt *ShiftDiffCst = ConstantInt::get(Ty, ShiftDiff);
|
|
if (ShiftOp->hasNoUnsignedWrap()) {
|
|
// (X <<nuw C1) >>u C2 --> X <<nuw (C1-C2)
|
|
BinaryOperator *NewShl = BinaryOperator::Create(Instruction::Shl,
|
|
X, ShiftDiffCst);
|
|
NewShl->setHasNoUnsignedWrap(true);
|
|
return NewShl;
|
|
}
|
|
Value *Shift = Builder->CreateShl(X, ShiftDiffCst);
|
|
|
|
APInt Mask(APInt::getLowBitsSet(TypeBits, TypeBits - ShiftAmt2));
|
|
return BinaryOperator::CreateAnd(Shift,
|
|
ConstantInt::get(I.getContext(),Mask));
|
|
}
|
|
|
|
// We can't handle (X << C1) >>s C2, it shifts arbitrary bits in. However,
|
|
// we can handle (X <<nsw C1) >>s C2 since it only shifts in sign bits.
|
|
if (I.getOpcode() == Instruction::AShr &&
|
|
ShiftOp->getOpcode() == Instruction::Shl) {
|
|
if (ShiftOp->hasNoSignedWrap()) {
|
|
// (X <<nsw C1) >>s C2 --> X <<nsw (C1-C2)
|
|
ConstantInt *ShiftDiffCst = ConstantInt::get(Ty, ShiftDiff);
|
|
BinaryOperator *NewShl = BinaryOperator::Create(Instruction::Shl,
|
|
X, ShiftDiffCst);
|
|
NewShl->setHasNoSignedWrap(true);
|
|
return NewShl;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
return nullptr;
|
|
}
|
|
|
|
Instruction *InstCombiner::visitShl(BinaryOperator &I) {
|
|
if (Value *V = SimplifyVectorOp(I))
|
|
return replaceInstUsesWith(I, V);
|
|
|
|
if (Value *V =
|
|
SimplifyShlInst(I.getOperand(0), I.getOperand(1), I.hasNoSignedWrap(),
|
|
I.hasNoUnsignedWrap(), DL, &TLI, &DT, &AC))
|
|
return replaceInstUsesWith(I, V);
|
|
|
|
if (Instruction *V = commonShiftTransforms(I))
|
|
return V;
|
|
|
|
if (ConstantInt *Op1C = dyn_cast<ConstantInt>(I.getOperand(1))) {
|
|
unsigned ShAmt = Op1C->getZExtValue();
|
|
|
|
// If the shifted-out value is known-zero, then this is a NUW shift.
|
|
if (!I.hasNoUnsignedWrap() &&
|
|
MaskedValueIsZero(I.getOperand(0),
|
|
APInt::getHighBitsSet(Op1C->getBitWidth(), ShAmt), 0,
|
|
&I)) {
|
|
I.setHasNoUnsignedWrap();
|
|
return &I;
|
|
}
|
|
|
|
// If the shifted out value is all signbits, this is a NSW shift.
|
|
if (!I.hasNoSignedWrap() &&
|
|
ComputeNumSignBits(I.getOperand(0), 0, &I) > ShAmt) {
|
|
I.setHasNoSignedWrap();
|
|
return &I;
|
|
}
|
|
}
|
|
|
|
// (C1 << A) << C2 -> (C1 << C2) << A
|
|
Constant *C1, *C2;
|
|
Value *A;
|
|
if (match(I.getOperand(0), m_OneUse(m_Shl(m_Constant(C1), m_Value(A)))) &&
|
|
match(I.getOperand(1), m_Constant(C2)))
|
|
return BinaryOperator::CreateShl(ConstantExpr::getShl(C1, C2), A);
|
|
|
|
return nullptr;
|
|
}
|
|
|
|
Instruction *InstCombiner::visitLShr(BinaryOperator &I) {
|
|
if (Value *V = SimplifyVectorOp(I))
|
|
return replaceInstUsesWith(I, V);
|
|
|
|
if (Value *V = SimplifyLShrInst(I.getOperand(0), I.getOperand(1), I.isExact(),
|
|
DL, &TLI, &DT, &AC))
|
|
return replaceInstUsesWith(I, V);
|
|
|
|
if (Instruction *R = commonShiftTransforms(I))
|
|
return R;
|
|
|
|
Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1);
|
|
|
|
if (ConstantInt *Op1C = dyn_cast<ConstantInt>(Op1)) {
|
|
unsigned ShAmt = Op1C->getZExtValue();
|
|
|
|
if (IntrinsicInst *II = dyn_cast<IntrinsicInst>(Op0)) {
|
|
unsigned BitWidth = Op0->getType()->getScalarSizeInBits();
|
|
// ctlz.i32(x)>>5 --> zext(x == 0)
|
|
// cttz.i32(x)>>5 --> zext(x == 0)
|
|
// ctpop.i32(x)>>5 --> zext(x == -1)
|
|
if ((II->getIntrinsicID() == Intrinsic::ctlz ||
|
|
II->getIntrinsicID() == Intrinsic::cttz ||
|
|
II->getIntrinsicID() == Intrinsic::ctpop) &&
|
|
isPowerOf2_32(BitWidth) && Log2_32(BitWidth) == ShAmt) {
|
|
bool isCtPop = II->getIntrinsicID() == Intrinsic::ctpop;
|
|
Constant *RHS = ConstantInt::getSigned(Op0->getType(), isCtPop ? -1:0);
|
|
Value *Cmp = Builder->CreateICmpEQ(II->getArgOperand(0), RHS);
|
|
return new ZExtInst(Cmp, II->getType());
|
|
}
|
|
}
|
|
|
|
// If the shifted-out value is known-zero, then this is an exact shift.
|
|
if (!I.isExact() &&
|
|
MaskedValueIsZero(Op0, APInt::getLowBitsSet(Op1C->getBitWidth(), ShAmt),
|
|
0, &I)){
|
|
I.setIsExact();
|
|
return &I;
|
|
}
|
|
}
|
|
|
|
return nullptr;
|
|
}
|
|
|
|
Instruction *InstCombiner::visitAShr(BinaryOperator &I) {
|
|
if (Value *V = SimplifyVectorOp(I))
|
|
return replaceInstUsesWith(I, V);
|
|
|
|
if (Value *V = SimplifyAShrInst(I.getOperand(0), I.getOperand(1), I.isExact(),
|
|
DL, &TLI, &DT, &AC))
|
|
return replaceInstUsesWith(I, V);
|
|
|
|
if (Instruction *R = commonShiftTransforms(I))
|
|
return R;
|
|
|
|
Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1);
|
|
|
|
if (ConstantInt *Op1C = dyn_cast<ConstantInt>(Op1)) {
|
|
unsigned ShAmt = Op1C->getZExtValue();
|
|
|
|
// If the input is a SHL by the same constant (ashr (shl X, C), C), then we
|
|
// have a sign-extend idiom.
|
|
Value *X;
|
|
if (match(Op0, m_Shl(m_Value(X), m_Specific(Op1)))) {
|
|
// If the input is an extension from the shifted amount value, e.g.
|
|
// %x = zext i8 %A to i32
|
|
// %y = shl i32 %x, 24
|
|
// %z = ashr %y, 24
|
|
// then turn this into "z = sext i8 A to i32".
|
|
if (ZExtInst *ZI = dyn_cast<ZExtInst>(X)) {
|
|
uint32_t SrcBits = ZI->getOperand(0)->getType()->getScalarSizeInBits();
|
|
uint32_t DestBits = ZI->getType()->getScalarSizeInBits();
|
|
if (Op1C->getZExtValue() == DestBits-SrcBits)
|
|
return new SExtInst(ZI->getOperand(0), ZI->getType());
|
|
}
|
|
}
|
|
|
|
// If the shifted-out value is known-zero, then this is an exact shift.
|
|
if (!I.isExact() &&
|
|
MaskedValueIsZero(Op0, APInt::getLowBitsSet(Op1C->getBitWidth(), ShAmt),
|
|
0, &I)) {
|
|
I.setIsExact();
|
|
return &I;
|
|
}
|
|
}
|
|
|
|
// See if we can turn a signed shr into an unsigned shr.
|
|
if (MaskedValueIsZero(Op0,
|
|
APInt::getSignBit(I.getType()->getScalarSizeInBits()),
|
|
0, &I))
|
|
return BinaryOperator::CreateLShr(Op0, Op1);
|
|
|
|
return nullptr;
|
|
}
|