llvm-project/llvm/test/MC/Sparc
Rafael Espindola 699281cce7 Don't pass a Reloc::Model to MC.
MC only needs to know if the output is PIC or not. It never has to
decide about creating GOTs and PLTs for example. The only thing that
MC itself uses this information for is expanding "macros" in sparc and
mips. The rest I am pretty sure could be moved to CodeGen.

This is a cleanup and isolates the code from future changes to
Reloc::Model.

llvm-svn: 269909
2016-05-18 11:58:50 +00:00
..
leon-instructions.s [Sparc][LEON] Add LEON-specific CASA instruction. 2016-05-16 11:02:00 +00:00
lit.local.cfg
sparc-alu-instructions.s
sparc-asm-errors.s
sparc-assembly-exprs.s
sparc-atomic-instructions.s
sparc-coproc.s
sparc-ctrl-instructions.s This change adds co-processor condition branching and conditional traps to the Sparc back-end. 2016-03-09 18:20:21 +00:00
sparc-directive-xword.s
sparc-directives.s Sparc: silently ignore .proc assembler directive 2016-03-28 14:00:11 +00:00
sparc-fp-instructions.s
sparc-little-endian.s
sparc-mem-instructions.s
sparc-nop-data.s
sparc-pic.s Don't pass a Reloc::Model to MC. 2016-05-18 11:58:50 +00:00
sparc-relocations.s
sparc-special-registers.s
sparc-synthetic-instructions.s
sparc-traps.s This change adds co-processor condition branching and conditional traps to the Sparc back-end. 2016-03-09 18:20:21 +00:00
sparc-v9-traps.s This change adds co-processor condition branching and conditional traps to the Sparc back-end. 2016-03-09 18:20:21 +00:00
sparc-vis.s
sparc64-alu-instructions.s
sparc64-ctrl-instructions.s This change adds co-processor condition branching and conditional traps to the Sparc back-end. 2016-03-09 18:20:21 +00:00
sparcv8-instructions.s
sparcv9-atomic-instructions.s
sparcv9-instructions.s