forked from OSchip/llvm-project
81 lines
3.7 KiB
LLVM
81 lines
3.7 KiB
LLVM
; When EXPENSIVE_CHECKS are enabled, the machine verifier appears between each
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; pass. Ignore it with 'grep -v'.
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; RUN: llc -mtriple=x86_64-- -O0 -debug-pass=Structure < %s -o /dev/null 2>&1 \
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; RUN: | grep -v 'Verify generated machine code' | FileCheck %s
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; REQUIRES: asserts
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; CHECK-LABEL: Pass Arguments:
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; CHECK-NEXT: Target Library Information
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; CHECK-NEXT: Target Pass Configuration
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; CHECK-NEXT: Machine Module Information
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; CHECK-NEXT: Target Transform Information
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; CHECK-NEXT: Create Garbage Collector Module Metadata
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; CHECK-NEXT: Assumption Cache Tracker
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; CHECK-NEXT: Profile summary info
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; CHECK-NEXT: Machine Branch Probability Analysis
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; CHECK-NEXT: ModulePass Manager
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; CHECK-NEXT: Pre-ISel Intrinsic Lowering
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; CHECK-NEXT: FunctionPass Manager
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; CHECK-NEXT: Expand Atomic instructions
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; CHECK-NEXT: Module Verifier
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; CHECK-NEXT: Lower Garbage Collection Instructions
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; CHECK-NEXT: Shadow Stack GC Lowering
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; CHECK-NEXT: Lower constant intrinsics
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; CHECK-NEXT: Remove unreachable blocks from the CFG
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; CHECK-NEXT: Instrument function entry/exit with calls to e.g. mcount() (post inlining)
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; CHECK-NEXT: Scalarize Masked Memory Intrinsics
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; CHECK-NEXT: Expand reduction intrinsics
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; CHECK-NEXT: Expand indirectbr instructions
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; CHECK-NEXT: Rewrite Symbols
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; CHECK-NEXT: FunctionPass Manager
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; CHECK-NEXT: Exception handling preparation
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; CHECK-NEXT: Safe Stack instrumentation pass
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; CHECK-NEXT: Insert stack protectors
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; CHECK-NEXT: Module Verifier
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; CHECK-NEXT: X86 DAG->DAG Instruction Selection
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; CHECK-NEXT: X86 PIC Global Base Reg Initialization
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; CHECK-NEXT: Finalize ISel and expand pseudo-instructions
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; CHECK-NEXT: Local Stack Slot Allocation
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; CHECK-NEXT: X86 speculative load hardening
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; CHECK-NEXT: MachineDominator Tree Construction
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; CHECK-NEXT: X86 EFLAGS copy lowering
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; CHECK-NEXT: X86 WinAlloca Expander
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; CHECK-NEXT: Eliminate PHI nodes for register allocation
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; CHECK-NEXT: Two-Address instruction pass
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; CHECK-NEXT: Fast Register Allocator
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; CHECK-NEXT: Bundle Machine CFG Edges
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; CHECK-NEXT: X86 FP Stackifier
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; CHECK-NEXT: X86 Load Value Injection (LVI) Load Hardening (Unoptimized)
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; CHECK-NEXT: Fixup Statepoint Caller Saved
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; CHECK-NEXT: Lazy Machine Block Frequency Analysis
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; CHECK-NEXT: Machine Optimization Remark Emitter
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; CHECK-NEXT: Prologue/Epilogue Insertion & Frame Finalization
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; CHECK-NEXT: Post-RA pseudo instruction expansion pass
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; CHECK-NEXT: X86 pseudo instruction expansion pass
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; CHECK-NEXT: Analyze Machine Code For Garbage Collection
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; CHECK-NEXT: Insert fentry calls
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; CHECK-NEXT: Insert XRay ops
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; CHECK-NEXT: Implement the 'patchable-function' attribute
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; CHECK-NEXT: X86 Indirect Branch Tracking
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; CHECK-NEXT: X86 vzeroupper inserter
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; CHECK-NEXT: Compressing EVEX instrs to VEX encoding when possibl
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; CHECK-NEXT: X86 Discriminate Memory Operands
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; CHECK-NEXT: X86 Insert Cache Prefetches
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; CHECK-NEXT: X86 insert wait instruction
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; CHECK-NEXT: Contiguously Lay Out Funclets
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; CHECK-NEXT: StackMap Liveness Analysis
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; CHECK-NEXT: Live DEBUG_VALUE analysis
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; CHECK-NEXT: X86 Speculative Execution Side Effect Suppression
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; CHECK-NEXT: X86 Indirect Thunks
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; CHECK-NEXT: Check CFA info and insert CFI instructions if needed
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; CHECK-NEXT: X86 Load Value Injection (LVI) Ret-Hardening
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; CHECK-NEXT: Lazy Machine Block Frequency Analysis
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; CHECK-NEXT: Machine Optimization Remark Emitter
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; CHECK-NEXT: X86 Assembly Printer
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; CHECK-NEXT: Free MachineFunction
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define void @f() {
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ret void
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}
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