forked from OSchip/llvm-project
156 lines
3.7 KiB
YAML
156 lines
3.7 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
|
|
# RUN: llc -O0 -mtriple=x86_64-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s
|
|
|
|
--- |
|
|
define i1 @test_xor_i1() {
|
|
%ret = xor i1 undef, undef
|
|
ret i1 %ret
|
|
}
|
|
|
|
define i8 @test_xor_i8() {
|
|
%ret = xor i8 undef, undef
|
|
ret i8 %ret
|
|
}
|
|
|
|
define i16 @test_xor_i16() {
|
|
%ret = xor i16 undef, undef
|
|
ret i16 %ret
|
|
}
|
|
|
|
define i32 @test_xor_i32() {
|
|
%ret = xor i32 undef, undef
|
|
ret i32 %ret
|
|
}
|
|
|
|
define i64 @test_xor_i64() {
|
|
%ret = xor i64 undef, undef
|
|
ret i64 %ret
|
|
}
|
|
|
|
...
|
|
---
|
|
name: test_xor_i1
|
|
alignment: 16
|
|
legalized: false
|
|
regBankSelected: false
|
|
registers:
|
|
- { id: 0, class: _, preferred-register: '' }
|
|
- { id: 1, class: _, preferred-register: '' }
|
|
- { id: 2, class: _, preferred-register: '' }
|
|
body: |
|
|
bb.1 (%ir-block.0):
|
|
|
|
; CHECK-LABEL: name: test_xor_i1
|
|
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $edx
|
|
; CHECK: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)
|
|
; CHECK: [[TRUNC1:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)
|
|
; CHECK: [[XOR:%[0-9]+]]:_(s8) = G_XOR [[TRUNC]], [[TRUNC1]]
|
|
; CHECK: RET 0
|
|
%0(s32) = COPY $edx
|
|
%1(s1) = G_TRUNC %0(s32)
|
|
%2(s1) = G_XOR %1, %1
|
|
%3:_(p0) = G_IMPLICIT_DEF
|
|
G_STORE %2, %3 ::(store 1)
|
|
RET 0
|
|
...
|
|
---
|
|
name: test_xor_i8
|
|
alignment: 16
|
|
legalized: false
|
|
regBankSelected: false
|
|
registers:
|
|
- { id: 0, class: _, preferred-register: '' }
|
|
- { id: 1, class: _, preferred-register: '' }
|
|
liveins:
|
|
fixedStack:
|
|
stack:
|
|
constants:
|
|
body: |
|
|
bb.1 (%ir-block.0):
|
|
; CHECK-LABEL: name: test_xor_i8
|
|
; CHECK: [[DEF:%[0-9]+]]:_(s8) = IMPLICIT_DEF
|
|
; CHECK: [[XOR:%[0-9]+]]:_(s8) = G_XOR [[DEF]], [[DEF]]
|
|
; CHECK: $al = COPY [[XOR]](s8)
|
|
; CHECK: RET 0, implicit $al
|
|
%0(s8) = IMPLICIT_DEF
|
|
%1(s8) = G_XOR %0, %0
|
|
$al = COPY %1(s8)
|
|
RET 0, implicit $al
|
|
|
|
...
|
|
---
|
|
name: test_xor_i16
|
|
alignment: 16
|
|
legalized: false
|
|
regBankSelected: false
|
|
registers:
|
|
- { id: 0, class: _, preferred-register: '' }
|
|
- { id: 1, class: _, preferred-register: '' }
|
|
liveins:
|
|
fixedStack:
|
|
stack:
|
|
constants:
|
|
body: |
|
|
bb.1 (%ir-block.0):
|
|
; CHECK-LABEL: name: test_xor_i16
|
|
; CHECK: [[DEF:%[0-9]+]]:_(s16) = IMPLICIT_DEF
|
|
; CHECK: [[XOR:%[0-9]+]]:_(s16) = G_XOR [[DEF]], [[DEF]]
|
|
; CHECK: $ax = COPY [[XOR]](s16)
|
|
; CHECK: RET 0, implicit $ax
|
|
%0(s16) = IMPLICIT_DEF
|
|
%1(s16) = G_XOR %0, %0
|
|
$ax = COPY %1(s16)
|
|
RET 0, implicit $ax
|
|
|
|
...
|
|
---
|
|
name: test_xor_i32
|
|
alignment: 16
|
|
legalized: false
|
|
regBankSelected: false
|
|
registers:
|
|
- { id: 0, class: _, preferred-register: '' }
|
|
- { id: 1, class: _, preferred-register: '' }
|
|
liveins:
|
|
fixedStack:
|
|
stack:
|
|
constants:
|
|
body: |
|
|
bb.1 (%ir-block.0):
|
|
; CHECK-LABEL: name: test_xor_i32
|
|
; CHECK: [[DEF:%[0-9]+]]:_(s32) = IMPLICIT_DEF
|
|
; CHECK: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[DEF]], [[DEF]]
|
|
; CHECK: $eax = COPY [[XOR]](s32)
|
|
; CHECK: RET 0, implicit $eax
|
|
%0(s32) = IMPLICIT_DEF
|
|
%1(s32) = G_XOR %0, %0
|
|
$eax = COPY %1(s32)
|
|
RET 0, implicit $eax
|
|
|
|
...
|
|
---
|
|
name: test_xor_i64
|
|
alignment: 16
|
|
legalized: false
|
|
regBankSelected: false
|
|
registers:
|
|
- { id: 0, class: _, preferred-register: '' }
|
|
- { id: 1, class: _, preferred-register: '' }
|
|
liveins:
|
|
fixedStack:
|
|
stack:
|
|
constants:
|
|
body: |
|
|
bb.1 (%ir-block.0):
|
|
; CHECK-LABEL: name: test_xor_i64
|
|
; CHECK: [[DEF:%[0-9]+]]:_(s64) = IMPLICIT_DEF
|
|
; CHECK: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[DEF]], [[DEF]]
|
|
; CHECK: $rax = COPY [[XOR]](s64)
|
|
; CHECK: RET 0, implicit $rax
|
|
%0(s64) = IMPLICIT_DEF
|
|
%1(s64) = G_XOR %0, %0
|
|
$rax = COPY %1(s64)
|
|
RET 0, implicit $rax
|
|
|
|
...
|