llvm-project/llvm/test/CodeGen/X86
Amy Huang 8b59c26bf3 Extend or truncate __ptr32/__ptr64 pointers when dereferenced.
Summary:
A while ago I implemented the functionality to lower Microsoft __ptr32
and __ptr64 pointers, which are stored as 32-bit and 64-bit pointer
and are extended/truncated to the appropriate pointer size when
dereferenced.
This patch adds an addrspacecast to cast from the __ptr32/__ptr64
pointer to a default address space when dereferencing.

Bug: https://bugs.llvm.org/show_bug.cgi?id=42359

Reviewers: hans, arsenm, RKSimon

Subscribers: wdng, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D81517
2020-06-26 13:33:54 -07:00
..
GC
GlobalISel Recommit "[X86] Separate imm from relocImm handling." 2020-06-15 10:59:43 -07:00
avx512-shuffles [X86][SSE] Add SimplifyDemandedVectorEltsForTargetShuffle to handle target shuffle variable masks 2020-06-21 11:16:07 +01:00
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addcarry.ll
addcarry2.ll
addr-label-difference.ll
addr-mode-matcher-2.ll
addr-mode-matcher.ll
addr-of-ret-addr.ll
address-type-promotion-constantexpr.ll
addrsig.ll
addsub-constant-folding.ll
adx-commute.mir
adx-intrinsics-upgrade.ll
adx-intrinsics.ll
aes_intrinsics.ll
alias-gep.ll
alias-static-alloca.ll
aliases.ll
align-branch-boundary-default.ll Add missing triples to tests in 0c29d3ff22 so they target the right arch. 2020-01-13 15:58:49 +01:00
align-branch-boundary-noautopadding.ll [BranchAlign] Compiler support for suppressing branch align 2020-01-08 10:03:30 -08:00
align-branch-boundary-suppressions-tls.ll [X86][BranchAlign] Suppress branch alignment for {,_}__tls_get_addr 2020-01-18 18:14:51 -08:00
align-branch-boundary-suppressions.ll Use 15 byte long nops on modern Intel processors 2020-03-13 10:51:09 -07:00
align-down-const.ll
align-down.ll
aligned-comm.ll
aligned-variadic.ll
alignment-2.ll
alignment.ll
all-ones-vector.ll
alldiv-divdi3.ll
alloca-align-rounding-32.ll
alloca-align-rounding.ll
alloca-overaligned.ll
allrem-moddi3.ll
and-encoding.ll
and-load-fold.ll
and-or-fold.ll
and-sink.ll
and-su.ll
andimm8.ll
anyext.ll
anyregcc-crash.ll
anyregcc.ll
apm.ll
arg-cast.ll
arg-copy-elide-win64.ll
arg-copy-elide.ll Reland [X86] Codegen for preallocated 2020-05-20 11:25:44 -07:00
arg_returned_bitcast.ll
asm-block-labels.ll
asm-global-imm.ll
asm-indirect-mem.ll
asm-invalid-register-class-crasher.ll
asm-label.ll
asm-label2.ll
asm-mismatched-types.ll
asm-modifier-P.ll
asm-modifier.ll [tests] Revert unhelpful change from d73eed42d1 2020-04-30 22:18:54 -04:00
asm-modifier2.ll [tests] Speculative fix for buildbot breakage from c5f7c039ef 2020-04-30 22:04:53 -04:00
asm-reg-type-mismatch-avx512.ll
asm-reg-type-mismatch.ll
asm-reject-reg-type-mismatch.ll [X86] Only allow f32, f64, or f80 to be used with 'f' inline assembly constraint. 2020-05-13 13:27:13 -07:00
asm-reject-rex.ll
asm-reject-vk32-vk64.ll
asm-reject-xmm16.ll
atom-call-reg-indirect-foldedreload32.ll
atom-call-reg-indirect-foldedreload64.ll
atom-call-reg-indirect.ll
atom-cmpb.ll
atom-fixup-lea1.ll
atom-fixup-lea2.ll
atom-fixup-lea3.ll
atom-fixup-lea4.ll
atom-lea-addw-bug.ll
atom-lea-sp.ll
atom-pad-short-functions.ll
atom-sched.ll
atom-shuf.ll
atomic-add.ll
atomic-dagsched.ll
atomic-eflags-reuse.ll
atomic-flags.ll
atomic-fp.ll [X86] Enable the use of movlps for i64 atomic load on 32-bit targets with sse1. 2020-02-23 15:11:38 -08:00
atomic-idempotent.ll [X86] X86CallFrameOptimization - generalize slow push code path 2020-03-29 11:01:59 +01:00
atomic-load-store-wide.ll [X86] Use FIST for i64 atomic stores on 32-bit targets without SSE. 2020-02-23 15:11:38 -08:00
atomic-load-store.ll
atomic-mi.ll [X86] Use FIST for i64 atomic stores on 32-bit targets without SSE. 2020-02-23 15:11:38 -08:00
atomic-minmax-i6432.ll
atomic-monotonic.ll
atomic-non-integer-fp128.ll
atomic-non-integer.ll [X86] Enable the use of movlps for i64 atomic load on 32-bit targets with sse1. 2020-02-23 15:11:38 -08:00
atomic-op.ll
atomic-ops-ancient-64.ll
atomic-or.ll
atomic-pointer.ll
atomic-unordered.ll RegAllocFast: Record internal state based on register units 2020-06-03 16:51:46 -04:00
atomic8.ll
atomic16.ll
atomic32.ll RegAllocFast: Record internal state based on register units 2020-06-03 16:51:46 -04:00
atomic64.ll RegAllocFast: Record internal state based on register units 2020-06-03 16:51:46 -04:00
atomic128.ll
atomic6432.ll
atomicf128.ll Revert "[CGP] Enable CodeGenPrepares phi type convertion." 2020-06-22 13:06:18 +02:00
attribute-sections.ll
avg-mask.ll [X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead. 2020-04-15 12:17:18 -07:00
avg.ll [DAG] SimplifyDemandedVectorElts - add EXTRACT_SUBVECTOR SimplifyMultipleUseDemandedBits handling 2020-05-01 13:48:07 +01:00
avoid-lea-scale2.ll
avoid-loop-align-2.ll
avoid-loop-align.ll
avoid-sfb-g-no-change.mir
avoid-sfb-g-no-change2.mir
avoid-sfb-g-no-change3.mir
avoid-sfb-kill-flags.mir
avoid-sfb-offset.mir
avoid-sfb-overlaps.ll
avoid-sfb.ll
avoid_complex_am.ll
avx-arith.ll
avx-basic.ll
avx-bitcast.ll
avx-brcond.ll
avx-cast.ll Revert "[llvm][test] Add COM: directives before colon-less non-CHECKs in comments. NFC" 2020-05-22 05:36:15 -06:00
avx-cmp.ll
avx-cvt-2.ll
avx-cvt-3.ll [DAG] SimplifyDemandedVectorElts - add EXTRACT_SUBVECTOR SimplifyMultipleUseDemandedBits handling 2020-05-01 13:48:07 +01:00
avx-cvt.ll
avx-cvttp2si.ll
avx-fp2int.ll [X86][SSE] lowerShuffleWithPACK - extend to use chained PACKs for larger truncations 2020-04-03 18:26:10 +01:00
avx-gfni-intrinsics.ll
avx-insertelt.ll
avx-intel-ocl.ll
avx-intrinsics-fast-isel.ll [x86] allow peeking through an extract_subvector to find a splatted operand 2020-02-20 13:59:59 -05:00
avx-intrinsics-x86-upgrade.ll [X86] Enable shuffle combining for AVX512 unless the root is used by a vselect 2020-04-11 20:05:10 -07:00
avx-intrinsics-x86.ll
avx-intrinsics-x86_64.ll
avx-isa-check.ll
avx-load-store.ll RegAllocFast: Record internal state based on register units 2020-06-03 16:51:46 -04:00
avx-logic.ll
avx-minmax.ll
avx-select.ll
avx-shift.ll [DAGCombiner] sink target-supported FP<->int cast op after concat vectors 2020-05-06 10:25:58 -04:00
avx-shuffle-x86_32.ll
avx-splat.ll [x86] allow peeking through an extract_subvector to find a splatted operand 2020-02-20 13:59:59 -05:00
avx-trunc.ll
avx-unpack.ll [X86][AVX] Use lowerShuffleAsLanePermuteAndSHUFP to lower binary v4f64 shuffles. 2020-01-12 12:29:41 +00:00
avx-varargs-x86_64.ll
avx-vbroadcast.ll
avx-vbroadcastf128.ll
avx-vextractf128.ll
avx-vinsertf128.ll
avx-vpclmulqdq.ll
avx-vperm2x128.ll [X86][AVX] Use X86ISD::VPERM2X128 for blend-with-zero if optimizing for size 2020-05-12 13:03:50 +01:00
avx-vzeroupper.ll [llvm] Fix missing FileCheck directive colons 2020-04-06 09:59:08 -06:00
avx-win64-args.ll
avx-win64.ll
avx.ll
avx1-logical-load-folding.ll
avx2-arith.ll [x86] favor vector constant load to avoid GPR to XMM transfer, part 2 2020-05-25 08:01:48 -04:00
avx2-cmp.ll
avx2-conversions.ll [X86][SSE] Add SimplifyDemandedVectorEltsForTargetShuffle to handle target shuffle variable masks 2020-06-21 11:16:07 +01:00
avx2-fma-fneg-combine.ll
avx2-gather.ll
avx2-intrinsics-canonical.ll
avx2-intrinsics-fast-isel.ll
avx2-intrinsics-x86-upgrade.ll
avx2-intrinsics-x86.ll
avx2-logic.ll
avx2-masked-gather.ll [X86] SimplifyMultipleUseDemandedBitsForTargetNode - add initial X86ISD::VSRAI handling. 2020-05-24 16:07:46 +01:00
avx2-nontemporal.ll
avx2-phaddsub.ll
avx2-pmovxrm.ll
avx2-shift.ll [X86][SSE] Add SimplifyDemandedVectorEltsForTargetShuffle to handle target shuffle variable masks 2020-06-21 11:16:07 +01:00
avx2-vbroadcast.ll [SelectionDAG] Don't promote the alignment of allocas beyond the stack alignment. 2020-05-11 17:39:00 -07:00
avx2-vbroadcasti128.ll
avx2-vector-shifts.ll [X86][SSE] Add SimplifyDemandedVectorEltsForTargetShuffle to handle target shuffle variable masks 2020-06-21 11:16:07 +01:00
avx2-vperm.ll
avx512-adc-sbb.ll
avx512-any_extend_load.ll
avx512-arith.ll [X86] Move combineIncDecVector logic from Select to PreprocessISelDAG. 2020-02-15 09:59:12 -08:00
avx512-broadcast-unfold.ll
avx512-bugfix-23634.ll
avx512-bugfix-25270.ll
avx512-bugfix-26264.ll
avx512-build-vector.ll
avx512-calling-conv.ll [X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead. 2020-04-15 12:17:18 -07:00
avx512-cmp-kor-sequence.ll
avx512-cmp-mask.ll
avx512-cmp.ll [LegalizeVectorOps] Improve handling of multi-result operations. 2020-01-10 10:14:58 -08:00
avx512-cvt.ll [X86] Enable shuffle combining for AVX512 unless the root is used by a vselect 2020-04-11 20:05:10 -07:00
avx512-cvttp2i.ll
avx512-ext.ll [X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead. 2020-04-15 12:17:18 -07:00
avx512-extract-subvector-load-store.ll [SelectionDAG] Unify scalarizeVectorLoad and VectorLegalizer::ExpandLoad 2020-05-02 15:18:10 -07:00
avx512-extract-subvector.ll
avx512-fma-commute.ll
avx512-fma-intrinsics-upgrade.ll [X86] Print k-mask in FMA3 comments. 2020-04-12 13:16:53 -07:00
avx512-fma-intrinsics.ll [X86] Print k-mask in FMA3 comments. 2020-04-12 13:16:53 -07:00
avx512-fma.ll [X86] Print k-mask in FMA3 comments. 2020-04-12 13:16:53 -07:00
avx512-fsel.ll
avx512-gather-scatter-intrin-deprecated.ll
avx512-gather-scatter-intrin.ll
avx512-gfni-intrinsics.ll [X86] Split more masked instruction tests to enable D60940. 2020-03-25 21:18:27 -07:00
avx512-hadd-hsub.ll
avx512-i1test.ll
avx512-inc-dec.ll
avx512-insert-extract.ll [CodeGen] Ensure callers of CreateStackTemporary use sensible alignments 2020-06-09 08:10:17 +01:00
avx512-insert-extract_i1.ll
avx512-intel-ocl.ll [SelectionDAG] Don't promote the alignment of allocas beyond the stack alignment. 2020-05-11 17:39:00 -07:00
avx512-intrinsics-canonical.ll [X86] Print k-mask in FMA3 comments. 2020-04-12 13:16:53 -07:00
avx512-intrinsics-fast-isel.ll [X86][AVX] Reduce unary target shuffles width if the upper elements aren't demanded. 2020-05-31 20:19:24 +01:00
avx512-intrinsics-upgrade.ll [X86] Enable masked GPR broadcasts to be formed even if the broadcast has more than one use. 2020-06-10 12:42:44 -07:00
avx512-intrinsics-x86_64.ll
avx512-intrinsics.ll [X86][AVX512] Avoid bitcasts between scalar and vXi1 bool vectors 2020-06-11 10:22:55 +01:00
avx512-load-store.ll
avx512-load-trunc-store-i1.ll
avx512-logic.ll [X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead. 2020-04-15 12:17:18 -07:00
avx512-mask-op.ll [X86] Correct some isel patterns for v1i1 KNOT/KANDN/KXNOR. 2020-06-06 17:25:56 -07:00
avx512-mask-spills.ll
avx512-mask-zext-bugfix.ll RegAllocFast: Record internal state based on register units 2020-06-03 16:51:46 -04:00
avx512-masked-memop-64-32.ll
avx512-masked_memop-16-8.ll [LegalizeTypes][X86] Add a new strategy for type legalizing f16 type that softens it to i16, but promotes to f32 around arithmetic ops. 2020-02-01 11:21:04 -08:00
avx512-memfold.ll [X86] Print k-mask in FMA3 comments. 2020-04-12 13:16:53 -07:00
avx512-mov.ll
avx512-movmsk.ll [X86] Add test file that was supposed to go with D81327. 2020-06-21 20:23:44 -07:00
avx512-nontemporal.ll
avx512-pmovxrm.ll
avx512-regcall-Mask.ll [X86] Convert vXi1 vectors to xmm/ymm/zmm types via getRegisterTypeForCallingConv rather than using CCPromoteToType in the td file 2020-03-04 15:02:32 -08:00
avx512-regcall-NoMask.ll
avx512-rndscale.ll
avx512-rotate.ll [X86] Split more masked instruction tests to enable D60940. 2020-03-25 21:18:27 -07:00
avx512-scalar.ll
avx512-scalarIntrinsics.ll
avx512-scalar_mask.ll [X86] Print k-mask in FMA3 comments. 2020-04-12 13:16:53 -07:00
avx512-select.ll [X86] Correct some isel patterns for v1i1 KNOT/KANDN/KXNOR. 2020-06-06 17:25:56 -07:00
avx512-shift.ll
avx512-skx-insert-subvec.ll
avx512-trunc.ll [X86][SSE] Add SimplifyDemandedVectorEltsForTargetShuffle to handle target shuffle variable masks 2020-06-21 11:16:07 +01:00
avx512-unsafe-fp-math.ll
avx512-vbroadcast.ll
avx512-vbroadcasti128.ll [X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead. 2020-04-15 12:17:18 -07:00
avx512-vbroadcasti256.ll [X86][AVX] Fold extract_subvector(subv_broadcast(x),c) -> (x) 2020-05-24 18:49:39 +01:00
avx512-vec-cmp.ll [X86][SSE] Canonicalize UNARYSHUFFLE(XOR(X,-1) -> XOR(UNARYSHUFFLE(X),-1) 2020-04-30 19:18:51 +01:00
avx512-vec3-crash.ll [X86][SSE] Prefer trunc(movd(x)) to pextrb(x,0) 2020-03-13 18:43:04 +00:00
avx512-vpclmulqdq.ll
avx512-vpermv3-commute.ll
avx512-vpternlog-commute.ll
avx512-vselect-crash.ll
avx512-vselect.ll [X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead. 2020-04-15 12:17:18 -07:00
avx512bf16-intrinsics.ll
avx512bf16-vl-intrinsics.ll
avx512bw-arith.ll
avx512bw-intrinsics-canonical.ll
avx512bw-intrinsics-fast-isel.ll
avx512bw-intrinsics-upgrade.ll [X86] Enable masked GPR broadcasts to be formed even if the broadcast has more than one use. 2020-06-10 12:42:44 -07:00
avx512bw-intrinsics.ll [X86] Split more masked instruction tests to enable D60940. 2020-03-25 21:18:27 -07:00
avx512bw-mask-op.ll [X86] Add isel patterns for bitcasting between v32i1/v64i1 and float/double. 2020-01-08 10:06:01 -08:00
avx512bw-mov.ll
avx512bw-vec-cmp.ll
avx512bw-vec-test-testn.ll
avx512bwvl-arith.ll
avx512bwvl-intrinsics-canonical.ll
avx512bwvl-intrinsics-fast-isel.ll [X86][AVX] Combine shuffles to TRUNCATE/VTRUNC patterns 2020-03-25 17:41:51 +00:00
avx512bwvl-intrinsics-upgrade.ll [X86] Teach combineBitcastvxi1 to prefer movmsk on avx512 in more cases 2020-06-13 14:50:13 -07:00
avx512bwvl-intrinsics.ll [X86] Split more masked instruction tests to enable D60940. 2020-03-25 21:18:27 -07:00
avx512bwvl-mov.ll
avx512bwvl-vec-cmp.ll
avx512bwvl-vec-test-testn.ll
avx512cd-intrinsics-fast-isel.ll
avx512cd-intrinsics-upgrade.ll
avx512cd-intrinsics.ll
avx512cdvl-intrinsics-upgrade.ll [X86] Split more masked instruction tests to enable D60940. 2020-03-25 21:18:27 -07:00
avx512cdvl-intrinsics.ll [X86] Split more masked instruction tests to enable D60940. 2020-03-25 21:18:27 -07:00
avx512dq-intrinsics-fast-isel.ll
avx512dq-intrinsics-upgrade.ll [X86] Split masked instruction tests to enable D60940. 2020-03-24 23:44:16 -07:00
avx512dq-intrinsics.ll [X86] Update more intrinsic tests to prepare to extend D60940 to scalar fp. 2020-03-25 23:03:20 -07:00
avx512dq-mask-op.ll
avx512dqvl-intrinsics-fast-isel.ll
avx512dqvl-intrinsics-upgrade.ll [X86] Teach combineBitcastvxi1 to prefer movmsk on avx512 in more cases 2020-06-13 14:50:13 -07:00
avx512dqvl-intrinsics.ll [X86] Split more masked instruction tests to enable D60940. 2020-03-25 21:18:27 -07:00
avx512er-intrinsics.ll
avx512f-256-set0.mir
avx512f-vec-test-testn.ll
avx512ifma-intrinsics-fast-isel.ll
avx512ifma-intrinsics-upgrade.ll [X86] Split more masked instruction tests to enable D60940. 2020-03-25 21:18:27 -07:00
avx512ifma-intrinsics.ll [X86] Split more masked instruction tests to enable D60940. 2020-03-25 21:18:27 -07:00
avx512ifmavl-intrinsics-fast-isel.ll
avx512ifmavl-intrinsics-upgrade.ll [X86] Split more masked instruction tests to enable D60940. 2020-03-25 21:18:27 -07:00
avx512ifmavl-intrinsics.ll [X86] Split more masked instruction tests to enable D60940. 2020-03-25 21:18:27 -07:00
avx512vbmi-intrinsics-fast-isel.ll
avx512vbmi-intrinsics-upgrade.ll [X86] Split masked instruction tests to enable D60940. 2020-03-24 23:44:16 -07:00
avx512vbmi-intrinsics.ll [X86] Split masked instruction tests to enable D60940. 2020-03-24 23:44:16 -07:00
avx512vbmi2-funnel-shifts.ll [DAG] MatchRotate - Add funnel shift by immediate support 2020-03-11 18:55:18 +00:00
avx512vbmi2-intrinsics-fast-isel.ll
avx512vbmi2-intrinsics-upgrade.ll [X86] Split more masked instruction tests to enable D60940. 2020-03-25 21:18:27 -07:00
avx512vbmi2-intrinsics.ll [X86] Split more masked instruction tests to enable D60940. 2020-03-25 21:18:27 -07:00
avx512vbmi2vl-funnel-shifts.ll [DAG] MatchRotate - Add funnel shift by immediate support 2020-03-11 18:55:18 +00:00
avx512vbmi2vl-intrinsics-fast-isel.ll
avx512vbmi2vl-intrinsics-upgrade.ll [X86] Split more masked instruction tests to enable D60940. 2020-03-25 21:18:27 -07:00
avx512vbmi2vl-intrinsics.ll [X86] Split more masked instruction tests to enable D60940. 2020-03-25 21:18:27 -07:00
avx512vbmivl-intrinsics-fast-isel.ll
avx512vbmivl-intrinsics-upgrade.ll [X86] Split masked instruction tests to enable D60940. 2020-03-24 23:44:16 -07:00
avx512vbmivl-intrinsics.ll [X86] Split masked instruction tests to enable D60940. 2020-03-24 23:44:16 -07:00
avx512vl-arith.ll
avx512vl-intrinsics-canonical.ll [X86] Print k-mask in FMA3 comments. 2020-04-12 13:16:53 -07:00
avx512vl-intrinsics-fast-isel.ll [X86] Print k-mask in FMA3 comments. 2020-04-12 13:16:53 -07:00
avx512vl-intrinsics-upgrade.ll [X86] Enable masked GPR broadcasts to be formed even if the broadcast has more than one use. 2020-06-10 12:42:44 -07:00
avx512vl-intrinsics.ll [X86] Print k-mask in FMA3 comments. 2020-04-12 13:16:53 -07:00
avx512vl-logic.ll
avx512vl-mov.ll
avx512vl-nontemporal.ll
avx512vl-vbroadcast.ll
avx512vl-vec-cmp.ll
avx512vl-vec-masked-cmp.ll [X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead. 2020-04-15 12:17:18 -07:00
avx512vl-vec-test-testn.ll
avx512vl-vpclmulqdq.ll
avx512vl_vnni-intrinsics-upgrade.ll [X86] Split more masked instruction tests to enable D60940. 2020-03-25 21:18:27 -07:00
avx512vl_vnni-intrinsics.ll [X86] Split more masked instruction tests to enable D60940. 2020-03-25 21:18:27 -07:00
avx512vlcd-intrinsics-fast-isel.ll
avx512vlvp2intersect-intrinsics.ll
avx512vnni-intrinsics-upgrade.ll [X86] Split more masked instruction tests to enable D60940. 2020-03-25 21:18:27 -07:00
avx512vnni-intrinsics.ll [X86] Split more masked instruction tests to enable D60940. 2020-03-25 21:18:27 -07:00
avx512vnni.ll
avx512vp2intersect-intrinsics.ll
avx512vpopcntdq-intrinsics.ll
backpropmask.ll
bad-tls-fold.mir
barrier-sse.ll
barrier.ll
base-pointer-and-cmpxchg.ll
basic-promote-integers.ll
basicblock-sections-clusters-branches.ll Descriptive symbol names for machine basic block sections. 2020-05-04 19:06:43 +00:00
basicblock-sections-clusters-eh.ll Descriptive symbol names for machine basic block sections. 2020-05-04 19:06:43 +00:00
basicblock-sections-clusters-error.ll Extend BasicBlock sections to allow specifying clusters of basic blocks in the same section. 2020-04-13 12:19:59 -07:00
basicblock-sections-clusters.ll Descriptive symbol names for machine basic block sections. 2020-05-04 19:06:43 +00:00
basicblock-sections-cold.ll Descriptive symbol names for machine basic block sections. 2020-05-04 19:06:43 +00:00
basicblock-sections-directjumps.ll Descriptive symbol names for machine basic block sections. 2020-05-04 19:06:43 +00:00
basicblock-sections-eh.ll Descriptive symbol names for machine basic block sections. 2020-05-04 19:06:43 +00:00
basicblock-sections-labels.ll Basic Block Sections support in LLVM. 2020-03-16 16:06:54 -07:00
basicblock-sections-list.ll Descriptive symbol names for machine basic block sections. 2020-05-04 19:06:43 +00:00
basicblock-sections-listbb.ll Descriptive symbol names for machine basic block sections. 2020-05-04 19:06:43 +00:00
basicblock-sections-mir-parse.mir Descriptive symbol names for machine basic block sections. 2020-05-04 19:06:43 +00:00
basicblock-sections-mir-print.ll Extend BasicBlock sections to allow specifying clusters of basic blocks in the same section. 2020-04-13 12:19:59 -07:00
basicblock-sections.ll Descriptive symbol names for machine basic block sections. 2020-05-04 19:06:43 +00:00
bb_rotate.ll
bc-extract.ll
bigstructret.ll
bigstructret2.ll
bit-piece-comment.ll
bit-test-shift.ll
bitcast-and-setcc-128.ll [X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source 2020-04-28 15:11:32 -07:00
bitcast-and-setcc-256.ll [X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source 2020-04-28 15:11:32 -07:00
bitcast-and-setcc-512.ll [X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source 2020-04-28 15:11:32 -07:00
bitcast-i256.ll
bitcast-int-to-vector-bool-sext.ll [X86] Teach combineToExtendBoolVectorInReg to create opportunities for using broadcast load instructions. 2020-03-09 11:26:12 -07:00
bitcast-int-to-vector-bool-zext.ll [X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead. 2020-04-15 12:17:18 -07:00
bitcast-int-to-vector-bool.ll [X86] Teach combineToExtendBoolVectorInReg to create opportunities for using broadcast load instructions. 2020-03-09 11:26:12 -07:00
bitcast-int-to-vector.ll
bitcast-mmx.ll
bitcast-setcc-128.ll [X86][SSE] Add SimplifyDemandedVectorEltsForTargetShuffle to handle target shuffle variable masks 2020-06-21 11:16:07 +01:00
bitcast-setcc-256.ll [X86] Teach combineBitcastvxi1 to prefer movmsk on avx512 in more cases 2020-06-13 14:50:13 -07:00
bitcast-setcc-512.ll [X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source 2020-04-28 15:11:32 -07:00
bitcast-vector-bool.ll [X86] Add an AVX check prefix to bitcast-vector-bool.ll to combine checks where AVX1/2/512 are all the same. NFC 2020-06-21 20:30:17 -07:00
bitcast.ll
bitcast2.ll
bitcnt-false-dep.ll
bitreverse.ll [X86][SSE] lowerShuffleAsBitRotate - lower to vXi8 shuffles to ROTL on pre-SSSE3 targets 2020-02-14 11:55:18 +00:00
block-placement.ll Revert "Include static prof data when collecting loop BBs" 2020-03-24 09:41:16 -07:00
block-placement.mir
bmi-intrinsics-fast-isel-x86_64.ll
bmi-intrinsics-fast-isel.ll
bmi-x86_64.ll
bmi.ll
bmi2-x86_64.ll [X86] Restore selection of MULX on BMI2 targets. 2020-05-27 12:01:18 -07:00
bmi2.ll [X86] Restore selection of MULX on BMI2 targets. 2020-05-27 12:01:18 -07:00
bool-ext-inc.ll
bool-math.ll
bool-simplify.ll
bool-vector.ll
bool-zext.ll
br-fold.ll
branchfolding-catchpads.ll
branchfolding-debug-invariant.mir
branchfolding-debugloc.ll
branchfolding-ehpad.mir Don't jump to landing pads in Control Flow Optimizer 2020-05-21 15:19:10 -07:00
branchfolding-landingpads.ll
branchfolding-undef.mir
brcond.ll
break-anti-dependencies.ll
break-false-dep.ll
broadcast-elm-cross-splat-vec.ll [TargetLowering] SimplifyDemandedVectorElts - add DemandedElts mask to ISD::BITCAST SimplifyDemandedBits call. 2020-03-10 13:39:10 +00:00
broadcastm-lowering.ll [X86] Make (insert_vector_elt (v8i16 zerovec), i16 %x, 0) generate the same code as (v8i16 (build_vector %x, 0, 0, 0, 0, 0, 0, 0)). 2020-02-09 21:52:11 -08:00
bss_pagealigned.ll
bswap-inline-asm.ll
bswap-rotate.ll
bswap-vector.ll [X86][SSE] lowerShuffleAsBitRotate - lower to vXi8 shuffles to ROTL on pre-SSSE3 targets 2020-02-14 11:55:18 +00:00
bswap-wide-int.ll
bswap.ll
bswap_tree.ll
bswap_tree2.ll
bt.ll
btc_bts_btr.ll
btq.ll
bug26810.ll
bug37521.ll
bug80500.ll [X86] Fix a typo error. 2020-06-25 10:06:27 +08:00
build-vector-128.ll [X86][SSE] combineX86ShuffleChain - combine INSERT_VECTOR_ELT patterns to INSERTPS 2020-06-12 11:59:01 +01:00
build-vector-256.ll
build-vector-512.ll
buildvec-extract.ll [X86][SSE] getFauxShuffle - support insert(truncate/extend(extract(vec0,c0)),vec1,c1) shuffle patterns at the byte level 2020-04-26 15:31:01 +01:00
buildvec-insertvec.ll [X86][SSE] getFauxShuffle - support insert(truncate/extend(extract(vec0,c0)),vec1,c1) shuffle patterns at the byte level 2020-04-26 15:31:01 +01:00
bypass-slow-division-32.ll
bypass-slow-division-64.ll
bypass-slow-division-tune.ll [x86] Enable bypassing 64-bit division on generic x86-64 2020-04-29 16:55:48 +01:00
byval-align.ll
byval-callee-cleanup.ll
byval.ll
byval2.ll
byval3.ll
byval4.ll
byval5.ll
byval6.ll
byval7.ll
cache-intrinsic.ll
call-imm.ll
call-push.ll
call-site-info-output.ll Reland D73534: [DebugInfo] Enable the debug entry values feature by default 2020-03-19 13:57:30 +01:00
callbr-asm-bb-exports.ll
callbr-asm-blockplacement.ll
callbr-asm-branch-folding.ll Specify branch probabilities for callbr dests 2020-03-11 20:33:48 -07:00
callbr-asm-destinations.ll
callbr-asm-errors.ll
callbr-asm-label-addr.ll
callbr-asm-obj-file.ll [X86InstPrinter] Change printPCRelImm to print the target address in hexadecimal form 2020-03-26 08:28:59 -07:00
callbr-asm-outputs-pred-succ.ll [SelectionDAG] fix predecessor list for INLINEASM_BRs' parent 2020-04-06 13:46:39 -07:00
callbr-asm-outputs.ll [SelectionDAG] fix predecessor list for INLINEASM_BRs' parent 2020-04-06 13:46:39 -07:00
callbr-asm.ll Specify branch probabilities for callbr dests 2020-03-11 20:33:48 -07:00
callbr-codegenprepare.ll Change callbr to only define its output SSA variable on the normal 2020-04-23 19:36:44 -04:00
cas.ll
cast-vsel.ll [X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases. 2020-05-09 12:19:30 -07:00
catch.ll
catchpad-dynamic-alloca.ll
catchpad-lifetime.ll [WinEH] Re-run stack coloring test for i686 2020-01-27 15:26:03 -08:00
catchpad-realign-savexmm.ll
catchpad-regmask.ll
catchpad-reuse.ll
catchpad-weight.ll
catchret-empty-fallthrough.ll
catchret-fallthrough.ll
catchret-regmask.ll
cf-opt-memops.mir [x86] Propagate memory operands during call frame optimization 2020-05-28 17:45:53 +02:00
cfguard-checks.ll Add support for __declspec(guard(nocf)) 2020-01-10 16:04:12 +00:00
cfguard-module-flag.ll
cfguard-x86-64-vectorcall.ll
cfguard-x86-vectorcall.ll
cfi-epilogue-with-return.mir Recommit "Generate Callee Saved Register (CSR) related cfi directives 2020-04-27 12:46:58 -07:00
cfi-epilogue-without-return.mir Recommit "Generate Callee Saved Register (CSR) related cfi directives 2020-04-27 12:46:58 -07:00
cfi-inserter-callee-save-register-2.mir Recommit "Generate Callee Saved Register (CSR) related cfi directives 2020-04-27 12:46:58 -07:00
cfi-inserter-callee-save-register.mir Recommit "Generate Callee Saved Register (CSR) related cfi directives 2020-04-27 12:46:58 -07:00
cfi-inserter-cfg-with-merge.mir
cfi-inserter-check-order.ll
cfi-inserter-noreturnblock.mir
cfi-inserter-verify-inconsistent-csr.mir Recommit "Generate Callee Saved Register (CSR) related cfi directives 2020-04-27 12:46:58 -07:00
cfi-inserter-verify-inconsistent-loc.mir Recommit "Generate Callee Saved Register (CSR) related cfi directives 2020-04-27 12:46:58 -07:00
cfi-inserter-verify-inconsistent-offset.mir Revert "Revert "Reland "[Support] make report_fatal_error `abort` instead of `exit`""" 2020-02-13 10:16:06 -08:00
cfi-inserter-verify-inconsistent-register.mir Revert "Revert "Reland "[Support] make report_fatal_error `abort` instead of `exit`""" 2020-02-13 10:16:06 -08:00
cfi-xmm.ll
cfi.ll
cfstring.ll
cgp-usubo.ll
chain_order.ll
change-compare-stride-1.ll
change-compare-stride-trickiness-0.ll
change-compare-stride-trickiness-1.ll
change-compare-stride-trickiness-2.ll
change-unsafe-fp-math.ll
cldemote-intrinsic.ll
cleanuppad-inalloca.ll
cleanuppad-large-codemodel.ll
cleanuppad-realign.ll
clear-bitfield.ll [DAGCombiner] Add command line options to guard store width reduction 2020-05-29 09:41:41 -07:00
clear-highbits.ll [X86] Replace (most) X86ISD::SHLD/SHRD usage with ISD::FSHL/FSHR generic opcodes (PR39467) 2020-03-11 11:17:49 +00:00
clear-lowbits.ll [X86] Replace (most) X86ISD::SHLD/SHRD usage with ISD::FSHL/FSHR generic opcodes (PR39467) 2020-03-11 11:17:49 +00:00
clear_upper_vector_element_bits.ll [SelectionDAG] Unify scalarizeVectorLoad and VectorLegalizer::ExpandLoad 2020-05-02 15:18:10 -07:00
clflushopt.ll
clwb.ll Revert "Revert "Reland "[Support] make report_fatal_error `abort` instead of `exit`""" 2020-02-13 10:16:06 -08:00
clz.ll [X86] Add cttz/ctlz tests for i686 with CMOV target 2020-03-13 16:51:13 +00:00
clzero.ll
cmov-double.ll
cmov-fp.ll [X86] Don't bother avoiding illegal FCMOVs if we don't have the cmov subtarget feature. 2020-02-21 00:34:15 -08:00
cmov-into-branch.ll [PGO][PGSO] Update BFI in CodeGenPrepare::optimizeSelectInst. 2020-01-22 08:36:54 -08:00
cmov-promotion.ll
cmov.ll
cmovcmov.ll [DAGCombiner] Don't emit select_cc from visitSINT_TO_FP/visitUINT_TO_FP. Use plain select instead. 2020-03-01 10:52:17 -08:00
cmp-fast-isel.ll
cmp.ll
cmpxchg-clobber-flags.ll
cmpxchg-i1.ll
cmpxchg-i128-i1.ll
cmpxchg8b.ll
cmpxchg8b_alloca_regalloc_handling.ll
cmpxchg16b.ll
coal-sections.ll
coalesce-dbg-value-subreg-rewrite.mir
coalesce-dead-lanes.mir
coalesce-esp.ll
coalesce-implicitdef.ll
coalesce_commute_movsd.ll
coalesce_commute_subreg.ll
coalescer-commute1.ll
coalescer-commute2.ll
coalescer-commute3.ll
coalescer-commute4.ll
coalescer-commute5.ll
coalescer-cross.ll
coalescer-dce.ll
coalescer-dce2.ll
coalescer-identity.ll
coalescer-remat.ll
coalescer-subreg.ll
coalescer-win64.ll
code-model-elf-memset.ll
code-model-elf.ll [X86] Fix a nullptr dereference in X86Subtarget::classifyLocalReference when compiling with -mcmodel=medium -fpic and using a constant pool 2020-05-28 17:20:42 -07:00
code-model-kernel.ll
code_placement.ll
code_placement_align_all.ll
code_placement_cold_loop_blocks.ll
code_placement_eh.ll
code_placement_ignore_succ_in_inner_loop.ll
code_placement_loop_rotation.ll
code_placement_loop_rotation2.ll
code_placement_loop_rotation3.ll
code_placement_no_header_change.ll
codegen-prepare-addrmode-sext.ll
codegen-prepare-cast.ll
codegen-prepare-collapse.ll
codegen-prepare-crash.ll
codegen-prepare-extload.ll
codegen-prepare-replacephi.mir
codegen-prepare-replacephi2.mir
codegen-prepare-uaddo.ll
codegen-prepare.ll
codemodel.ll Revert "Revert "Reland "[Support] make report_fatal_error `abort` instead of `exit`""" 2020-02-13 10:16:06 -08:00
coff-comdat.ll
coff-comdat2.ll Revert "Revert "Reland "[Support] make report_fatal_error `abort` instead of `exit`""" 2020-02-13 10:16:06 -08:00
coff-comdat3.ll Revert "Revert "Reland "[Support] make report_fatal_error `abort` instead of `exit`""" 2020-02-13 10:16:06 -08:00
coff-feat00.ll
coff-fp-section-name.ll
coff-linkonce.ll [AsmPrinter] Emit .weak directive for weak linkage on COFF for symbols without a comdat 2020-03-28 18:48:58 +02:00
coff-no-dead-strip.ll
coff-weak.ll [AsmPrinter] Emit .weak directive for weak linkage on COFF for symbols without a comdat 2020-03-28 18:48:58 +02:00
coldcc64.ll
combine-64bit-vec-binop.ll
combine-abs.ll
combine-adc.ll
combine-add-ssat.ll
combine-add-usat.ll
combine-add.ll
combine-addo.ll
combine-adx.ll
combine-and.ll
combine-avx-intrinsics.ll
combine-avx2-intrinsics.ll
combine-bextr.ll [TargetLowering] SimplifyDemandedBits - add basic KnownBits ZEXTLoad handling 2020-02-03 16:50:04 +00:00
combine-bitreverse.ll
combine-bitselect.ll [X86] Improving folding of concat_vectors of subvectors from the same broadcast 2020-05-01 11:23:10 +01:00
combine-bswap.ll
combine-concatvectors.ll
combine-fabs.ll
combine-fcopysign.ll
combine-lds.ll
combine-movmsk-avx.ll [X86][SSE] combineSetCCMOVMSK - add initial support for allof patterns. 2020-06-07 16:10:13 +01:00
combine-movmsk.ll [X86][SSE] Fold BITOP(MOVMSK(X),MOVMSK(Y)) -> MOVMSK(BITOP(X,Y)) 2020-06-14 21:37:58 +01:00
combine-mul.ll [X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases. 2020-05-09 12:19:30 -07:00
combine-mulo.ll
combine-multiplies.ll
combine-or.ll
combine-pmuldq.ll [DAG] Add SimplifyDemandedVectorElts binop SimplifyMultipleUseDemandedBits handling 2020-05-25 12:41:22 +01:00
combine-ptest.ll [X86][SSE] Convert PTEST to MOVMSK for allsign bits vector results 2020-05-27 11:06:16 +01:00
combine-rotates.ll [TargetLowering] Only demand a rotation's modulo amount bits 2020-03-17 21:23:46 +00:00
combine-sbb.ll
combine-sdiv.ll [DAG] Add SimplifyDemandedVectorElts binop SimplifyMultipleUseDemandedBits handling 2020-05-25 12:41:22 +01:00
combine-select.ll
combine-sext-in-reg.ll
combine-shl.ll [X86][SSE] Add SimplifyDemandedVectorEltsForTargetShuffle to handle target shuffle variable masks 2020-06-21 11:16:07 +01:00
combine-smax.ll
combine-smin.ll
combine-sra.ll [X86][SSE] Add SimplifyDemandedVectorEltsForTargetShuffle to handle target shuffle variable masks 2020-06-21 11:16:07 +01:00
combine-srem.ll
combine-srl.ll [X86][SSE] Add SimplifyDemandedVectorEltsForTargetShuffle to handle target shuffle variable masks 2020-06-21 11:16:07 +01:00
combine-sse41-intrinsics.ll
combine-sub-ssat.ll
combine-sub-usat.ll
combine-sub.ll
combine-subo.ll
combine-testm-and.ll
combine-testpd.ll [X86][SSE] combinePTESTCC - fold TESTZ(X,~Y) -> TESTC(Y,X) 2020-04-01 15:10:53 +01:00
combine-testps.ll [X86][SSE] combinePTESTCC - fold TESTZ(X,~Y) -> TESTC(Y,X) 2020-04-01 15:10:53 +01:00
combine-udiv.ll [x86] favor vector constant load to avoid GPR to XMM transfer, part 2 2020-05-25 08:01:48 -04:00
combine-umax.ll
combine-umin.ll
combine-urem.ll
combineIncDecVector-crash.ll [Tests] Update a few more statepoint tests 2020-05-28 15:17:21 -07:00
commandline-metadata.ll
commute-3dnow.ll
commute-blend-avx2.ll
commute-blend-sse41.ll
commute-clmul.ll
commute-fcmp.ll
commute-intrinsic.ll
commute-two-addr.ll
commute-vpclmulqdq-avx.ll
commute-vpclmulqdq-avx512.ll
commute-xop.ll
commuted-blend-mask.ll
compact-unwind.ll [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
compare-add.ll
compare-global.ll
compare-inf.ll
compare_folding.ll
compiler_used.ll
complex-asm.ll
complex-fastmath.ll
complex-fca.ll
computeKnownBits_urem.ll
concat-cast.ll [X86] Add AVX512VL concat-cast tests. 2020-05-07 15:08:17 +01:00
condbr_if.ll
condbr_switch.ll
conditional-indecrement.ll
conditional-tailcall-pgso.ll
conditional-tailcall-samedest.mir
conditional-tailcall.ll
consecutive-load-shuffle.ll
const-base-addr.ll
const-shift-of-constmasked.ll [DAG] MatchRotate - Add funnel shift by immediate support 2020-03-11 18:55:18 +00:00
constant-combines.ll [Codegen] Revert rL354676/rL354677 and followups - introduced PR43446 miscompile 2020-02-25 20:30:12 +03:00
constant-hoisting-and.ll
constant-hoisting-bfi.ll
constant-hoisting-cmp.ll
constant-hoisting-optnone.ll
constant-hoisting-shift-immediate.ll
constant-pool-remat-0.ll
constant-pool-sharing.ll
constpool.ll
constrained-fp80-trunc-ext.ll Insert wait instruction after X87 instructions which could raise 2020-01-16 12:12:51 +08:00
constructor.ll [X86] Reland D71360 Clean up UseInitArray initialization for X86ELFTargetObjectFile 2020-03-20 21:57:34 -07:00
convert-2-addr-3-addr-inc64.ll
convertphitype.ll [CGP] Convert phi types 2020-06-21 15:54:17 +01:00
copy-eflags-liveinlists.mir [X86] Remove EFLAGS from live-in lists in X86FlagsCopyLowering. 2020-01-08 16:36:03 -08:00
copy-eflags.ll [X86] Add a DAG combine for (i32 (sext (i8 (x86isd::setcc_carry)))) -> (i32 (x86isd::setcc_carry)) and remove isel patterns. 2020-02-04 22:40:36 -08:00
copy-propagation.ll
copysign-constant-magnitude.ll [AsmPrinter] Print FP constant in hexadecimal form instead 2020-02-07 16:00:55 +00:00
cpus-amd-no-x86_64.ll Revert "Revert "Reland "[Support] make report_fatal_error `abort` instead of `exit`""" 2020-02-13 10:16:06 -08:00
cpus-amd.ll
cpus-intel-no-x86_64.ll Revert "Revert "Reland "[Support] make report_fatal_error `abort` instead of `exit`""" 2020-02-13 10:16:06 -08:00
cpus-intel.ll
cpus-no-x86_64.ll Revert "Revert "Reland "[Support] make report_fatal_error `abort` instead of `exit`""" 2020-02-13 10:16:06 -08:00
cpus-other.ll
crash-O0.ll RegAllocFast: Record internal state based on register units 2020-06-03 16:51:46 -04:00
crash-lre-eliminate-dead-def.ll
crash-nosse.ll
crash.ll
critical-anti-dep-breaker.ll
critical-edge-split-2.ll
cse-add-with-overflow.ll
csr-split.ll
cstring.ll
ctor-priority-coff.ll
ctpop-combine.ll
cvt16.ll [X86] Custom lower ISD::FP16_TO_FP and ISD::FP_TO_FP16 on f16c targets instead of using isel patterns. 2020-02-10 22:01:48 -08:00
cvtv2f32.ll
cxx_tlscc64.ll
dag-fmf-cse.ll
dag-merge-fast-accesses.ll
dag-optnone.ll
dag-rauw-cse.ll
dag-update-nodetomatch.ll
dagcombine-and-setcc.ll
dagcombine-buildvector.ll
dagcombine-cse.ll
dagcombine-select.ll [X86] Prevent LowerSELECT from causing suboptimal codegen for __builtin_ffs(X) - 1. 2020-06-08 11:46:56 -07:00
dagcombine-shifts.ll
dagcombine-tokenfactor-limit-crash.ll
dagcombine-unsafe-math.ll
darwin-bzero.ll
darwin-no-dead-strip.ll
darwin-preemption.ll
darwin-quote.ll
darwin-tls.ll
dbg-baseptr.ll
dbg-changes-codegen-branch-folding.ll
dbg-changes-codegen-branch-folding2.mir
dbg-changes-codegen.ll
dbg-combine.ll
dbg-line-0-no-discriminator.ll
dbg-value-func-arg.ll Revert "[DebugInfo] Remove some users of DBG_VALUEs IsIndirect field" 2020-02-06 14:41:40 +00:00
dbg-value-superreg-copy.mir
debug-loclists-lto.ll
debug-loclists.ll [DebugInfo] Report the format of location and range lists [9/10] 2020-06-02 17:55:31 +07:00
debug-nodebug-crash.ll
debuginfo-locations-dce.ll
debugloc-argsize.ll
debugloc-no-line-0.ll
deopt-bundles.ll
deopt-intrinsic-cconv.ll
deopt-intrinsic.ll
disable-shrink-store.ll [DAGCombiner] Add command line options to guard store width reduction 2020-05-29 09:41:41 -07:00
disable-tail-calls.ll
discontiguous-loops.ll
discriminate-mem-ops-missing-info.ll
discriminate-mem-ops-skip-pfetch.ll
discriminate-mem-ops.ll
div-rem-pair-recomposition-signed.ll [X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases. 2020-05-09 12:19:30 -07:00
div-rem-pair-recomposition-unsigned.ll [X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases. 2020-05-09 12:19:30 -07:00
div-rem-simplify.ll
div8.ll
divide-by-constant.ll
divide-windows-itanium.ll
divrem.ll
divrem8_ext.ll
dllexport-x86_64.ll [AsmPrinter] Emit .weak directive for weak linkage on COFF for symbols without a comdat 2020-03-28 18:48:58 +02:00
dllexport.ll [AsmPrinter] Emit .weak directive for weak linkage on COFF for symbols without a comdat 2020-03-28 18:48:58 +02:00
dllimport-x86_64.ll
dllimport.ll
dollar-name.ll
domain-reassignment-implicit-def.ll
domain-reassignment-test.ll
domain-reassignment.mir
dont-remove-empty-preheader.ll [CodeGenPrepare] Make TargetPassConfig required 2020-02-02 09:28:45 -08:00
dont-trunc-store-double-to-float.ll
dropped_constructor.ll
dtor-priority-coff.ll
dwarf-comp-dir.ll
dwarf-eh-prepare.ll
dwarf-headers.ll [DebugInfo] Separate fields with commas in headers of type units (3/3). 2020-06-01 17:40:28 +07:00
dwarf-split-line-1.ll [DebugInfo] Separate fields with commas in headers of type units (3/3). 2020-06-01 17:40:28 +07:00
dwarf-split-line-2.ll
dyn-stackalloc.ll
dyn_alloca_aligned.ll
dynamic-alloca-in-entry.ll
dynamic-alloca-lifetime.ll
dynamic-allocas-VLAs.ll
dynamic-regmask.ll
early-cfi-sections.ll
early-ifcvt-crash.ll
early-ifcvt.ll
eh-frame-unreachable.ll
eh-label.ll
eh-nolandingpads.ll
eh-null-personality.ll
eh-unknown.ll
eh_frame.ll
eip-addressing-i386.ll
element-wise-atomic-memory-intrinsics.ll
elf-associated.ll
elf-comdat.ll
elf-comdat2.ll
emit-big-cst.ll [AsmPrinter] Fix emission of non-standard integer constants for BE targets 2020-04-27 14:57:29 -07:00
empty-function.ll
empty-functions.ll
empty-struct-return-type.ll
emutls-pic.ll
emutls-pie.ll
emutls.ll [AsmPrinter] Don't generate .Lfoo$local for -fno-PIC and -fPIE 2020-05-25 23:35:49 -07:00
emutls_generic.ll
enqcmd-intrinsics.ll
epilogue-cfi-fp.ll
epilogue-cfi-no-fp.ll
epilogue.ll
equiv_with_fndef.ll Revert "Revert "Reland "[Support] make report_fatal_error `abort` instead of `exit`""" 2020-02-13 10:16:06 -08:00
equiv_with_vardef.ll Revert "Revert "Reland "[Support] make report_fatal_error `abort` instead of `exit`""" 2020-02-13 10:16:06 -08:00
evex-to-vex-compress.mir [X86] Fix a few issues in the evex-to-vex-compress.mir test. 2020-05-02 18:02:12 -07:00
exception-label.ll
exedeps-movq.ll
exedepsfix-broadcast.ll
expand-integer-x86_64-intrinsic-error.ll Revert "Revert "Reland "[Support] make report_fatal_error `abort` instead of `exit`""" 2020-02-13 10:16:06 -08:00
expand-opaque-const.ll
expand-post-ra-pseudo.mir
expand-vr64-gr64-copy.mir
explicit-section-mergeable.ll [MC][ELF] Put explicit section name symbols into entry size compatible sections 2020-04-16 19:12:49 +00:00
extend-set-cc-uses-dbg.ll RegAllocFast: Record internal state based on register units 2020-06-03 16:51:46 -04:00
extend.ll
extended-fma-contraction.ll [X86] X86InstComments - add FMA4 comments 2020-02-08 17:02:00 +00:00
extern_weak.ll
extmul64.ll
extmul128.ll
extract-bits.ll [X86] Replace (most) X86ISD::SHLD/SHRD usage with ISD::FSHL/FSHR generic opcodes (PR39467) 2020-03-11 11:17:49 +00:00
extract-combine.ll
extract-concat.ll [X86][SSE] getFauxShuffle - support insert(truncate/extend(extract(vec0,c0)),vec1,c1) shuffle patterns at the byte level 2020-04-26 15:31:01 +01:00
extract-extract.ll
extract-fp.ll
extract-insert.ll
extract-lowbits.ll [X86] Replace (most) X86ISD::SHLD/SHRD usage with ISD::FSHL/FSHR generic opcodes (PR39467) 2020-03-11 11:17:49 +00:00
extract-store.ll
extractelement-fp.ll [X86] Custom lower ISD::FROUND with SSE4.1 to avoid a libcall. 2020-01-29 09:10:02 -08:00
extractelement-from-arg.ll
extractelement-index.ll [CodeGen] Ensure callers of CreateStackTemporary use sensible alignments 2020-06-09 08:10:17 +01:00
extractelement-legalization-cycle.ll
extractelement-legalization-store-ordering.ll
extractelement-load.ll [x86] allow peeking through an extract_subvector to find a splatted operand 2020-02-20 13:59:59 -05:00
extractelement-shuffle.ll
extractps.ll
f16c-intrinsics-fast-isel.ll [X86][F16C] Remove cvtph2ps intrinsics and use generic half2float conversion (PR37554) 2020-02-29 18:57:35 +00:00
f16c-intrinsics-upgrade.ll [X86][F16C] Remove cvtph2ps intrinsics and use generic half2float conversion (PR37554) 2020-02-29 18:57:35 +00:00
f16c-intrinsics.ll [X86][F16C] Remove cvtph2ps intrinsics and use generic half2float conversion (PR37554) 2020-02-29 18:57:35 +00:00
fabs.ll
fadd-combines.ll
fast-cc-callee-pops.ll
fast-cc-merge-stack-adj.ll
fast-cc-pass-in-regs.ll
fast-isel-abort-warm.ll
fast-isel-agg-constant.ll
fast-isel-args-fail.ll
fast-isel-args-fail2.ll Revert "Revert "Reland "[Support] make report_fatal_error `abort` instead of `exit`""" 2020-02-13 10:16:06 -08:00
fast-isel-args.ll
fast-isel-atomic.ll
fast-isel-avoid-unnecessary-pic-base.ll
fast-isel-bail.ll
fast-isel-bc.ll
fast-isel-bitcast-crash.ll [X86] Emit a reg-reg copy for fast isel of vector bitcasts. 2020-06-24 20:15:21 -07:00
fast-isel-bitcasts-avx.ll
fast-isel-bitcasts-avx512.ll
fast-isel-bitcasts.ll
fast-isel-branch_weights.ll
fast-isel-call-bool.ll
fast-isel-call-cleanup.ll
fast-isel-call.ll
fast-isel-cmp-branch.ll
fast-isel-cmp-branch2.ll
fast-isel-cmp-branch3.ll
fast-isel-cmp.ll
fast-isel-constant.ll
fast-isel-constpool.ll [X86] Ignore large code model in X86FastISel::X86MaterializeFP in 32-bit mode 2020-05-29 10:39:08 -07:00
fast-isel-constrain-store-indexreg.ll
fast-isel-deadcode.ll
fast-isel-divrem-x86-64.ll
fast-isel-divrem.ll
fast-isel-double-half-convertion.ll
fast-isel-emutls.ll
fast-isel-expect.ll
fast-isel-extract.ll
fast-isel-float-half-convertion.ll [X86] Use ZERO_EXTEND instead of SIGN_EXTEND in the fast isel handling of convert_from_fp16. 2020-02-14 10:57:12 -08:00
fast-isel-fneg-kill.ll Recommit "[X86] Separate imm from relocImm handling." 2020-06-15 10:59:43 -07:00
fast-isel-fneg.ll
fast-isel-fold-mem.ll
fast-isel-fptrunc-fpext.ll
fast-isel-freeze.ll [DAGCombine] Add basic optimizations for FREEZE in SelDag 2020-03-27 12:20:39 +09:00
fast-isel-gc-intrinsics.ll Migrate last batch of tests to gc-live bundle format 2020-06-26 10:28:27 -07:00
fast-isel-gep.ll
fast-isel-gv.ll
fast-isel-i1.ll
fast-isel-int-float-conversion-x86-64.ll
fast-isel-int-float-conversion.ll
fast-isel-load-i1.ll
fast-isel-mem.ll
fast-isel-movsbl-indexreg.ll
fast-isel-nontemporal.ll RegAllocFast: Record internal state based on register units 2020-06-03 16:51:46 -04:00
fast-isel-noplt-pic.ll
fast-isel-ret-ext.ll
fast-isel-select-cmov.ll
fast-isel-select-cmov2.ll
fast-isel-select-cmp.ll
fast-isel-select-pseudo-cmov.ll
fast-isel-select-sse.ll [FPEnv] Invert sense of MIFlag::FPExcept flag 2020-01-10 15:34:50 +01:00
fast-isel-select.ll
fast-isel-sext-zext.ll
fast-isel-sext.ll
fast-isel-shift.ll
fast-isel-sse12-fptoint.ll
fast-isel-stackcheck.ll
fast-isel-store.ll
fast-isel-tailcall.ll
fast-isel-tls.ll
fast-isel-trunc-kill-subreg.ll
fast-isel-uint-float-conversion-x86-64.ll
fast-isel-uint-float-conversion.ll
fast-isel-vecload.ll [X86] Enable the EVEX->VEX compression pass at -O0. 2020-06-13 12:29:04 -07:00
fast-isel-x32.ll
fast-isel-x86-64.ll
fast-isel-x86.ll
fast-isel.ll [SelDag] Add FREEZE 2020-03-24 23:04:58 +09:00
fastcall-correct-mangling.ll
fastcc-2.ll
fastcc-byval.ll
fastcc-sret.ll
fastcc.ll
fastcc3struct.ll
fastisel-gep-promote-before-add.ll
fastisel-softfloat.ll
fastmath-float-half-conversion.ll [X86] Autogenerate complete checks. NFC 2020-02-09 20:39:52 -08:00
fcmove.ll
fcmp-constant.ll [x86] favor vector constant load to avoid GPR to XMM transfer, part 2 2020-05-25 08:01:48 -04:00
fdiv-combine-vec.ll [DAGCombiner] Require ninf for division estimation 2020-06-14 22:58:22 +08:00
fdiv-combine.ll
fdiv.ll [DAGCombiner] Fix non-determinism problem related to argument evaluation order in visitFDIV 2020-03-20 16:11:17 +01:00
fentry-insertion.ll
field-extract-use-trunc.ll
fildll.ll [X86] Swap the 0 and the fudge factor in the constant pool for the 32-bit mode i64->f32/f64/f80 uint_to_fp algorithm. 2020-01-14 17:05:23 -08:00
file-directive.ll
file-source-filename.ll
finite-libcalls.ll No longer generate calls to *_finite 2020-02-28 10:07:37 +01:00
fixed-stack-di-mir.ll
fixup-bw-copy.ll
fixup-bw-copy.mir
fixup-bw-inst.ll
fixup-bw-inst.mir
fixup-lea.ll
flags-copy-lowering.mir [X86] Handle SETB_C32r/SETB_C64r in flag copy lowering the same way we handle SBB 2020-02-07 10:31:19 -08:00
float-asmprint.ll [AsmPrinter] Print FP constant in hexadecimal form instead 2020-02-07 16:00:55 +00:00
float-conv-elim.ll
floor-soft-float.ll
flt-rounds.ll [SelectionDAG][PowerPC][AArch64][X86][ARM] Add chain input and output the ISD::FLT_ROUNDS_ 2020-02-25 16:58:23 -08:00
fltused.ll
fltused_function_pointer.ll
fltused_math.ll
fma-commute-loop.ll [X86][TwoAddressInstructionPass] Teach tryInstructionCommute to continue checking for commutable FMA operands in more cases. 2020-03-01 16:38:08 -08:00
fma-commute-x86.ll Regenerate FMA tests 2020-02-08 15:23:40 +00:00
fma-do-not-commute.ll
fma-fneg-combine-2.ll [X86] X86InstComments - add FMA4 comments 2020-02-08 17:02:00 +00:00
fma-fneg-combine.ll [X86] Print k-mask in FMA3 comments. 2020-04-12 13:16:53 -07:00
fma-intrinsics-canonical.ll
fma-intrinsics-fast-isel.ll
fma-intrinsics-phi-213-to-231.ll Regenerate FMA tests 2020-02-08 15:23:40 +00:00
fma-intrinsics-x86-upgrade.ll
fma-intrinsics-x86.ll
fma-phi-213-to-231.ll
fma-scalar-combine.ll [X86] Print k-mask in FMA3 comments. 2020-04-12 13:16:53 -07:00
fma-scalar-memfold.ll Add missing encoding comments from fma scalar folded intrinsics tests 2020-02-08 15:23:39 +00:00
fma.ll [x86] allow peeking through an extract_subvector to find a splatted operand 2020-02-20 13:59:59 -05:00
fma4-commute-x86.ll [X86] X86InstComments - add FMA4 comments 2020-02-08 17:02:00 +00:00
fma4-fneg-combine.ll [X86] X86InstComments - add FMA4 comments 2020-02-08 17:02:00 +00:00
fma4-intrinsics-x86-upgrade.ll [X86] X86InstComments - add FMA4 comments 2020-02-08 17:02:00 +00:00
fma4-intrinsics-x86.ll [X86] X86InstComments - add FMA4 comments 2020-02-08 17:02:00 +00:00
fma4-intrinsics-x86_64-folded-load.ll [X86] X86InstComments - add FMA4 comments 2020-02-08 17:02:00 +00:00
fma4-scalar-memfold.ll [X86] X86InstComments - add FMA4 comments 2020-02-08 17:02:00 +00:00
fma_patterns.ll [x86][AArch64] add tests for fmul-fma combine; NFC 2020-06-24 15:56:32 -04:00
fma_patterns_wide.ll [X86] X86InstComments - add FMA4 comments 2020-02-08 17:02:00 +00:00
fmaddsub-combine.ll [X86] X86InstComments - add FMA4 comments 2020-02-08 17:02:00 +00:00
fmaxnum.ll [X86][SSE] Add SSE41 coverage for fmaxnum/fminnum tests 2020-03-10 11:18:27 +00:00
fmf-flags.ll [x86] use instruction-level fast-math-flags to drive MachineCombiner 2020-02-27 15:19:37 -05:00
fmf-propagation.ll
fmf-reduction.ll
fminnum.ll [X86][SSE] Add SSE41 coverage for fmaxnum/fminnum tests 2020-03-10 11:18:27 +00:00
fmsubadd-combine.ll
fmul-combines.ll
fnabs.ll
fold-add-pcrel.ll [X86][ELF] Prefer to lower MC_GlobalAddress operands to .Lfoo$local 2020-01-30 17:52:35 -08:00
fold-add.ll
fold-and-shift-x86_64.ll
fold-and-shift.ll
fold-call-2.ll
fold-call-3.ll
fold-call-oper.ll
fold-call.ll
fold-imm.ll
fold-load-binops.ll
fold-load-unops.ll
fold-load-vec.ll
fold-load.ll
fold-mul-lohi.ll
fold-pcmpeqd-1.ll
fold-pcmpeqd-2.ll
fold-push.ll
fold-rmw-ops.ll
fold-sext-trunc.ll
fold-tied-op.ll
fold-vector-bv-crash.ll
fold-vector-sext-crash.ll
fold-vector-sext-crash2.ll
fold-vector-sext-zext.ll
fold-vector-shl-crash.ll
fold-vector-shuffle-crash.ll
fold-vector-trunc-sitofp.ll
fold-vex.ll
fold-xmm-zero.ll
fold-zext-trunc.ll
fops-windows-itanium.ll
force-align-stack-alloca.ll
force-align-stack.ll
fp-arith.ll
fp-cvt.ll [X86] Swap the 0 and the fudge factor in the constant pool for the 32-bit mode i64->f32/f64/f80 uint_to_fp algorithm. 2020-01-14 17:05:23 -08:00
fp-double-rounding.ll
fp-elim-and-no-fp-elim.ll
fp-elim.ll llc: Don't overwrite frame-pointer attribute 2020-01-15 20:56:46 -05:00
fp-fast.ll
fp-fold.ll
fp-immediate-shorten.ll [AsmPrinter] Print FP constant in hexadecimal form instead 2020-02-07 16:00:55 +00:00
fp-in-intregs.ll
fp-intrinsics-flags-x86_64.ll [FPEnv] Invert sense of MIFlag::FPExcept flag 2020-01-10 15:34:50 +01:00
fp-intrinsics-flags.ll [SelectionDAGBuilder][FPEnv] Take into account SelectionDAG continuous CSE when setting the nofpexcept flag for constrained intrinsics 2020-03-18 13:37:17 -07:00
fp-intrinsics-fma.ll [X86] X86InstComments - add FMA4 comments 2020-02-08 17:02:00 +00:00
fp-intrinsics.ll [X86] Fix errors in use of strictfp attribute. 2020-05-29 12:31:55 -04:00
fp-load-trunc.ll
fp-logic-replace.ll
fp-logic.ll
fp-round.ll [X86] Add the rest of the tests that were supposed to go with 90c31b0f42 2020-02-06 13:34:01 -08:00
fp-select-cmp-and.ll
fp-stack-2results.ll
fp-stack-O0-crash.ll
fp-stack-O0.ll
fp-stack-compare-cmov.ll
fp-stack-compare.ll
fp-stack-direct-ret.ll
fp-stack-ret-conv.ll
fp-stack-ret-store.ll
fp-stack-ret.ll
fp-stack-retcopy.ll
fp-stack-set-st1.ll
fp-stack.ll
fp-strict-libcalls-msvc32.ll Insert wait instruction after X87 instructions which could raise 2020-01-16 12:12:51 +08:00
fp-strict-scalar-cmp.ll [X86] Fix errors in use of strictfp attribute. 2020-05-29 12:31:55 -04:00
fp-strict-scalar-fptoint.ll Insert wait instruction after X87 instructions which could raise 2020-01-16 12:12:51 +08:00
fp-strict-scalar-inttofp.ll Insert wait instruction after X87 instructions which could raise 2020-01-16 12:12:51 +08:00
fp-strict-scalar-round.ll [X86] Fix errors in use of strictfp attribute. 2020-05-29 12:31:55 -04:00
fp-strict-scalar.ll Insert wait instruction after X87 instructions which could raise 2020-01-16 12:12:51 +08:00
fp-trunc.ll
fp-undef.ll
fp-une-cmp.ll
fp2sint.ll
fp80-strict-scalar-cmp.ll Insert wait instruction after X87 instructions which could raise 2020-01-16 12:12:51 +08:00
fp80-strict-scalar.ll Insert wait instruction after X87 instructions which could raise 2020-01-16 12:12:51 +08:00
fp128-calling-conv.ll
fp128-cast-strict.ll Insert wait instruction after X87 instructions which could raise 2020-01-16 12:12:51 +08:00
fp128-cast.ll
fp128-compare.ll [TargetLowering][ARM][X86] Change softenSetCCOperands handling of ONE to avoid spurious exceptions for QNANs with strict FP quiet compares 2020-01-10 11:00:17 -08:00
fp128-extract.ll
fp128-g.ll
fp128-i128.ll
fp128-libcalls-strict.ll [FPEnv] Fix chain handling for fpexcept.strict nodes 2020-01-13 14:38:49 +01:00
fp128-libcalls.ll
fp128-load.ll [AsmPrinter] Print FP constant in hexadecimal form instead 2020-02-07 16:00:55 +00:00
fp128-select.ll
fp128-store.ll
fp_constant_op.ll
fp_load_cast_fold.ll
fp_load_fold.ll
fpcmp-soft-fp.ll [TargetLowering][ARM][X86] Change softenSetCCOperands handling of ONE to avoid spurious exceptions for QNANs with strict FP quiet compares 2020-01-10 11:00:17 -08:00
fpstack-debuginstr-kill.ll
fptosi-constant.ll
frame-base.ll
frame-lowering-debug-intrinsic-2.ll
frame-lowering-debug-intrinsic.ll
frame-order.ll
frameaddr.ll
frameregister.ll
freeze-combine.ll [DAGCombine] Add basic optimizations for FREEZE in SelDag 2020-03-27 12:20:39 +09:00
freeze-legalize.ll [DAGCombine] Add basic optimizations for FREEZE in SelDag 2020-03-27 12:20:39 +09:00
freeze.ll [SelectionDAGBuilder] Fix ISD::FREEZE creation for structs with fields of different types. 2020-04-06 11:03:40 -07:00
frem-msvc32.ll
fsgsbase.ll
fshl.ll [TargetLowering] Improve expandFunnelShift shift amount masking 2020-05-24 11:25:09 +01:00
fshr.ll [TargetLowering] Improve expandFunnelShift shift amount masking 2020-05-24 11:25:09 +01:00
fsxor-alignment.ll
ftrunc.ll [x86] use vector instructions to lower even more FP->int->FP casts 2020-04-25 11:38:54 -04:00
full-lsr.ll
funclet-layout.ll
function-alias.ll
function-subtarget-features-2.ll
function-subtarget-features.ll
funnel-shift-rot.ll
funnel-shift.ll [DAG] SimplifyDemandedBits - peek through SHL if we only demand sign bits. 2020-06-03 16:11:54 +01:00
ga-offset.ll
ga-offset2.ll
gather-addresses.ll
gcc_except_table.ll
gcc_except_table_functions.ll
gep-expanded-vector.ll
getelementptr.ll
gfni-intrinsics.ll
ghc-cc.ll
ghc-cc64.ll
global-access-pie.ll
global-fill.ll [AsmPrinter] Fix emission of non-standard integer constants for BE targets 2020-04-27 14:57:29 -07:00
global-sections-comdat.ll
global-sections-tls.ll
global-sections.ll
gnu-seh-nolpads.ll
gpr-to-mask.ll
greedy_regalloc_bad_eviction_sequence.ll
gs-fold.ll
h-register-addressing-32.ll [X86] Regenerate hi reg tests 2020-02-21 14:23:54 +00:00
h-register-addressing-64.ll [X86] Regenerate hi reg tests 2020-02-21 14:23:54 +00:00
h-register-store.ll
h-registers-0.ll
h-registers-1.ll
h-registers-2.ll
h-registers-3.ll
haddsub-2.ll
haddsub-3.ll
haddsub-broadcast.ll
haddsub-shuf-undef-operand.ll
haddsub-shuf.ll [x86] add tests for heroic horizontal ops; NFC 2020-05-18 17:21:09 -04:00
haddsub-undef.ll [x86] add tests for disguised horizontal ops; NFC 2020-05-18 17:21:09 -04:00
haddsub.ll
half-constrained.ll [X86] Add test case for SoftPromoteHalf of STRICT_FP_EXTEND/STRICT_FP_ROUND. 2020-02-11 23:27:28 -08:00
half.ll [CodeGen] Ensure callers of CreateStackTemporary use sensible alignments 2020-06-09 08:10:17 +01:00
handle-move.ll
heap-alloc-markers.mir
hhvm-cc.ll
hidden-vis-2.ll
hidden-vis-3.ll
hidden-vis-4.ll
hidden-vis-pic.ll
hidden-vis.ll
hipe-cc.ll
hipe-cc64.ll
hipe-prologue.ll
hoist-and-by-const-from-lshr-in-eqcmp-zero.ll [SelectionDAG] ComputeKnownBits - minimum leading/trailing zero bits in LSHR/SHL (PR44526) 2020-01-13 11:08:12 +00:00
hoist-and-by-const-from-shl-in-eqcmp-zero.ll [TargetLowering] SimplifyDemandedBits - fix SCALAR_TO_VECTOR knownbits bug 2020-02-28 15:23:37 +00:00
hoist-common.ll
hoist-invariant-load.ll [X86] Restore selection of MULX on BMI2 targets. 2020-05-27 12:01:18 -07:00
hoist-spill-lpad.ll
hoist-spill.ll
horizontal-reduce-smax.ll [X86][SSE] Prefer trunc(movd(x)) to pextrb(x,0) 2020-03-13 18:43:04 +00:00
horizontal-reduce-smin.ll [DAG] SimplifyDemandedVectorElts - remove INSERT_SUBVECTOR if we don't demand the subvector 2020-05-01 16:20:51 +01:00
horizontal-reduce-umax.ll [X86][SSE] Prefer trunc(movd(x)) to pextrb(x,0) 2020-03-13 18:43:04 +00:00
horizontal-reduce-umin.ll [X86][SSE] Prefer trunc(movd(x)) to pextrb(x,0) 2020-03-13 18:43:04 +00:00
horizontal-shuffle-demanded.ll
horizontal-shuffle.ll
huge-stack-offset.ll
huge-stack-offset2.ll
i1narrowfail.ll [X86] Autogenerate complete checks. NFC 2020-05-29 23:45:04 -07:00
i2k.ll
i16lshr8pat.ll
i64-mem-copy.ll [CodeGen] Ensure callers of CreateStackTemporary use sensible alignments 2020-06-09 08:10:17 +01:00
i64-to-float.ll [X86] Always emit an integer vbroadcast_load from lowerBuildVectorAsBroadcast regardless of AVX vs AVX2 2020-03-03 10:39:11 -08:00
i128-add.ll
i128-and-beyond.ll
i128-immediate.ll
i128-mul.ll [X86] Add pseudo instructions to use MULX with a single destination when the low result isn't used. 2020-05-30 16:01:01 -07:00
i128-ret.ll
i128-sdiv.ll
i256-add.ll
i386-setjmp-pic.ll
i386-shrink-wrapping.ll
i386-tlscall-fastregalloc.ll
i486-fence-loop.ll
i686-win-shrink-wrapping.ll
iabs.ll
icall-branch-funnel.ll
icmp-opt.ll
ident-metadata.ll
ifunc-asm.ll
illegal-bitfield-loadstore.ll
illegal-insert.ll
illegal-vector-args-return.ll
immediate_merging.ll [x86] refine conditions for immediate hoisting to save code-size 2020-06-09 15:44:55 -04:00
immediate_merging64.ll [x86] refine conditions for immediate hoisting to save code-size 2020-06-09 15:44:55 -04:00
implicit-faultmap.ll [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
implicit-null-check-negative.ll
implicit-null-check.ll
implicit-null-checks.mir
implicit-null-chk-reg-rewrite.mir
implicit-use-spill.mir
imul-lea-2.ll
imul-lea.ll
imul.ll
inalloca-ctor.ll
inalloca-invoke.ll
inalloca-regparm.ll Revert "Revert "Reland "[Support] make report_fatal_error `abort` instead of `exit`""" 2020-02-13 10:16:06 -08:00
inalloca-stdcall.ll
inalloca.ll
inc-of-add.ll
inconsistent_landingpad.ll
indirect-branch-tracking-cm-lager.ll Enable IBT(Indirect Branch Tracking) in JIT with CET(Control-flow Enforcement Technology) 2020-04-07 09:48:47 +08:00
indirect-branch-tracking-eh.ll Handle CET for -exception-model sjlj 2020-04-20 11:13:40 +08:00
indirect-branch-tracking-eh2.ll [AsmPrinter] Don't generate .Lfoo$local for -fno-PIC and -fPIE 2020-05-25 23:35:49 -07:00
indirect-branch-tracking-r2.ll
indirect-branch-tracking.ll
indirect-hidden.ll
init-priority.ll [X86] Reland D71360 Clean up UseInitArray initialization for X86ELFTargetObjectFile 2020-03-20 21:57:34 -07:00
inline-0bh.ll [llvm] Fix missing FileCheck directive colons 2020-04-06 09:59:08 -06:00
inline-asm-2addr.ll
inline-asm-A-constraint.ll
inline-asm-R-constraint.ll
inline-asm-avx-v-constraint-32bit.ll Revert "Revert "Reland "[Support] make report_fatal_error `abort` instead of `exit`""" 2020-02-13 10:16:06 -08:00
inline-asm-avx-v-constraint.ll [X86] Allow Yz inline assembly constraint to choose ymm0 or zmm0 when avx/avx512 are enabled and type is 256 or 512 bits 2020-05-05 21:12:30 -07:00
inline-asm-avx512f-v-constraint.ll [X86] Allow Yz inline assembly constraint to choose ymm0 or zmm0 when avx/avx512 are enabled and type is 256 or 512 bits 2020-05-05 21:12:30 -07:00
inline-asm-avx512f-x-constraint.ll [MIR] Add comments to INLINEASM immediate flag MachineOperands 2020-04-16 13:46:14 +02:00
inline-asm-avx512vl-v-constraint-32bit.ll Revert "Revert "Reland "[Support] make report_fatal_error `abort` instead of `exit`""" 2020-02-13 10:16:06 -08:00
inline-asm-avx512vl-v-constraint.ll
inline-asm-bad-constraint-n.ll
inline-asm-bad-modifier.ll [X86] Add x, t and g modifiers for inline asm 2020-04-30 17:45:45 -07:00
inline-asm-default-clobbers.ll [MIR] Add comments to INLINEASM immediate flag MachineOperands 2020-04-16 13:46:14 +02:00
inline-asm-duplicated-constraint.ll
inline-asm-e-constraint.ll
inline-asm-error.ll
inline-asm-flag-clobber.ll
inline-asm-flag-output.ll
inline-asm-fpstack.ll
inline-asm-h.ll
inline-asm-i-constraint-i1.ll
inline-asm-imm-out-of-range.ll
inline-asm-modifier-V.ll
inline-asm-modifier-c.ll
inline-asm-modifier-n.ll
inline-asm-modifier-q.ll
inline-asm-mrv.ll
inline-asm-multilevel-gep.ll
inline-asm-n-constraint.ll
inline-asm-out-regs.ll
inline-asm-pic.ll
inline-asm-ptr-cast.ll
inline-asm-q-regs.ll
inline-asm-sp-clobber-memcpy.ll
inline-asm-stack-realign.ll
inline-asm-stack-realign2.ll
inline-asm-stack-realign3.ll
inline-asm-tied.ll
inline-asm-x-i128.ll [X86] Add support for inline assembly 'x' constraint for i128. 2020-06-15 19:34:02 -07:00
inline-asm-x-scalar.ll
inline-asm.ll
inline-sse.ll
inlineasm-sched-bug.ll
inreg.ll
ins_split_regalloc.ll
ins_subreg_coalesce-1.ll
ins_subreg_coalesce-2.ll
ins_subreg_coalesce-3.ll
insert-into-constant-vector.ll [x86] favor vector constant load to avoid GPR to XMM transfer, part 2 2020-05-25 08:01:48 -04:00
insert-loaded-scalar.ll
insert-positions.ll
insert-prefetch-inline.afdo
insert-prefetch-inline.ll
insert-prefetch-invalid-instr.afdo
insert-prefetch-invalid-instr.ll
insert-prefetch-other.afdo
insert-prefetch.afdo
insert-prefetch.ll
insertelement-copytoregs.ll
insertelement-duplicates.ll [X86][SSE] combineTargetShuffle - permilps(shufps(load(),x)) --> permilps(shufps(x,load())) 2020-01-24 15:23:20 +00:00
insertelement-legalize.ll
insertelement-ones.ll [X86][SSE] Add SimplifyDemandedVectorEltsForTargetShuffle to handle target shuffle variable masks 2020-06-21 11:16:07 +01:00
insertelement-shuffle.ll [X86][SSE] getFauxShuffleMask - add support for INSERT_VECTOR_ELT(EXTRACT_VECTOR_ELT) shuffle pattern 2020-03-10 15:42:37 +00:00
insertelement-var-index.ll [CodeGen] Ensure callers of CreateStackTemporary use sensible alignments 2020-06-09 08:10:17 +01:00
insertelement-zero.ll
insertps-O0-bug.ll
insertps-combine.ll
insertps-from-constantpool.ll
insertps-unfold-load-bug.ll
instr-symbols.mir
int-intrinsic.ll
intersect-fma-fmf.ll Regenerate FMA tests 2020-02-08 15:23:40 +00:00
interval-update-remat.ll
invalid-liveness.mir Revert "Revert "Reland "[Support] make report_fatal_error `abort` instead of `exit`""" 2020-02-13 10:16:06 -08:00
invalid-shift-immediate.ll
invpcid-intrinsic.ll
ipra-inline-asm.ll
ipra-local-linkage.ll
ipra-reg-alias.ll
ipra-reg-usage.ll
ipra-transform.ll
isel-blendi-gettargetconstant.ll
isel-optnone.ll
isel-postprocessing-test-fold-memop.ll [x86] Propagate memory operands during ISel DAG postprocessing 2020-05-18 21:35:31 +02:00
isel-sink.ll
isel-sink2.ll
isel-sink3.ll
isint.ll [x86] use vector instructions to lower more FP->int->FP casts 2020-04-19 08:33:17 -04:00
isnan.ll
isnan2.ll
ispositive.ll
jump_sign.ll
known-bits-vector.ll [SelectionDAG] ComputeKnownBits - Add DemandedElts support to getValidShiftAmountConstant/getValidMinimumShiftAmountConstant() 2020-01-13 14:12:12 +00:00
known-bits.ll [DAG] MatchRotate - Add funnel shift by immediate support 2020-03-11 18:55:18 +00:00
known-signbits-vector.ll [DAG] SimplifyMultipleUseDemandedBits - drop unnecessary *_EXTEND_VECTOR_INREG cases 2020-06-22 12:35:32 +01:00
kshift.ll [X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead. 2020-04-15 12:17:18 -07:00
label-annotation.ll
label-heapallocsite.ll
label-redefinition.ll Revert "Revert "Reland "[Support] make report_fatal_error `abort` instead of `exit`""" 2020-02-13 10:16:06 -08:00
lack-of-signed-truncation-check.ll
lakemont.ll
large-code-model-isel.ll
large-constants.ll
large-gep-chain.ll
large-gep-scale.ll
large-global.ll
large-pic-string.ll
late-address-taken.ll
late-remat-update-2.mir
late-remat-update.mir
ldzero.ll
lea-2.ll
lea-3.ll
lea-4.ll
lea-5.ll
lea-dagdag.ll
lea-opt-cse1.ll
lea-opt-cse2.ll
lea-opt-cse3.ll
lea-opt-cse4.ll
lea-opt-memop-check-1.ll
lea-opt-memop-check-2.ll
lea-opt-with-debug.mir
lea-opt.ll
lea-recursion.ll
lea.ll
leaFixup32.mir
leaFixup64.mir
leaf-fp-elim.ll
legalize-fmp-oeq-vector-select.ll
legalize-libcalls.ll
legalize-shift-64.ll
legalize-shift.ll
legalize-shl-vec.ll
legalize-sub-zero-2.ll
legalize-sub-zero.ll
legalize-types-remapid.ll reland: [DAG] Fix PR45049: LegalizeTypes crash 2020-04-12 09:52:17 -06:00
legalize-vaarg.ll
legalizedag_vec.ll
libcall-sret.ll
licm-dominance.ll
licm-nested.ll
licm-regpressure.ll
licm-symbol.ll
lifetime-alias.ll [AsmPrinter] Don't generate .Lfoo$local for -fno-PIC and -fPIE 2020-05-25 23:35:49 -07:00
limit-split-cost.mir
limited-prec.ll
linux-preemption.ll [AsmPrinter] Don't generate .Lfoo$local for -fno-PIC and -fPIE 2020-05-25 23:35:49 -07:00
lit.local.cfg Re-enable testing of .s tests under test/CodeGen/X86. 2020-01-13 16:22:39 -08:00
live-out-reg-info.ll
live-range-nosubreg.ll
liveness-local-regalloc.ll
llc-override-mcpu-mattr.ll
llc-print-machineinstrs.mir Revert "Revert "Reland "[Support] make report_fatal_error `abort` instead of `exit`""" 2020-02-13 10:16:06 -08:00
llc-start-stop-instance.ll
llrint-conv.ll [X86] Add custom lowering for lrint/llrint to either cvtss2si/cvtsd2si or fist. 2020-02-04 16:15:40 -08:00
llround-conv.ll [X86] Cleanup the lrint/llrint/lround/llround tests a bit. 2020-02-02 11:01:05 -08:00
load-chain.ll [x86] add test/code comment for chain value use (PR46195); NFC 2020-06-04 09:15:17 -04:00
load-combine-dbg.ll Move the sysroot attribute from DIModule to DICompileUnit 2020-01-17 12:55:40 -08:00
load-combine.ll
load-local-v3i1.ll [SelectionDAG] Unify scalarizeVectorLoad and VectorLegalizer::ExpandLoad 2020-05-02 15:18:10 -07:00
load-local-v3i129.ll [SelectionDAG] Don't promote the alignment of allocas beyond the stack alignment. 2020-05-11 17:39:00 -07:00
load-local-v4i5.ll [SelectionDAG] Unify scalarizeVectorLoad and VectorLegalizer::ExpandLoad 2020-05-02 15:18:10 -07:00
load-partial.ll [X86][SSE] Add SimplifyDemandedVectorEltsForTargetShuffle to handle target shuffle variable masks 2020-06-21 11:16:07 +01:00
load-scalar-as-vector.ll
load-slice.ll
loadStore_vectorizer.ll
loc-remat.ll
local_stack_symbol_ordering.ll
localescape.ll
log2_not_readnone.ll
logical-load-fold.ll
long-setcc.ll
longlong-deadload.ll
loop-blocks.ll
loop-hoist.ll
loop-rotate.ll
loop-search.ll
loop-strength-reduce-2.ll
loop-strength-reduce-3.ll
loop-strength-reduce-crash.ll
loop-strength-reduce.ll
loop-strength-reduce2.ll
loop-strength-reduce4.ll
loop-strength-reduce5.ll
loop-strength-reduce6.ll
loop-strength-reduce7.ll
loop-strength-reduce8.ll
lower-bitcast.ll
lower-ptrmask.ll
lower-vec-shift-2.ll
lower-vec-shift.ll
lower-vec-shuffle-bug.ll
lrint-conv-i32.ll [X86] Add custom lowering for lrint/llrint to either cvtss2si/cvtsd2si or fist. 2020-02-04 16:15:40 -08:00
lrint-conv-i64.ll [X86] Add custom lowering for lrint/llrint to either cvtss2si/cvtsd2si or fist. 2020-02-04 16:15:40 -08:00
lround-conv-i32.ll [X86] Cleanup the lrint/llrint/lround/llround tests a bit. 2020-02-02 11:01:05 -08:00
lround-conv-i64.ll [X86] Cleanup the lrint/llrint/lround/llround tests a bit. 2020-02-02 11:01:05 -08:00
lrshrink.ll
lsr-crash-empty-uses.ll
lsr-delayed-fold.ll
lsr-i386.ll
lsr-interesting-step.ll
lsr-loop-exit-cond.ll
lsr-negative-stride.ll
lsr-nonaffine.ll
lsr-normalization.ll
lsr-overflow.ll
lsr-quadratic-expand.ll
lsr-redundant-addressing.ll
lsr-reuse-trunc.ll
lsr-reuse.ll
lsr-sort.ll
lsr-static-addr.ll
lsr-wrap.ll
lvi-hardening-gadget-graph.ll [X86] Add a Pass that builds a Condensed CFG for Load Value Injection (LVI) Gadgets 2020-05-11 13:08:35 -07:00
lvi-hardening-indirectbr.ll [X86] Add Indirect Thunk Support to X86 to mitigate Load Value Injection (LVI) 2020-04-03 00:34:39 -07:00
lvi-hardening-inline-asm.ll [X86] Automatically harden inline assembly RET instructions against Load Value Injection (LVI) 2020-06-13 15:16:05 -07:00
lvi-hardening-loads.ll [X86] Add an Unoptimized Load Value Injection (LVI) Load Hardening Pass 2020-06-10 15:31:47 -07:00
lvi-hardening-ret.ll [X86] Add RET-hardening Support to mitigate Load Value Injection (LVI) 2020-04-03 12:08:34 -07:00
lwp-intrinsics-x86_64.ll
lwp-intrinsics.ll
lzcnt-tzcnt.ll
lzcnt-zext-cmp.ll
lzcnt.ll
macCatalyst.ll
machine-combiner-int-vec.ll
machine-combiner-int.ll
machine-combiner.ll [x86] use instruction-level fast-math-flags to drive MachineCombiner 2020-02-27 15:19:37 -05:00
machine-copy-prop.mir
machine-cp-debug.mir [MachineVerifier] Verify that a DBG_VALUE has a debug location 2020-05-28 13:53:40 -07:00
machine-cp.ll
machine-cse.ll
machine-outliner-cfi-tail-some.mir fix to outline cfi instruction when can be grouped in a tail call 2020-04-17 22:26:34 -07:00
machine-outliner-cfi-tail.mir fix to outline cfi instruction when can be grouped in a tail call 2020-04-17 22:26:34 -07:00
machine-outliner-debuginfo.ll
machine-outliner-disubprogram.ll
machine-outliner-noredzone.ll
machine-outliner-tailcalls.ll
machine-outliner.ll
machine-region-info.mir
machine-sink-and-implicit-null-checks.ll Migrate last batch of tests to gc-live bundle format 2020-06-26 10:28:27 -07:00
machine-sink.ll [BFI] Fix missed BFI updates in MachineSink. 2020-02-21 09:50:54 -08:00
machine-trace-metrics-crash.ll
machinesink-merge-debuginfo.ll
machinesink-null-debuginfo.ll
macho-comdat.ll Revert "Revert "Reland "[Support] make report_fatal_error `abort` instead of `exit`""" 2020-02-13 10:16:06 -08:00
macho-trap.ll
madd.ll [X86][SSE] Add SimplifyDemandedVectorEltsForTargetShuffle to handle target shuffle variable masks 2020-06-21 11:16:07 +01:00
mangle-question-mark.ll
mask-negated-bool.ll
masked-iv-safe.ll
masked-iv-unsafe.ll
masked_compressstore.ll [X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source 2020-04-28 15:11:32 -07:00
masked_expandload.ll [DAG] SimplifyDemandedVectorElts - add EXTRACT_SUBVECTOR SimplifyMultipleUseDemandedBits handling 2020-05-01 13:48:07 +01:00
masked_gather.ll [X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source 2020-04-28 15:11:32 -07:00
masked_gather_scatter.ll [SelectionDAGBuilder][CGP][X86] Move some of SDB's gather/scatter uniform base handling to CGP. 2020-04-16 17:49:22 -07:00
masked_gather_scatter_widen.ll
masked_load.ll [X86][AVX] Call SimplifyDemandedBits on MaskedLoadSDNode with non-boolean masks 2020-05-24 09:51:21 +01:00
masked_store.ll [X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source 2020-04-28 15:11:32 -07:00
masked_store_trunc.ll [X86][SSE] Add SimplifyDemandedVectorEltsForTargetShuffle to handle target shuffle variable masks 2020-06-21 11:16:07 +01:00
masked_store_trunc_ssat.ll [X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source 2020-04-28 15:11:32 -07:00
masked_store_trunc_usat.ll [X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source 2020-04-28 15:11:32 -07:00
maskmovdqu.ll
materialize.ll [X86] make sure POP has implicit def/use of stack pointer when materializing 8-bit immediates for minsize 2020-03-30 09:25:31 -07:00
mature-mc-support.ll
mbp-false-cfg-break.ll
mcinst-avx-lowering.ll
mcinst-lowering.ll
mcu-abi.ll
mem-intrin-base-reg.ll
mem-promote-integers.ll
membarrier.ll [x86] add FileCheck / assertions to test; NFC 2020-06-04 08:34:25 -04:00
memcmp-constant.ll [ExpandMemCmp][NFC] Add more tests. 2020-03-12 08:49:51 +01:00
memcmp-mergeexpand.ll
memcmp-minsize.ll [ExpandMemCmp][NFC] Regenerate tests. 2020-03-03 15:09:55 +01:00
memcmp-more-load-pairs.ll [ExpandMemCmp] Allow overlaping loads in the zero-relational case. 2020-04-02 11:20:47 +02:00
memcmp-optsize.ll [ExpandMemCmp] Properly constant-fold all compares. 2020-03-09 10:40:52 +01:00
memcmp-pgso.ll [ExpandMemCmp] Properly constant-fold all compares. 2020-03-09 10:40:52 +01:00
memcmp.ll [ExpandMemCmp] Allow overlaping loads in the zero-relational case. 2020-04-02 11:20:47 +02:00
memcpy-2.ll
memcpy-from-string.ll
memcpy-inline.ll Update tests for @llvm.memcpy.inline intrinsics 2020-01-28 10:32:43 +01:00
memcpy-struct-by-value.ll
memcpy.ll
mempcpy-32.ll
mempcpy.ll
memset-2.ll
memset-3.ll
memset-nonzero.ll
memset-sse-stack-realignment.ll
memset-zero.ll
memset.ll
memset64-on-x86-32.ll
merge-consecutive-loads-128.ll [X86] Teach EltsFromConsecutiveLoads that it's ok to form a v4f32 VZEXT_LOAD with a 64 bit memory size on SSE1 targets. 2020-02-22 18:50:52 -08:00
merge-consecutive-loads-256.ll [X86] Make (insert_vector_elt (v8i16 zerovec), i16 %x, 0) generate the same code as (v8i16 (build_vector %x, 0, 0, 0, 0, 0, 0, 0)). 2020-02-09 21:52:11 -08:00
merge-consecutive-loads-512.ll [X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead. 2020-04-15 12:17:18 -07:00
merge-consecutive-stores-i1.ll
merge-consecutive-stores-nt.ll [X86] Fix usage of Align constructing MachineMemOperands. 2020-05-05 15:25:02 -07:00
merge-consecutive-stores.ll
merge-sp-update-lea.ll
merge-sp-updates-cfi.ll
merge-store-constants.ll
merge-store-partially-alias-loads.ll
merge-vector-stores-scale-idx-crash.ll
merge_store.ll
merge_store_duplicated_loads.ll
mfence.ll
midpoint-int-vec-128.ll [X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases. 2020-05-09 12:19:30 -07:00
midpoint-int-vec-256.ll [X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases. 2020-05-09 12:19:30 -07:00
midpoint-int-vec-512.ll [X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases. 2020-05-09 12:19:30 -07:00
midpoint-int.ll
min-legal-vector-width.ll [X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases. 2020-05-09 12:19:30 -07:00
mingw-alloca.ll
mingw-comdats-xdata.ll [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
mingw-comdats.ll [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
mingw-refptr.ll
misaligned-memset.ll
misched-aa-colored.ll
misched-aa-mmos.ll
misched-balance.ll
misched-code-difference-with-debug.ll
misched-copy.ll
misched-crash.ll
misched-fusion.ll
misched-ilp.ll
misched-matmul.ll
misched-matrix.ll
misched-new.ll
misched_phys_reg_assign_order.ll
mixed-ptr-sizes-i686.ll Extend or truncate __ptr32/__ptr64 pointers when dereferenced. 2020-06-26 13:33:54 -07:00
mixed-ptr-sizes.ll Extend or truncate __ptr32/__ptr64 pointers when dereferenced. 2020-06-26 13:33:54 -07:00
mmx-arg-passing-x86-64.ll
mmx-arg-passing.ll
mmx-arith.ll [X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases. 2020-05-09 12:19:30 -07:00
mmx-bitcast-fold.ll
mmx-bitcast.ll
mmx-build-vector.ll [X86] Add a few more shuffles to hasUndefRegUpdate. 2020-05-10 12:30:16 -07:00
mmx-coalescing.ll
mmx-copy-gprs.ll
mmx-cvt.ll [X86] Teach computeKnownBitsForTargetNode that the upper half of X86ISD::MOVQ2DQ is all zero. 2020-05-30 19:47:07 -07:00
mmx-fold-load.ll [X86] Remove isel pattern for MMX_X86movdq2q+simple_load. Replace with DAG combine to to loadmmx. 2020-05-29 10:20:03 -07:00
mmx-fold-zero.ll
mmx-intrinsics.ll
mmx-only.ll
mod128.ll
movbe.ll
movddup-load-fold.ll
movdir-intrinsic-x86.ll
movdir-intrinsic-x86_64.ll
move_latch_to_loop_top.ll Revert "Include static prof data when collecting loop BBs" 2020-03-24 09:41:16 -07:00
movfs.ll
movgs.ll
movmsk-cmp.ll [X86][SSE] Fold MOVMSK(PCMPEQ(X,0)) != -1 -> !PTESTZ(X,X) allof patterns 2020-06-20 12:17:32 +01:00
movmsk.ll
movntdq-no-avx.ll
movpc32-check.ll
movtopush.ll [SelectionDAG] Don't promote the alignment of allocas beyond the stack alignment. 2020-05-11 17:39:00 -07:00
movtopush.mir
movtopush64.ll
ms-inline-asm-PR44272.ll
ms-inline-asm-avx512.ll
ms-inline-asm-redundant-clobber.ll
ms-inline-asm.ll
mul-constant-i8.ll
mul-constant-i16.ll
mul-constant-i32.ll
mul-constant-i64.ll
mul-constant-result.ll
mul-i256.ll
mul-i512.ll
mul-i1024.ll
mul-legalize.ll
mul-remat.ll
mul-shift-reassoc.ll
mul64.ll
mul128.ll
mul128_sext_loop.ll
mulfix_combine.ll
mulo-pow2.ll
muloti.ll
mult-alt-generic-i686.ll
mult-alt-generic-x86_64.ll
mult-alt-x86.ll
multiple-loop-post-inc.ll
multiple-return-values-cross-block.ll
mulvi32.ll
mulx32.ll [X86] Restore selection of MULX on BMI2 targets. 2020-05-27 12:01:18 -07:00
mulx64.ll [X86] Restore selection of MULX on BMI2 targets. 2020-05-27 12:01:18 -07:00
musttail-fastcall.ll
musttail-inalloca.ll
musttail-indirect.ll Add tests for preallocated + musttail 2020-05-28 12:17:09 -07:00
musttail-tailcc.ll
musttail-thiscall.ll Add tests for preallocated + musttail 2020-05-28 12:17:09 -07:00
musttail-varargs.ll
musttail.ll
mwaitx.ll
mxcsr-reg-usage.ll [LegalizeTypes][X86] Add a new strategy for type legalizing f16 type that softens it to i16, but promotes to f32 around arithmetic ops. 2020-02-01 11:21:04 -08:00
named-reg-alloc.ll Revert "Revert "Reland "[Support] make report_fatal_error `abort` instead of `exit`""" 2020-02-13 10:16:06 -08:00
named-reg-notareg.ll Revert "Revert "Reland "[Support] make report_fatal_error `abort` instead of `exit`""" 2020-02-13 10:16:06 -08:00
nancvt.ll
narrow-shl-cst.ll
narrow-shl-load.ll
narrow_op-1.ll [X86] Autogenerate complete checks. NFC 2020-05-29 23:45:04 -07:00
neg-of-3ops-lea.ll
neg-shl-add.ll
neg_cmp.ll
neg_fp.ll [DAGCombine] Remove the getNegatibleCost to avoid the out of sync with getNegatedExpression 2020-05-20 02:12:16 +00:00
negate-add-zero.ll
negate-i1.ll
negate-shift.ll
negate.ll
negative-offset.ll
negative-sin.ll
negative-stride-fptosi-user.ll
negative-subscript.ll
negative_zero.ll
new-remat.ll
newline-and-quote.ll
no-and8ri8.ll
no-cmov.ll
no-plt-libcalls.ll
no-plt.ll
no-prolog-kill.ll
no-sse-win64.ll [Win64] Handle FP arguments more gracefully under -mno-sse 2020-01-14 17:19:35 -08:00
no-sse-x86.ll [Win64] Handle FP arguments more gracefully under -mno-sse 2020-01-14 17:19:35 -08:00
no-sse2-avg.ll
no-stack-arg-probe.ll
no-wide-load.ll [X86] Add a flag to guard the wide load 2020-06-02 16:16:13 -07:00
nobt.ll
nocf_check.ll
nocx16.ll
nomerge.ll Add NoMerge MIFlag to avoid MIR branch folding 2020-05-29 12:31:06 -07:00
nomovtopush.ll
non-lazy-bind.ll
non-unique-sections.ll
non-value-mem-operand.mir [Tests] Update a few more statepoint tests 2020-05-28 15:17:21 -07:00
nonconst-static-ev.ll Revert "Revert "Reland "[Support] make report_fatal_error `abort` instead of `exit`""" 2020-02-13 10:16:06 -08:00
nonconst-static-iv.ll Revert "Revert "Reland "[Support] make report_fatal_error `abort` instead of `exit`""" 2020-02-13 10:16:06 -08:00
nontemporal-2.ll
nontemporal-3.ll
nontemporal-loads-2.ll [X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead. 2020-04-15 12:17:18 -07:00
nontemporal-loads.ll [X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead. 2020-04-15 12:17:18 -07:00
nontemporal.ll
noreturn-call-linux.ll
noreturn-call-win64.ll Re-land "Avoid emitting unreachable SP adjustments after `throw`" 2020-03-24 12:04:43 -07:00
noreturn-call.ll
norex-subreg.ll
nosse-error1.ll
nosse-varargs.ll
nosse-vector.ll [SelectionDAG] Fix usage of Align constructing MachineMemOperands. 2020-04-15 13:01:41 -07:00
not-and-simplify.ll
not-of-dec.ll
note-cet-property.ll
note-sections.ll
null-streamer.ll
objc-gc-module-flags.ll
oddshuffles.ll [X86][SSE] Add SimplifyDemandedVectorEltsForTargetShuffle to handle target shuffle variable masks 2020-06-21 11:16:07 +01:00
oddsubvector.ll [AsmPrinter] Don't generate .Lfoo$local for -fno-PIC and -fPIE 2020-05-25 23:35:49 -07:00
offset-operator.ll
omit-urem-of-power-of-two-or-zero-when-comparing-with-zero.ll
opaque-constant-asm.ll
opt-ext-uses.ll
opt-pipeline.ll [X86] Rename O3-pipeline.ll to opt-pipeline.ll and add O1/O2 command lines 2020-06-24 11:09:50 -07:00
opt-shuff-tstore.ll
opt_phis.mir
opt_phis2.mir
optimize-max-0.ll
optimize-max-1.ll
optimize-max-2.ll
optimize-max-3.ll
or-address.ll
or-branch.ll
or-lea.ll
osx-private-labels.ll
overflow-intrinsic-setcc-fold.ll
overflow.ll
overlap-shift.ll
packed_struct.ll
packss.ll [x86] favor vector constant load to avoid GPR to XMM transfer, part 2 2020-05-25 08:01:48 -04:00
paddus.ll
palignr.ll
parity.ll
partial-fold32.ll
partial-fold64.ll
partial-tail-dup.ll [MBP] Partial tail duplication into hot predecessors 2020-02-12 15:22:33 -08:00
partition.ll
pass-three.ll
patchable-function-entry-ibt.ll [AsmPrinter] Omit unique ID for __patchable_function_entries sections 2020-02-14 20:54:54 -08:00
patchable-function-entry.ll [X86] For 32-bit targets, emit two-byte NOP when possible 2020-06-17 13:44:38 -04:00
patchable-prologue.ll [X86] For 32-bit targets, emit two-byte NOP when possible 2020-06-17 13:44:38 -04:00
patchpoint-invoke.ll
patchpoint-verifiable.mir
patchpoint-webkit_jscc.ll
patchpoint.ll
pause.ll
peep-setb.ll
peep-test-0.ll
peep-test-1.ll
peep-test-2.ll
peep-test-3.ll
peep-test-4.ll
peephole-cvt-sse.ll
peephole-fold-movsd.ll
peephole-fold-testrr.mir
peephole-multiple-folds.ll
peephole-na-phys-copy-folding.ll
peephole-recurrence.mir
peephole.mir
personality.ll
personality_size.ll
phaddsub-extract.ll
phaddsub-undef.ll [X86][SSE] Combine unary shuffle(HORIZOP,HORIZOP) -> HORIZOP 2020-04-05 22:49:46 +01:00
phaddsub.ll [X86][SSE] lowerV8I16Shuffle - lower compaction shuffles using PACKUSDW(PBLENDW,PBLENDW) on SSE41+ 2020-04-04 13:08:25 +01:00
phi-bit-propagation.ll
phi-immediate-factoring.ll
phielim-split.ll
phys-reg-local-regalloc.ll
phys_subreg_coalesce-2.ll
phys_subreg_coalesce-3.ll
phys_subreg_coalesce.ll
physreg-pairs-error.ll
physreg-pairs.ll
pic-load-remat.ll
pic.ll
pic_jumptable.ll
pie.ll
pku.ll
pmaddubsw.ll [X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead. 2020-04-15 12:17:18 -07:00
pmovext.ll
pmovsx-inreg.ll
pmul.ll [X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases. 2020-05-09 12:19:30 -07:00
pmulh.ll [X86] Add support for forming vXi16 PMULH instructions from shifts. 2020-05-14 10:58:00 -07:00
pmulld.ll
pointer-vector.ll
pop-stack-cleanup-msvc.ll
pop-stack-cleanup.ll
popcnt.ll
post-ra-sched-with-debug.mir
post-ra-sched.ll
postalloc-coalescing.ll
postra-ignore-dbg-instrs.mir
postra-licm.ll
pow.75.ll
pow.ll Assume ieee behavior without denormal-fp-math attribute 2020-03-07 12:10:56 -05:00
powi-windows.ll
powi.ll
pr1462.ll
pr1489.ll RegAllocFast: Record internal state based on register units 2020-06-03 16:51:46 -04:00
pr1505.ll
pr1505b.ll
pr2177.ll
pr2182.ll
pr2326.ll
pr2585.ll
pr2656.ll
pr2659.ll
pr2849.ll
pr2924.ll
pr2982.ll
pr3154.ll
pr3216.ll
pr3241.ll
pr3243.ll
pr3244.ll
pr3250.ll
pr3317.ll
pr3366.ll
pr3457.ll
pr3522.ll
pr5145.ll
pr7882.ll
pr9127.ll
pr9517.ll
pr9743.ll
pr10068.ll
pr10475.ll
pr10499.ll
pr10523.ll
pr10524.ll
pr10525.ll
pr10526.ll
pr11202.ll
pr11334.ll
pr11415.ll
pr11468.ll Fix typo in comment 2020-04-09 10:36:00 +01:00
pr11985.ll
pr11998.ll
pr12360.ll
pr12889.ll
pr13209.ll
pr13220.ll
pr13458.ll
pr13577.ll [AsmPrinter] Print FP constant in hexadecimal form instead 2020-02-07 16:00:55 +00:00
pr13859.ll
pr13899.ll
pr14088.ll
pr14098.ll
pr14161.ll
pr14204.ll
pr14314.ll
pr14333.ll
pr14562.ll
pr15267.ll [SelectionDAG] Unify scalarizeVectorLoad and VectorLegalizer::ExpandLoad 2020-05-02 15:18:10 -07:00
pr15296.ll
pr15309.ll [X86] Swap the 0 and the fudge factor in the constant pool for the 32-bit mode i64->f32/f64/f80 uint_to_fp algorithm. 2020-01-14 17:05:23 -08:00
pr15705.ll
pr15981.ll
pr16031.ll
pr16360.ll
pr16807.ll
pr17546.ll
pr17631.ll
pr17764.ll
pr18014.ll [X86] SimplifyMultipleUseDemandedBitsForTargetNode - add initial X86ISD::VSRAI handling. 2020-05-24 16:07:46 +01:00
pr18054.ll
pr18162.ll
pr18344.ll
pr18846.ll
pr19049.ll
pr20011.ll
pr20012.ll
pr20020.ll
pr20088.ll
pr21099.ll
pr21792.ll
pr22019.ll
pr22103.ll
pr22338.ll
pr22473.ll
pr22774.ll
pr22970.ll
pr23103.ll
pr23246.ll [X86] Autogenerate complete checks. NFC 2020-05-30 19:47:07 -07:00
pr23273.ll
pr23603.ll
pr23664.ll
pr24139.ll
pr24374.ll
pr24602.ll
pr25828.ll
pr26350.ll
pr26625.ll
pr26652.ll
pr26757.ll
pr26835.ll
pr26870.ll
pr27071.ll
pr27202.ll [x86] refine conditions for immediate hoisting to save code-size 2020-06-09 15:44:55 -04:00
pr27501.ll
pr27591.ll RegAllocFast: Record internal state based on register units 2020-06-03 16:51:46 -04:00
pr27681.mir
pr28129.ll
pr28173.ll
pr28444.ll
pr28472.ll
pr28489.ll
pr28515.ll
pr28560.ll
pr28824.ll
pr29010.ll
pr29022.ll
pr29061.ll
pr29112.ll
pr29170.ll
pr29222.ll
pr30284.ll [X86] Always emit an integer vbroadcast_load from lowerBuildVectorAsBroadcast regardless of AVX vs AVX2 2020-03-03 10:39:11 -08:00
pr30290.ll
pr30430.ll RegAllocFast: Record internal state based on register units 2020-06-03 16:51:46 -04:00
pr30511.ll
pr30562.ll [TargetLowering] SimplifyDemandedVectorElts - add DemandedElts mask to ISD::BITCAST SimplifyDemandedBits call. 2020-03-10 13:39:10 +00:00
pr30813.ll RegAllocFast: Record internal state based on register units 2020-06-03 16:51:46 -04:00
pr30821.mir
pr31045.ll
pr31088.ll [CodeGen] Ensure callers of CreateStackTemporary use sensible alignments 2020-06-09 08:10:17 +01:00
pr31143.ll
pr31242.ll
pr31271.ll
pr31323.ll
pr31593.ll
pr31773.ll
pr31956.ll [X86][SSE] SimplifyDemandedVectorEltsForTargetNode - reduce vector width of X86ISD::BLENDI 2020-03-09 18:29:28 +00:00
pr32108.ll
pr32241.ll RegAllocFast: Record internal state based on register units 2020-06-03 16:51:46 -04:00
pr32256.ll
pr32278.ll
pr32282.ll [DAGCombine] Move the remaining X86 funnel shift patterns to DAGCombine 2020-04-30 12:57:17 +01:00
pr32284.ll RegAllocFast: Record internal state based on register units 2020-06-03 16:51:46 -04:00
pr32329.ll
pr32340.ll RegAllocFast: Record internal state based on register units 2020-06-03 16:51:46 -04:00
pr32345.ll RegAllocFast: Record internal state based on register units 2020-06-03 16:51:46 -04:00
pr32368.ll
pr32420.ll
pr32451.ll RegAllocFast: Record internal state based on register units 2020-06-03 16:51:46 -04:00
pr32484.ll
pr32515.ll
pr32588.ll
pr32610.ll
pr32659.ll
pr32907.ll
pr33010.ll Migrate last batch of tests to gc-live bundle format 2020-06-26 10:28:27 -07:00
pr33290.ll
pr33349.ll
pr33396.ll
pr33715.ll
pr33747.ll
pr33828.ll
pr33954.ll
pr33960.ll
pr34080-2.ll
pr34080.ll
pr34088.ll
pr34137.ll
pr34139.ll
pr34149.ll
pr34177.ll
pr34271-1.ll
pr34271.ll
pr34292.ll
pr34381.ll
pr34397.ll
pr34421.ll
pr34592.ll RegAllocFast: Record internal state based on register units 2020-06-03 16:51:46 -04:00
pr34605.ll
pr34629.ll
pr34634.ll
pr34653.ll [SelectionDAGBuilder] Stop setting alignment to one for hidden sret values 2020-05-04 14:44:39 +01:00
pr34657.ll [DAGCombiner] reduce extract subvector of concat 2020-01-09 09:38:12 -05:00
pr34855.ll
pr35272.ll
pr35316.ll
pr35399.ll
pr35443.ll [X86] Don't count the chain uses when forming broadcast loads in lowerBuildVectorAsBroadcast. 2020-03-03 08:41:31 -08:00
pr35636.ll [X86] Add pseudo instructions to use MULX with a single destination when the low result isn't used. 2020-05-30 16:01:01 -07:00
pr35761.ll
pr35763.ll
pr35765.ll
pr35918.ll
pr35972.ll
pr35982.ll
pr36199.ll
pr36274.ll
pr36312.ll
pr36553.ll
pr36602.ll
pr36865.ll
pr37063.ll
pr37264.ll
pr37359.ll
pr37499.ll
pr37820.ll
pr37826.ll
pr37879.ll
pr37916.ll
pr38038.ll
pr38185.ll
pr38217.ll
pr38533.ll [LegalizeTypes][X86] Add a new strategy for type legalizing f16 type that softens it to i16, but promotes to f32 around arithmetic ops. 2020-02-01 11:21:04 -08:00
pr38539.ll
pr38639.ll
pr38738.ll
pr38743.ll
pr38762.ll
pr38763.ll
pr38795.ll [AsmPrinter] Don't generate .Lfoo$local for -fno-PIC and -fPIE 2020-05-25 23:35:49 -07:00
pr38803.ll
pr38819.ll
pr38865-2.ll
pr38865-3.ll
pr38865.ll
pr38952.mir [MachineVerifier] Verify that a DBG_VALUE has a debug location 2020-05-28 13:53:40 -07:00
pr39098.ll
pr39187-g.ll
pr39243.ll
pr39666.ll
pr39733.ll RegAllocFast: Record internal state based on register units 2020-06-03 16:51:46 -04:00
pr39896.ll
pr39926.ll
pr40090.ll
pr40289-64bit.ll
pr40289.ll
pr40529.ll
pr40539.ll
pr40631_deadstore_elision.ll [Codegen] Revert rL354676/rL354677 and followups - introduced PR43446 miscompile 2020-02-25 20:30:12 +03:00
pr40730.ll [AsmPrinter] Print FP constant in hexadecimal form instead 2020-02-07 16:00:55 +00:00
pr40737.ll
pr40811.ll
pr40891.ll [X86] Combine concat(shufps,shufps) -> shufps(concat,concat) 2020-03-21 12:44:10 +00:00
pr40994.ll
pr41619.ll [X86][AVX512] Avoid bitcasts between scalar and vXi1 bool vectors 2020-06-11 10:22:55 +01:00
pr41678.ll
pr41748.ll
pr42452.ll
pr42565.ll
pr42616.ll
pr42727.ll
pr42870.ll [X86][SSE1] Add support for logic+movmsk patterns (PR42870) 2020-03-24 14:28:40 +00:00
pr42905.ll
pr42909.ll
pr42992.ll
pr42998.ll
pr43157.ll
pr43507.ll
pr43509.ll
pr43529.ll
pr43575.ll
pr43820.ll
pr43866.ll
pr43952.ll
pr44140.ll
pr44396.ll [X86] Swap the 0 and the fudge factor in the constant pool for the 32-bit mode i64->f32/f64/f80 uint_to_fp algorithm. 2020-01-14 17:05:23 -08:00
pr44412.ll
pr44749.ll RegAllocFast: Record internal state based on register units 2020-06-03 16:51:46 -04:00
pr44812.ll [X86] Use MVT::i8 instead of MVT::i64 for shift amount in BuildSDIVPow2 2020-02-06 13:32:13 -08:00
pr44976.ll Recommit "[X86] Replace a bad use of MVT::getVectorVT with EVT::getVectorVT"" 2020-02-20 12:28:54 -08:00
pr45067.ll [SelectionDAGBuilder][CGP][X86] Move some of SDB's gather/scatter uniform base handling to CGP. 2020-04-16 17:49:22 -07:00
pr45378.ll Revert "[X86][SSE] MatchVectorAllZeroTest - handle OR vector reductions" 2020-06-22 21:27:11 +02:00
pr45443.ll [X86][AVX] Fold extract_subvector(broadcast(x),c) -> extract_subvector(broadcast(x),0) iff c != 0 2020-05-24 18:05:54 +01:00
pr45563-2.ll [X86][AVX] Call SimplifyDemandedBits on MaskedLoadSDNode with non-boolean masks 2020-05-24 09:51:21 +01:00
pr45563.ll [llvm] [X86] Processed test with update_llc_test_checks 2020-04-23 15:09:53 -07:00
pr45833.ll [X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases. 2020-05-09 12:19:30 -07:00
pr45995-2.ll [llvm] [CodeGen] [X86] Fix issues with v4i1 instruction selection 2020-05-20 11:34:56 -07:00
pr45995.ll [llvm] [CodeGen] [X86] Fix issues with v4i1 instruction selection 2020-05-20 11:34:56 -07:00
pr46004.ll [CGP] Ensure address scaled offset is representable as int64_t 2020-05-29 12:25:43 +01:00
pr46189.ll [DAG] scalarizeBinOpOfSplats - extract from the source of splat vector (PR46189) 2020-06-04 11:58:59 +01:00
pre-coalesce-2.ll
pre-coalesce.ll
pre-coalesce.mir
pre-ra-sched.ll
preallocated-nocall.ll Reland [X86] Codegen for preallocated 2020-05-20 11:25:44 -07:00
preallocated-x64.ll Reland [X86] Codegen for preallocated 2020-05-20 11:25:44 -07:00
preallocated.ll Reland [X86] Codegen for preallocated 2020-05-20 11:25:44 -07:00
prefer-avx256-lzcnt.ll
prefer-avx256-mask-extend.ll
prefer-avx256-mask-shuffle.ll [X86][SSE] Add SimplifyDemandedVectorEltsForTargetShuffle to handle target shuffle variable masks 2020-06-21 11:16:07 +01:00
prefer-avx256-popcnt.ll
prefer-avx256-shift.ll [X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases. 2020-05-09 12:19:30 -07:00
prefer-avx256-trunc.ll
prefer-avx256-wide-mul.ll [X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases. 2020-05-09 12:19:30 -07:00
prefetch.ll [X86] Don't imply -mprfchw when -m3dnow is specified. Enable prefetchw in the backend with 3dnow feature. 2020-06-25 12:46:52 -07:00
prefixdata.ll
preserve_allcc64.ll
preserve_mostcc64.ll
private-2.ll
private.ll
probe-stack-x32.ll
prolog-push-seq.ll
prologepilog_deref_size.mir
prologue-epilogue-remarks.mir
prologuedata.ll
promote-assert-zext.ll
promote-cmp.ll [DAG] SimplifyDemandedBits - peek through SHL if we only demand sign bits. 2020-06-03 16:11:54 +01:00
promote-i16.ll
promote-trunc.ll
promote-vec3.ll
promote.ll
ps4-noreturn.ll
ps4-ssp-nop.ll
psadbw.ll [DAGCombine] visitEXTRACT_VECTOR_ELT - add SimplifyDemandedBits multi use support 2020-02-20 15:49:38 +00:00
pseudo_cmov_lower.ll [X86] Don't bother avoiding illegal FCMOVs if we don't have the cmov subtarget feature. 2020-02-21 00:34:15 -08:00
pseudo_cmov_lower1.ll
pseudo_cmov_lower2.ll
pshufb-mask-comments.ll [x86] favor vector constant load to avoid GPR to XMM transfer, part 2 2020-05-25 08:01:48 -04:00
pshufd-combine-crash.ll
psubus.ll [X86][SSE] Add SimplifyDemandedVectorEltsForTargetShuffle to handle target shuffle variable masks 2020-06-21 11:16:07 +01:00
ptest.ll [X86][SSE] LowerVectorAllZeroTest - add support for >256-bit vectors 2020-06-15 15:30:24 +01:00
ptr-rotate.ll
ptrtoint-constexpr.ll
ptrtoint-narrow.ll
ptwrite32-intrinsic.ll
ptwrite64-intrinsic.ll
pull-binop-through-shift.ll
pull-conditional-binop-through-shift.ll
push-cfi-debug.ll
push-cfi-obj.ll
push-cfi.ll
ragreedy-bug.ll Revert "Include static prof data when collecting loop BBs" 2020-03-24 09:41:16 -07:00
ragreedy-hoist-spill.ll
ragreedy-last-chance-recoloring.ll
rd-mod-wr-eflags.ll
rdpid.ll
rdpmc.ll
rdrand-x86_64.ll
rdrand.ll
rdseed-x86_64.ll
rdseed.ll
rdtsc-upgrade.ll
rdtsc.ll
read-fp-no-frame-pointer.ll Revert "Revert "Reland "[Support] make report_fatal_error `abort` instead of `exit`""" 2020-02-13 10:16:06 -08:00
recip-fastmath.ll [X86][TwoAddressInstructionPass] Teach tryInstructionCommute to continue checking for commutable FMA operands in more cases. 2020-03-01 16:38:08 -08:00
recip-fastmath2.ll [X86][TwoAddressInstructionPass] Teach tryInstructionCommute to continue checking for commutable FMA operands in more cases. 2020-03-01 16:38:08 -08:00
recip-pic.ll
red-zone.ll
red-zone2.ll
reduce-trunc-shl.ll [X86][SSE] Add SimplifyDemandedVectorEltsForTargetShuffle to handle target shuffle variable masks 2020-06-21 11:16:07 +01:00
regalloc-advanced-split-cost.ll
regalloc-copy-hints.mir
regalloc-fast-missing-live-out-spill.mir RegAllocFast: Record internal state based on register units 2020-06-03 16:51:46 -04:00
regalloc-reconcile-broken-hints.ll
regalloc-spill-at-ehpad.ll
regcall-no-plt.ll
reghinting.ll
regparm.ll
regpressure.ll
relptr-rodata.ll
rem.ll
rem_crash.ll
remarks-section.ll
remat-constant.ll
remat-fold-load.ll
remat-mov-0.ll
remat-phys-dead.ll
remat-scalar-zero.ll
replace-load-and-with-bzhi.ll
replace_unsupported_masked_mem_intrin.ll
ret-addr.ll
ret-i64-0.ll
ret-mmx.ll [x86] favor vector constant load to avoid GPR to XMM transfer, part 2 2020-05-25 08:01:48 -04:00
retpoline-external.ll
retpoline-regparm.ll
retpoline.ll
return-ext.ll
return_zeroext_i2.ll
returned-trunc-tail-calls.ll
rev16.ll [DAGCombine] Combine pattern for REV16 2020-02-17 14:54:17 +00:00
reverse_branches.ll
rip-rel-address.ll
rip-rel-lea.ll
rodata-relocs.ll
rot16.ll
rot32.ll
rot64.ll
rotate-extract-vector.ll
rotate-extract.ll [X86] Improve i8 + 'slow' i16 funnel shift codegen 2020-05-24 08:08:53 +01:00
rotate-multi.ll
rotate.ll
rotate2.ll
rotate4.ll
rotate_vec.ll [X86] Run XOP vector rotation tests with/without AVX2 2020-04-01 08:19:03 +01:00
rounding-ops.ll
rrlist-livereg-corrutpion.ll
rtm.ll
sad.ll [X86] Rewrite how X86PartialReduction finds candidates to consider optimizing. 2020-05-31 12:53:01 -07:00
sad_variations.ll
sadd_sat.ll
sadd_sat_plus.ll
sadd_sat_vec.ll [SelectionDAG] Fix usage of Align constructing MachineMemOperands. 2020-04-15 13:01:41 -07:00
saddo-redundant-add.ll
safestack.ll
safestack_inline.ll
safestack_ssp.ll
sandybridge-loads.ll
sar_fold.ll
sar_fold64.ll [SelectionDAG] ComputeNumSignBits - add ISD::ADD demanded elts support 2020-01-23 17:48:07 +00:00
sat-add.ll Recommit "[PatternMatch] Match XOR variant of unsigned-add overflow check." 2020-02-23 18:33:18 +00:00
sbb.ll [X86] Handle more cases in combineAddOrSubToADCOrSBB. 2020-04-28 10:39:39 -07:00
scalar-extract.ll
scalar-fp-to-i32.ll
scalar-fp-to-i64.ll
scalar-int-to-fp.ll [X86] When handling i64->f32 sint_to_fp on 32-bit targets only bitcast to f64 if sse2 is enabled. 2020-01-15 18:26:28 -08:00
scalar-min-max-fill-operand.ll
scalar_sse_minmax.ll
scalar_widen_div.ll [X86][SSE] Prefer trunc(movd(x)) to pextrb(x,0) 2020-03-13 18:43:04 +00:00
scalarize-bitcast.ll
scalarize-fp.ll
scatter-schedule.ll
scavenger.mir [llvm] Fix missing FileCheck directive colons 2020-04-06 09:59:08 -06:00
scev-interchange.ll
scheduler-backtracking.ll [X86] Handle more cases in combineAddOrSubToADCOrSBB. 2020-04-28 10:39:39 -07:00
sdiv-exact.ll
sdiv-pow2.ll
sdiv_fix.ll [DAG] MatchRotate - Add funnel shift by immediate support 2020-03-11 18:55:18 +00:00
sdiv_fix_sat.ll [DAG] SimplifyDemandedBits - peek through SHL if we only demand sign bits. 2020-06-03 16:11:54 +01:00
section_mergeable_size.ll
segmented-stacks-dynamic.ll
segmented-stacks-standalone.ll
segmented-stacks.ll Revert "Revert "Reland "[Support] make report_fatal_error `abort` instead of `exit`""" 2020-02-13 10:16:06 -08:00
seh-catch-all-win32.ll
seh-catch-all.ll
seh-catchpad.ll
seh-except-finally.ll
seh-except-restore.ll [SEH] Remove CATCHPAD SDNode and X86::EH_RESTORE MachineInstr 2020-02-04 15:13:12 -08:00
seh-exception-code.ll
seh-filter-no-personality.ll
seh-finally.ll
seh-localaddress.ll
seh-no-invokes.ll
seh-safe-div-win32.ll
seh-safe-div.ll
seh-stack-realign.ll
select-1-or-neg1.ll
select-mmx.ll [X86] Add CMOV_VR64 pseudo instruction for MMX. Remove mmx handling from combineSelect. 2020-02-20 20:30:56 -08:00
select-of-fp-constants.ll
select-sra.ll
select-testb-volatile-load.ll
select-with-and-or.ll
select.ll [X86] Handle more cases in combineAddOrSubToADCOrSBB. 2020-04-28 10:39:39 -07:00
select_const.ll
select_meta.ll
selectcc-to-shiftand.ll
selectiondag-crash.ll
selectiondag-cse.ll
selectiondag-debug-loc.ll
selectiondag-dominator.ll
selectiondag-order.ll
semantic-interposition-asm.ll [X86][AsmPrinter] PrintSymbolOperand: prefer to lower ELF MO_GlobalAddress to .Lfoo$local 2020-02-15 13:45:29 -08:00
semantic-interposition-comdat.ll [AsmPrinter] Don't generate .Lfoo$local for -fno-PIC and -fPIE 2020-05-25 23:35:49 -07:00
semantic-interposition-infer-dsolocal.ll Make explicit -fno-semantic-interposition (in -fpic mode) infer dso_local 2020-05-25 20:48:18 -07:00
serialize-intrinsic.ll [X86] Add SERIALIZE instruction. 2020-04-02 16:19:23 +08:00
setcc-combine.ll
setcc-logic.ll [x86] add vector test for merged condition branching; NFC 2020-06-25 16:28:10 -04:00
setcc-lowering.ll
setcc-narrowing.ll
setcc-wide-types.ll
setcc.ll
setjmp-spills.ll
setoeq.ll [x86] use vector instructions to lower more FP->int->FP casts 2020-04-19 08:33:17 -04:00
setuge.ll
sext-i1.ll
sext-load.ll
sext-ret-val.ll
sext-setcc-self.ll
sext-subreg.ll
sext-trunc.ll
sha.ll
shadow-stack.ll
shift-amount-mod.ll
shift-and-x86_64.ll
shift-and.ll
shift-avx2-crash.ll
shift-bmi2.ll
shift-by-signext.ll [TargetLowering] Only demand a funnelshift's modulo amount bits 2020-03-16 13:52:17 +00:00
shift-coalesce.ll
shift-codegen.ll
shift-combine-crash.ll
shift-combine.ll [X86] Don't return true from isTruncateFree for vectors 2020-04-30 16:43:35 -07:00
shift-double-x86_64.ll [DAG] MatchRotate - Add funnel shift by variable support 2020-03-15 11:50:45 +00:00
shift-double.ll [DAG] MatchRotate - Add funnel shift by variable support 2020-03-15 11:50:45 +00:00
shift-folding.ll
shift-i128.ll
shift-i256.ll
shift-logic.ll
shift-mask.ll
shift-one.ll
shift-pair.ll
shift-parts.ll [X86] Replace (most) X86ISD::SHLD/SHRD usage with ISD::FSHL/FSHR generic opcodes (PR39467) 2020-03-11 11:17:49 +00:00
shift-pcmp.ll
shift_minsize.ll
shl-anyext.ll
shl-crash-on-legalize.ll [X86] Use custom isel for (X86sbb_flag 0, 0) so we can use 32-bit SBB for i8/i16. 2020-02-09 13:19:35 -08:00
shl-i64.ll
shl_elim.ll
shl_undef.ll
shrink-compare-pgso.ll
shrink-compare.ll
shrink-fp-const1.ll
shrink-fp-const2.ll
shrink-wrap-chkstk-x86_64.ll
shrink-wrap-chkstk.ll Reland [X86] Codegen for preallocated 2020-05-20 11:25:44 -07:00
shrink-wrapping-vla.ll
shrink_vmul.ll [DAG] SimplifyMultipleUseDemandedBits - remove superfluous bitcasts 2020-05-08 19:04:49 +01:00
shrink_vmul_sse.ll
shrink_wrap_dbg_value.mir
shrinkwrap-hang.ll
shuffle-combine-crash-2.ll
shuffle-combine-crash-3.ll [X86] Do not assume types are legal in getFauxShuffleMask 2020-04-01 11:40:18 +02:00
shuffle-combine-crash.ll
shuffle-extract-subvector.ll [LegalizeTypes][X86] Add a new strategy for type legalizing f16 type that softens it to i16, but promotes to f32 around arithmetic ops. 2020-02-01 11:21:04 -08:00
shuffle-of-insert.ll
shuffle-of-splat-multiuses.ll
shuffle-strided-with-offset-128.ll [X86][SSE] Add SimplifyDemandedVectorEltsForTargetShuffle to handle target shuffle variable masks 2020-06-21 11:16:07 +01:00
shuffle-strided-with-offset-256.ll [X86][SSE] Add SimplifyDemandedVectorEltsForTargetShuffle to handle target shuffle variable masks 2020-06-21 11:16:07 +01:00
shuffle-strided-with-offset-512.ll [X86][SSE] Add SimplifyDemandedVectorEltsForTargetShuffle to handle target shuffle variable masks 2020-06-21 11:16:07 +01:00
shuffle-vs-trunc-128.ll [X86][SSE] Add SimplifyDemandedVectorEltsForTargetShuffle to handle target shuffle variable masks 2020-06-21 11:16:07 +01:00
shuffle-vs-trunc-256.ll [X86][SSE] Add SimplifyDemandedVectorEltsForTargetShuffle to handle target shuffle variable masks 2020-06-21 11:16:07 +01:00
shuffle-vs-trunc-512.ll [X86][SSE] Add SimplifyDemandedVectorEltsForTargetShuffle to handle target shuffle variable masks 2020-06-21 11:16:07 +01:00
sibcall-2.ll
sibcall-3.ll
sibcall-4.ll
sibcall-5.ll
sibcall-6.ll
sibcall-byval.ll
sibcall-win64.ll
sibcall.ll
signbit-shift.ll [DAG] foldAddSubOfSignBit - add support for non-uniform vector constants 2020-06-12 14:58:15 +01:00
signed-truncation-check.ll
simple-register-allocation-read-undef.mir
simple-zext.ll
sincos-opt.ll
sincos.ll
sink-addsub-of-const.ll
sink-blockfreq.ll
sink-cheap-instructions.ll
sink-gep-before-mem-inst.ll
sink-hoist.ll
sink-local-value.ll [CodeGen] Fix sinking local values in lpads with phis 2020-03-28 11:10:33 -07:00
sink-out-of-loop.ll
sitofp.ll
sjlj-baseptr.ll
sjlj-eh.ll
sjlj-shadow-stack-liveness.mir
sjlj.ll
slow-incdec.ll
slow-pmulld.ll
slow-unaligned-mem.ll
small-byval-memcpy.ll
smul-with-overflow.ll
smul_fix.ll
smul_fix_sat.ll
smul_fix_sat_constants.ll
soft-fp-legal-in-HW-reg.ll [X86] Regenerate soft fp legalization test to fix issue reported on D77354 2020-04-03 14:56:07 +01:00
soft-fp.ll
soft-sitofp.ll
speculative-execution-side-effect-suppression.ll [x86][seses] Introduce SESES pass for LVI 2020-05-11 09:34:37 -07:00
speculative-load-hardening-call-and-ret.ll Prevent register coalescing in functions whith setjmp 2020-05-16 00:36:34 +01:00
speculative-load-hardening-gather.ll
speculative-load-hardening-indirect.ll Revert "Reland "[DebugInfo] Enable the debug entry values feature by default"" 2020-02-20 14:41:39 +01:00
speculative-load-hardening-no-spill.ll [MS] Copy the symbols assigned to the former instruction when memory folding. 2020-06-10 15:38:32 +08:00
speculative-load-hardening.ll
splat-const.ll
splat-for-size.ll Revert "[llvm][test] Add COM: directives before colon-less non-CHECKs in comments. NFC" 2020-05-22 05:36:15 -06:00
split-eh-lpad-edges.ll
split-extend-vector-inreg.ll
split-store.ll
split-vector-bitcast.ll
split-vector-rem.ll
sqrt-fastmath-mir.ll [DAGCombiner] Require ninf for sqrt recip estimation 2020-04-01 16:23:43 +08:00
sqrt-fastmath-tune.ll [Legalizer] Fix some flags miss in vector results 2020-03-26 22:01:19 +08:00
sqrt-fastmath.ll [DAGCombiner] Require ninf for sqrt recip estimation 2020-04-01 16:23:43 +08:00
sqrt-partial.ll
sqrt.ll
srem-lkk.ll
srem-seteq-optsize.ll
srem-seteq-vec-nonsplat.ll [x86] favor vector constant load to avoid GPR to XMM transfer, part 2 2020-05-25 08:01:48 -04:00
srem-seteq-vec-splat.ll
srem-seteq.ll
srem-vector-lkk.ll
sret-implicit.ll
sse-align-0.ll
sse-align-1.ll
sse-align-2.ll
sse-align-3.ll
sse-align-4.ll
sse-align-5.ll
sse-align-6.ll
sse-align-7.ll
sse-align-8.ll
sse-align-9.ll
sse-align-10.ll
sse-align-11.ll
sse-align-12.ll
sse-commute.ll
sse-cvttp2si.ll
sse-domains.ll
sse-fcopysign.ll
sse-fsignum.ll
sse-intel-ocl.ll
sse-intrinsics-fast-isel-x86_64.ll
sse-intrinsics-fast-isel.ll Revert rGe6a7e3b5e3e7 "[X86][SSE] matchShuffleWithSHUFPD - add support for unary shuffles." 2020-03-21 12:14:19 +00:00
sse-intrinsics-x86-upgrade.ll
sse-intrinsics-x86.ll
sse-intrinsics-x86_64-upgrade.ll
sse-intrinsics-x86_64.ll
sse-load-ret.ll
sse-minmax.ll
sse-only.ll
sse-regcall.ll
sse-scalar-fp-arith-unary.ll
sse-scalar-fp-arith.ll Revert "[llvm][test] Add COM: directives before colon-less non-CHECKs in comments. NFC" 2020-05-22 05:36:15 -06:00
sse-unaligned-mem-feature.ll
sse-varargs.ll
sse1-fcopysign.ll
sse1.ll
sse2-intrinsics-canonical.ll
sse2-intrinsics-fast-isel-x86_64.ll
sse2-intrinsics-fast-isel.ll
sse2-intrinsics-x86-upgrade.ll [X86] Enable shuffle combining for AVX512 unless the root is used by a vselect 2020-04-11 20:05:10 -07:00
sse2-intrinsics-x86.ll
sse2-intrinsics-x86_64-upgrade.ll
sse2-intrinsics-x86_64.ll
sse2-vector-shifts.ll
sse2.ll
sse3-avx-addsub-2.ll
sse3-avx-addsub.ll
sse3-intrinsics-fast-isel.ll
sse3-intrinsics-x86.ll
sse3.ll [TargetLowering] SimplifyDemandedBits - fix SCALAR_TO_VECTOR knownbits bug 2020-02-28 15:23:37 +00:00
sse4a-intrinsics-fast-isel.ll
sse4a-upgrade.ll
sse4a.ll
sse41-intrinsics-fast-isel.ll
sse41-intrinsics-x86-upgrade.ll
sse41-intrinsics-x86.ll
sse41-pmovxrm.ll
sse41.ll [X86] Enable shuffle combining for AVX512 unless the root is used by a vselect 2020-04-11 20:05:10 -07:00
sse42-intrinsics-fast-isel-x86_64.ll
sse42-intrinsics-fast-isel.ll
sse42-intrinsics-x86.ll
sse42-intrinsics-x86_64.ll
sse_partial_update.ll
sse_reload_fold.ll
ssp-data-layout.ll
ssp-guard-spill.ll
ssse3-intrinsics-fast-isel.ll
ssse3-intrinsics-x86.ll
ssub_sat.ll
ssub_sat_plus.ll
ssub_sat_vec.ll [SelectionDAG] Fix usage of Align constructing MachineMemOperands. 2020-04-15 13:01:41 -07:00
stack-align-memcpy.ll
stack-align.ll
stack-align2.ll
stack-clash-dynamic-alloca.ll Fix dynamic probing scheme 2020-06-10 21:37:09 +02:00
stack-clash-large.ll Improve stack-clash implementation on x86 2020-05-25 14:48:14 +02:00
stack-clash-medium-natural-probes-mutliple-objects.ll [X86] Regenerate stack clash test to fix issue reported on D77354 2020-04-03 14:56:06 +01:00
stack-clash-medium-natural-probes.ll Support -fstack-clash-protection for x86 2020-02-09 10:42:45 +01:00
stack-clash-medium.ll Improve stack-clash implementation on x86 2020-05-25 14:48:14 +02:00
stack-clash-no-free-probe.ll Support -fstack-clash-protection for x86 2020-02-09 10:42:45 +01:00
stack-clash-small.ll Support -fstack-clash-protection for x86 2020-02-09 10:42:45 +01:00
stack-clash-unknown-call.ll Support -fstack-clash-protection for x86 2020-02-09 10:42:45 +01:00
stack-folding-3dnow.ll
stack-folding-adx-x86_64.ll
stack-folding-adx.mir [X86] Clean up some mir tests with INLINEASM to avoid regdef or to correct the immediate for the regdef. 2020-04-17 21:55:44 -07:00
stack-folding-avx512bf16.ll [X86] Assign avx512bf16 instructions to the SSEPackedSingle ExeDomain. 2020-03-16 14:07:01 -07:00
stack-folding-avx512vp2intersect.ll
stack-folding-bmi.ll
stack-folding-bmi2.ll
stack-folding-bmi2.mir [X86] Clean up some mir tests with INLINEASM to avoid regdef or to correct the immediate for the regdef. 2020-04-17 21:55:44 -07:00
stack-folding-fp-avx1.ll
stack-folding-fp-avx512.ll
stack-folding-fp-avx512vl.ll
stack-folding-fp-nofpexcept.mir [X86] Clean up some mir tests with INLINEASM to avoid regdef or to correct the immediate for the regdef. 2020-04-17 21:55:44 -07:00
stack-folding-fp-sse42.ll
stack-folding-int-avx1.ll
stack-folding-int-avx2.ll
stack-folding-int-avx512.ll
stack-folding-int-avx512vl.ll
stack-folding-int-avx512vnni.ll
stack-folding-int-sse42.ll
stack-folding-lwp.ll
stack-folding-mmx.ll
stack-folding-sha.ll
stack-folding-tbm.ll
stack-folding-x86_64.ll
stack-folding-xop.ll
stack-guard-oob.ll [StackProtector] Catch direct out-of-bounds when checking address-takenness 2020-03-17 12:09:07 +00:00
stack-probe-red-zone.ll
stack-probe-size.ll
stack-probes.ll
stack-protector-2.ll
stack-protector-dbginfo.ll
stack-protector-msvc.ll
stack-protector-remarks.ll
stack-protector-strong-macho-win32-xor.ll
stack-protector-target.ll
stack-protector-vreg-to-vreg-copy.ll
stack-protector-weight.ll
stack-protector.ll
stack-size-section-function-sections.ll [AsmPrinter] Omit unique ID for .stack_sizes 2020-02-14 21:25:06 -08:00
stack-size-section.ll [AsmPrinter] Omit unique ID for .stack_sizes 2020-02-14 21:25:06 -08:00
stack-update-frame-opcode.ll
stack_guard_remat.ll
stackguard-internal.ll
stackmap-fast-isel.ll
stackmap-frame-setup.ll
stackmap-large-constants.ll
stackmap-large-location-size.ll Migrate last batch of tests to gc-live bundle format 2020-06-26 10:28:27 -07:00
stackmap-liveness.ll
stackmap-nops.ll [X86] Adjust nop emission by compiler to consider target decode limitations 2020-01-11 08:45:17 -08:00
stackmap-shadow-optimization.ll
stackmap.ll
stackpointer.ll
statepoint-allocas.ll [Statepoint] Migrate a few tests to gc-live bundle format and fix assert 2020-06-04 18:15:58 -07:00
statepoint-call-lowering.ll [Statepoint] Migrate a few tests to gc-live bundle format and fix assert 2020-06-04 18:15:58 -07:00
statepoint-duplicates-export.ll Migrate last batch of tests to gc-live bundle format 2020-06-26 10:28:27 -07:00
statepoint-far-call.ll
statepoint-forward.ll Migrate a couple of codegen tests to gc-live format 2020-06-25 12:58:52 -07:00
statepoint-gc-live.ll Introduce a "gc-live" bundle for the gc arguments of a statepoint 2020-06-03 15:00:24 -07:00
statepoint-gctransition-call-lowering.ll Migrate a couple of codegen tests to gc-live format 2020-06-25 12:58:52 -07:00
statepoint-invoke.ll [Statepoint] Migrate a few tests to gc-live bundle format and fix assert 2020-06-04 18:15:58 -07:00
statepoint-live-in-remat.ll [Tests] Migrate more statepoint lowering tests to use operand bundles 2020-05-28 20:04:24 -07:00
statepoint-live-in.ll [Statepoint] Migrate a few tests to gc-live bundle format and fix assert 2020-06-04 18:15:58 -07:00
statepoint-no-extra-const.ll Migrate a couple of codegen tests to gc-live format 2020-06-25 12:58:52 -07:00
statepoint-no-realign-stack.ll Migrate a couple of codegen tests to gc-live format 2020-06-25 12:58:52 -07:00
statepoint-regs.ll Migrate last batch of tests to gc-live bundle format 2020-06-26 10:28:27 -07:00
statepoint-stack-usage.ll Migrate last batch of tests to gc-live bundle format 2020-06-26 10:28:27 -07:00
statepoint-stackmap-format.ll Migrate last batch of tests to gc-live bundle format 2020-06-26 10:28:27 -07:00
statepoint-stackmap-size.ll Migrate last batch of tests to gc-live bundle format 2020-06-26 10:28:27 -07:00
statepoint-uniqueing.ll Migrate last batch of tests to gc-live bundle format 2020-06-26 10:28:27 -07:00
statepoint-vector-bad-spill.ll Migrate a couple of codegen tests to gc-live format 2020-06-25 14:11:20 -07:00
statepoint-vector.ll Migrate a couple of codegen tests to gc-live format 2020-06-25 14:11:20 -07:00
stdarg.ll
stdcall-notailcall.ll
stdcall.ll
store-empty-member.ll
store-fp-constant.ll
store-global-address.ll
store-narrow.ll
store-zero-and-minus-one.ll
store_op_load_fold.ll
store_op_load_fold2.ll Revert "[CodeGen] Add support for multiple memory operands in MachineInstr::mayAlias" 2020-05-22 21:26:46 +02:00
stores-merging.ll [Codegen] Revert rL354676/rL354677 and followups - introduced PR43446 miscompile 2020-02-25 20:30:12 +03:00
storetrunc-fp.ll
stride-nine-with-base-reg.ll
stride-reuse.ll
sttni.ll
sub-of-bias.ll
sub-of-not.ll
sub-with-overflow.ll
sub.ll
subcarry.ll
subreg-to-reg-0.ll
subreg-to-reg-1.ll
subreg-to-reg-2.ll
subreg-to-reg-3.ll
subreg-to-reg-4.ll
subreg-to-reg-6.ll
subvector-broadcast.ll [X86][AVX] Use lowerShuffleAsLanePermuteAndSHUFP to lower binary v4f64 shuffles. 2020-01-12 12:29:41 +00:00
sunkaddr-ext.ll
swap.ll
swift-error.ll
swift-return.ll RegAllocFast: Record internal state based on register units 2020-06-03 16:51:46 -04:00
swiftcc.ll
swifterror.ll RegAllocFast: Record internal state based on register units 2020-06-03 16:51:46 -04:00
swiftself.ll
switch-bt.ll
switch-crit-edge-constant.ll
switch-default-only.ll
switch-density.ll
switch-edge-weight.ll
switch-jump-table.ll
switch-lower-peel-top-case.ll
switch-or.ll
switch-order-weight.ll
switch-zextload.ll
switch.ll
swizzle-2.ll
swizzle-avx2.ll
system-intrinsics-64-xsave.ll
system-intrinsics-64-xsavec.ll
system-intrinsics-64-xsaveopt.ll
system-intrinsics-64-xsaves.ll
system-intrinsics-64.ll
system-intrinsics-xgetbv.ll
system-intrinsics-xsave.ll
system-intrinsics-xsavec.ll
system-intrinsics-xsaveopt.ll
system-intrinsics-xsaves.ll
system-intrinsics-xsetbv.ll
system-intrinsics.ll
tail-call-attrs.ll
tail-call-casts.ll
tail-call-conditional.mir
tail-call-deref.ll
tail-call-got.ll
tail-call-legality.ll
tail-call-mutable-memarg.ll Reland [X86] Codegen for preallocated 2020-05-20 11:25:44 -07:00
tail-call-parameter-attrs-mismatch.ll
tail-call-win64.ll
tail-dup-addr.ll
tail-dup-catchret.ll
tail-dup-debugloc.ll
tail-dup-merge-loop-headers.ll
tail-dup-no-other-successor.ll
tail-dup-partial.ll [CodeGen] Allow partial tail duplication in Machine Block Placement. 2020-04-11 12:20:31 -07:00
tail-dup-repeat.ll Revert "Reland "[DebugInfo] Enable the debug entry values feature by default"" 2020-02-20 14:41:39 +01:00
tail-merge-after-mbp.mir
tail-merge-debugloc.ll
tail-merge-identical.ll
tail-merge-unreachable.ll
tail-merge-wineh.ll
tail-opts.ll [PGO][PGSO] Handle MBFIWrapper 2020-01-31 09:36:55 -08:00
tail-threshold.ll
tailcall-64.ll
tailcall-assume.ll
tailcall-calleesave.ll
tailcall-cgp-dup.ll
tailcall-disable.ll
tailcall-extract.ll [CodeGenPrepare] Handle ExtractValueInst in dupRetToEnableTailCallOpts 2020-03-04 11:10:32 -08:00
tailcall-fastisel.ll
tailcall-largecode.ll
tailcall-lifetime-end.ll
tailcall-mem-intrinsics.ll
tailcall-msvc-conventions.ll
tailcall-multiret.ll
tailcall-pseudo-64.mir
tailcall-pseudo.mir
tailcall-readnone.ll
tailcall-returndup-void.ll
tailcall-ri64.ll
tailcall-stackalign.ll
tailcall-structret.ll
tailcall-tailcc.ll
tailcall.ll
tailcallbyval.ll
tailcallbyval64.ll
tailcallfp.ll
tailcallfp2.ll
tailcallpic1.ll [X86][ELF] Prefer to lower MC_GlobalAddress operands to .Lfoo$local 2020-01-30 17:52:35 -08:00
tailcallpic2.ll
tailcallpic3.ll [X86][ELF] Prefer to lower MC_GlobalAddress operands to .Lfoo$local 2020-01-30 17:52:35 -08:00
tailcallstack64.ll
tailcc-calleesave.ll
tailcc-disable-tail-calls.ll
tailcc-fastcc.ll
tailcc-fastisel.ll
tailcc-largecode.ll
tailcc-stackalign.ll
tailcc-structret.ll
tailccbyval.ll
tailccbyval64.ll
tailccfp.ll
tailccfp2.ll
tailccpic1.ll [X86][ELF] Prefer to lower MC_GlobalAddress operands to .Lfoo$local 2020-01-30 17:52:35 -08:00
tailccpic2.ll
tailccstack64.ll
taildup-callsiteinfo.mir MachineFunction: Copy call site info when duplicating insts 2020-04-08 11:06:14 -07:00
taildup-crash.ll
taildup-heapallocsite.ll
tailjmp_gotpcrel_relax_relocation.ll
targetLoweringGeneric.ll
tbm-intrinsics-fast-isel-x86_64.ll
tbm-intrinsics-fast-isel.ll
tbm-intrinsics-x86_64.ll
tbm-intrinsics.ll
tbm_patterns.ll [X86] Add missing isel pattern for BLCFILL producing flags. 2020-02-17 13:20:13 -08:00
test-nofold.ll
test-shrink-bug.ll
test-shrink.ll
test-vs-bittest.ll
test_x86condbr_globaladdr.mir
testb-je-fusion.ll
testl-commute.ll
this-return-64.ll
throws-cfi-fp.ll
throws-cfi-no-fp.ll
tls-addr-non-leaf-function.ll
tls-android-negative.ll
tls-android.ll
tls-local-dynamic.ll
tls-models.ll
tls-no-plt.ll
tls-pic.ll
tls-pie.ll
tls-shrink-wrapping.ll
tls-windows-itanium.ll
tls.ll [AsmPrinter] Don't generate .Lfoo$local for -fno-PIC and -fPIE 2020-05-25 23:35:49 -07:00
tlv-1.ll
tlv-2.ll
tlv-3.ll
token_landingpad.ll
trap.ll
tree_way_unsigned_cmp.ll
trunc-and.ll
trunc-ext-ld-st.ll
trunc-store.ll
trunc-subvector.ll
trunc-to-bool.ll
tsxldtrk-intrinsic.ll [X86] Add TSXLDTRK instructions. 2020-04-09 13:17:29 +08:00
twoaddr-coalesce-2.ll
twoaddr-coalesce-3.ll
twoaddr-coalesce.ll
twoaddr-dbg-value.mir
twoaddr-lea.ll
twoaddr-pass-sink.ll
twoaddr-sink-terminator.ll
typeid-alias.ll
uadd_sat.ll
uadd_sat_plus.ll
uadd_sat_vec.ll [SelectionDAG] Fix usage of Align constructing MachineMemOperands. 2020-04-15 13:01:41 -07:00
udiv_fix.ll
udiv_fix_sat.ll [DAG] MatchRotate - Add funnel shift by immediate support 2020-03-11 18:55:18 +00:00
uint64-to-float.ll [X86] Swap the 0 and the fudge factor in the constant pool for the 32-bit mode i64->f32/f64/f80 uint_to_fp algorithm. 2020-01-14 17:05:23 -08:00
uint_to_fp-2.ll
uint_to_fp-3.ll
uint_to_fp.ll
umul-with-carry.ll
umul-with-overflow.ll
umul_fix.ll
umul_fix_sat.ll
umulo-64-legalisation-lowering.ll
umulo-128-legalisation-lowering.ll
unaligned-32-byte-memops.ll
unaligned-load.ll
unaligned-spill-folding.ll
undef-eflags.mir
undef-globals-bss.ll
undef-label.ll
undef-ops.ll
unfold-masked-merge-scalar-constmask-innerouter.ll
unfold-masked-merge-scalar-constmask-interleavedbits.ll
unfold-masked-merge-scalar-constmask-interleavedbytehalves.ll
unfold-masked-merge-scalar-constmask-lowhigh.ll
unfold-masked-merge-scalar-variablemask.ll
unfold-masked-merge-vector-variablemask-const.ll
unfold-masked-merge-vector-variablemask.ll
unknown-location.ll
unreachable-loop-sinking.ll
unreachable-mbb-undef-phi.mir
unreachable-trap.ll
unreachableblockelim.ll Remove Passes dependency on CodeGen 2020-06-24 14:52:46 -07:00
unused_stackslots.ll
unwind-init.ll
unwindraise.ll
update-terminator-debugloc.ll
update-terminator.mir
urem-i8-constant.ll
urem-lkk.ll
urem-power-of-two.ll
urem-seteq-nonzero.ll
urem-seteq-optsize.ll
urem-seteq-vec-nonsplat.ll [x86] favor vector constant load to avoid GPR to XMM transfer 2020-05-17 11:56:26 -04:00
urem-seteq-vec-nonzero.ll
urem-seteq-vec-splat.ll
urem-seteq-vec-tautological.ll
urem-seteq.ll
urem-vector-lkk.ll
use-add-flags.ll
use-cr-result-of-dom-icmp-st.ll
usub_sat.ll
usub_sat_plus.ll
usub_sat_vec.ll [SelectionDAG] Fix usage of Align constructing MachineMemOperands. 2020-04-15 13:01:41 -07:00
utf8.ll
utf16-cfstrings.ll
uwtables.ll
v2f32.ll
v4f32-immediate.ll
v4i32load-crash.ll
v8i1-masks.ll [X86] Try to avoid casts around logical vector ops recursively. 2020-01-19 17:22:43 -08:00
vaargs.ll
vaes-intrinsics-avx-x86.ll
vaes-intrinsics-avx512-x86.ll
vaes-intrinsics-avx512vl-x86.ll
var-permute-128.ll [CodeGen] Ensure callers of CreateStackTemporary use sensible alignments 2020-06-09 08:10:17 +01:00
var-permute-256.ll [X86] getTargetShuffleAndZeroables - add insert_subvector(undef, sub, c) handling. 2020-03-21 19:11:42 +00:00
var-permute-512.ll [X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead. 2020-04-15 12:17:18 -07:00
vararg-callee-cleanup.ll
vararg_no_start.ll
vararg_tailcall.ll
variable-sized-darwin-bzero.ll
variadic-node-pic.ll
vastart-defs-eflags.ll
vbinop-simplify-bug.ll
vec-copysign-avx512.ll
vec-copysign.ll [AsmPrinter] Print FP constant in hexadecimal form instead 2020-02-07 16:00:55 +00:00
vec-libcalls.ll [X86] Custom lower ISD::FROUND with SSE4.1 to avoid a libcall. 2020-01-29 09:10:02 -08:00
vec-loadsingles-alignment.ll
vec-strict-128.ll [X86] Fix errors in use of strictfp attribute. 2020-05-29 12:31:55 -04:00
vec-strict-256.ll [X86] Fix errors in use of strictfp attribute. 2020-05-29 12:31:55 -04:00
vec-strict-512.ll [X86] Fix errors in use of strictfp attribute. 2020-05-29 12:31:55 -04:00
vec-strict-cmp-128.ll [X86] Don't widen 128/256-bit strict compares with vXi1 result to 512-bits on KNL. 2020-02-13 13:26:40 -08:00
vec-strict-cmp-256.ll [X86] Don't widen 128/256-bit strict compares with vXi1 result to 512-bits on KNL. 2020-02-13 13:26:40 -08:00
vec-strict-cmp-512.ll
vec-strict-cmp-sub128.ll [x86] form broadcast of scalar memop even with >1 use 2020-02-16 10:32:56 -05:00
vec-strict-fptoint-128.ll [X86] Improve (vzmovl (insert_subvector)) combine to handle a bitcast between the vzmovl and insert 2020-06-07 19:31:06 -07:00
vec-strict-fptoint-256.ll [X86] Fix errors in use of strictfp attribute. 2020-05-29 12:31:55 -04:00
vec-strict-fptoint-512.ll [X86] Fix errors in use of strictfp attribute. 2020-05-29 12:31:55 -04:00
vec-strict-inttofp-128.ll [X86] Enable shuffle combining for AVX512 unless the root is used by a vselect 2020-04-11 20:05:10 -07:00
vec-strict-inttofp-256.ll [X86] Enable shuffle combining for AVX512 unless the root is used by a vselect 2020-04-11 20:05:10 -07:00
vec-strict-inttofp-512.ll [X86][SSE] getFauxShuffleMask - add support for INSERT_VECTOR_ELT(EXTRACT_VECTOR_ELT) shuffle pattern 2020-03-10 15:42:37 +00:00
vec-strict-round-128.ll [X86] Fix errors in use of strictfp attribute. 2020-05-29 12:31:55 -04:00
vec-trunc-store.ll
vec3.ll
vec_align.ll
vec_align_i256.ll
vec_anyext.ll
vec_call.ll
vec_cast.ll [X86] Make (insert_vector_elt (v8i16 zerovec), i16 %x, 0) generate the same code as (v8i16 (build_vector %x, 0, 0, 0, 0, 0, 0, 0)). 2020-02-09 21:52:11 -08:00
vec_cast2.ll [X86][SSE] lowerShuffleWithPACK - extend to use chained PACKs for larger truncations 2020-04-03 18:26:10 +01:00
vec_cast3.ll [DAG] SimplifyMultipleUseDemandedBits - peek through unused ISD::INSERT_SUBVECTOR subvectors 2020-01-31 18:57:22 +00:00
vec_cmp_sint-128.ll
vec_cmp_uint-128.ll
vec_compare-sse4.ll
vec_compare.ll
vec_ctbits.ll
vec_ext_inreg.ll
vec_extract-avx.ll
vec_extract-mmx.ll
vec_extract-sse4.ll
vec_extract.ll
vec_fabs.ll
vec_floor.ll
vec_fneg.ll [CodeGen] Ensure callers of CreateStackTemporary use sensible alignments 2020-06-09 08:10:17 +01:00
vec_fp_to_int.ll [X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source 2020-04-28 15:11:32 -07:00
vec_fpext.ll
vec_fptrunc.ll
vec_i64.ll
vec_ins_extract-1.ll
vec_ins_extract.ll
vec_insert-2.ll
vec_insert-3.ll
vec_insert-4.ll [CodeGen] Ensure callers of CreateStackTemporary use sensible alignments 2020-06-09 08:10:17 +01:00
vec_insert-5.ll [X86][SSE] combineCommutableSHUFP - permilps(shufps(load(),x)) --> permilps(shufps(x,load())) 2020-01-26 14:36:23 +00:00
vec_insert-7.ll [X86] Teach computeKnownBitsForTargetNode that the upper half of X86ISD::MOVQ2DQ is all zero. 2020-05-30 19:47:07 -07:00
vec_insert-8.ll
vec_insert-9.ll
vec_insert-mmx.ll
vec_int_to_fp.ll [X86] Enable shuffle combining for AVX512 unless the root is used by a vselect 2020-04-11 20:05:10 -07:00
vec_loadsingles.ll
vec_logical.ll
vec_minmax_match.ll [ValueTracking] enhance matching of umin/umax with 'not' operands 2020-04-06 11:51:59 -04:00
vec_minmax_sint.ll
vec_minmax_uint.ll
vec_partial.ll
vec_reassociate.ll
vec_return.ll
vec_saddo.ll [X86][SSE] Peek though MOVMSK source sign bits using SimplifyMultipleUseDemandedBits 2020-05-28 13:42:24 +01:00
vec_sdiv_to_shift.ll
vec_set-2.ll
vec_set-3.ll
vec_set-4.ll
vec_set-6.ll
vec_set-7.ll
vec_set-8.ll
vec_set-A.ll [x86] favor vector constant load to avoid GPR to XMM transfer, part 2 2020-05-25 08:01:48 -04:00
vec_set-B.ll [X86] Add DAG combine to replace vXi64 vzext_movl+scalar_to_vector with vYi32 vzext_movl+scalar_to_vector if the upper 32 bits of the scalar are zero. 2020-03-07 16:14:26 -08:00
vec_set-C.ll
vec_set-D.ll
vec_set-F.ll
vec_set-H.ll
vec_set.ll
vec_setcc-2.ll
vec_setcc.ll [X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases. 2020-05-09 12:19:30 -07:00
vec_shift.ll
vec_shift2.ll [x86] favor vector constant load to avoid GPR to XMM transfer, part 2 2020-05-25 08:01:48 -04:00
vec_shift3.ll
vec_shift4.ll
vec_shift5.ll [X86] Fold undef elts to 0 in getTargetVShiftByConstNode. 2020-06-05 13:39:40 -07:00
vec_shift6.ll Revert "[llvm][test] Add COM: directives before colon-less non-CHECKs in comments. NFC" 2020-05-22 05:36:15 -06:00
vec_shift7.ll
vec_shuf-insert.ll
vec_smulo.ll [X86][SSE] Peek though MOVMSK source sign bits using SimplifyMultipleUseDemandedBits 2020-05-28 13:42:24 +01:00
vec_split.ll
vec_ss_load_fold.ll
vec_ssubo.ll [X86][SSE] Peek though MOVMSK source sign bits using SimplifyMultipleUseDemandedBits 2020-05-28 13:42:24 +01:00
vec_trunc_sext.ll
vec_uaddo.ll [X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases. 2020-05-09 12:19:30 -07:00
vec_uint_to_fp-fastmath.ll [AsmPrinter] Print FP constant in hexadecimal form instead 2020-02-07 16:00:55 +00:00
vec_uint_to_fp.ll [AsmPrinter] Print FP constant in hexadecimal form instead 2020-02-07 16:00:55 +00:00
vec_umulo.ll [X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases. 2020-05-09 12:19:30 -07:00
vec_unsafe-fp-math.ll
vec_usubo.ll [X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases. 2020-05-09 12:19:30 -07:00
vec_zero-2.ll
vec_zero.ll
vec_zero_cse.ll
vecloadextract.ll
vector-bitreverse.ll [X86][SSE] Prefer trunc(movd(x)) to pextrb(x,0) 2020-03-13 18:43:04 +00:00
vector-blend.ll [X86] Always emit an integer vbroadcast_load from lowerBuildVectorAsBroadcast regardless of AVX vs AVX2 2020-03-03 10:39:11 -08:00
vector-compare-all_of.ll [X86][AVX2] combineSetCCMOVMSK - handle all_of patterns for PMOVMSKB(PACKSSBW(LO(X), HI(X))) 2020-06-07 21:08:53 +01:00
vector-compare-any_of.ll [X86][SSE] Simplify MOVMSK patterns based on comparison 2020-06-05 16:53:22 +01:00
vector-compare-combines.ll Revert "[llvm][test] Add COM: directives before colon-less non-CHECKs in comments. NFC" 2020-05-22 05:36:15 -06:00
vector-compare-results.ll [X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead. 2020-04-15 12:17:18 -07:00
vector-compare-simplify.ll
vector-constrained-fp-intrinsics-flags.ll [X86] Fix errors in use of strictfp attribute. 2020-05-29 12:31:55 -04:00
vector-constrained-fp-intrinsics-fma.ll
vector-constrained-fp-intrinsics.ll [X86] Don't scalarize v2f32->v2i64 strict_fp_to_sint/uint with avx512dq and not avx512vl. 2020-06-07 14:45:26 -07:00
vector-ext-logic.ll [X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases. 2020-05-09 12:19:30 -07:00
vector-extend-inreg.ll [CodeGen] Ensure callers of CreateStackTemporary use sensible alignments 2020-06-09 08:10:17 +01:00
vector-fshl-128.ll [X86][SSE] Add SimplifyDemandedVectorEltsForTargetShuffle to handle target shuffle variable masks 2020-06-21 11:16:07 +01:00
vector-fshl-256.ll [DAGCombiner] try to move splat after binop with splat constant 2020-05-26 08:12:46 -04:00
vector-fshl-512.ll [DAGCombiner] try to move splat after binop with splat constant 2020-05-26 08:12:46 -04:00
vector-fshl-rot-128.ll [X86][SSE] Add SimplifyDemandedVectorEltsForTargetShuffle to handle target shuffle variable masks 2020-06-21 11:16:07 +01:00
vector-fshl-rot-256.ll [DAG] Add SimplifyDemandedVectorElts binop SimplifyMultipleUseDemandedBits handling 2020-05-25 12:41:22 +01:00
vector-fshl-rot-512.ll [X86][AVX] Fold extract_subvector(broadcast(x),c) -> extract_subvector(broadcast(x),0) iff c != 0 2020-05-24 18:05:54 +01:00
vector-fshr-128.ll [X86][SSE] Add SimplifyDemandedVectorEltsForTargetShuffle to handle target shuffle variable masks 2020-06-21 11:16:07 +01:00
vector-fshr-256.ll [DAGCombiner] try to move splat after binop with splat constant 2020-05-26 08:12:46 -04:00
vector-fshr-512.ll [DAGCombiner] try to move splat after binop with splat constant 2020-05-26 08:12:46 -04:00
vector-fshr-rot-128.ll [X86][SSE] Add SimplifyDemandedVectorEltsForTargetShuffle to handle target shuffle variable masks 2020-06-21 11:16:07 +01:00
vector-fshr-rot-256.ll [DAGCombiner] try to move splat after binop with splat constant 2020-05-26 08:12:46 -04:00
vector-fshr-rot-512.ll [X86][AVX] Fold extract_subvector(broadcast(x),c) -> extract_subvector(broadcast(x),0) iff c != 0 2020-05-24 18:05:54 +01:00
vector-gep.ll
vector-half-conversions.ll [X86] Support load shrinking for strict fp nodes in combineCVTPH2PS 2020-06-07 21:09:55 -07:00
vector-idiv-sdiv-128.ll [X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases. 2020-05-09 12:19:30 -07:00
vector-idiv-sdiv-256.ll [X86] Remove the v16i8->v16i16 path for MULHS with AVX2. 2020-05-12 10:32:01 -07:00
vector-idiv-sdiv-512.ll [X86] Remove the v16i8->v16i16 path for MULHS with AVX2. 2020-05-12 10:32:01 -07:00
vector-idiv-udiv-128.ll [X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source 2020-04-28 15:11:32 -07:00
vector-idiv-udiv-256.ll [SelectionDAG] ComputeKnownBits - merge getValidMinimumShiftAmountConstant() and generic ISD::SRL handling. 2020-01-14 11:41:47 +00:00
vector-idiv-udiv-512.ll [X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead. 2020-04-15 12:17:18 -07:00
vector-idiv-v2i32.ll [X86] Add a few more shuffles to hasUndefRegUpdate. 2020-05-10 12:30:16 -07:00
vector-idiv.ll
vector-interleave.ll [x86] try harder to form 256-bit unpck* 2020-01-17 10:42:39 -05:00
vector-intrinsics.ll
vector-lzcnt-128.ll [x86] favor vector constant load to avoid GPR to XMM transfer, part 2 2020-05-25 08:01:48 -04:00
vector-lzcnt-256.ll
vector-lzcnt-512.ll
vector-lzcnt-sub128.ll
vector-merge-store-fp-constants.ll
vector-mul.ll [TargetLowering] SimplifyDemandedVectorElts - add DemandedElts mask to ISD::BITCAST SimplifyDemandedBits call. 2020-03-10 13:39:10 +00:00
vector-mulfix-legalize.ll [DAG] SimplifyDemandedBits - peek through SHL if we only demand sign bits. 2020-06-03 16:11:54 +01:00
vector-narrow-binop.ll [DAG] Add SimplifyDemandedVectorElts binop SimplifyMultipleUseDemandedBits handling 2020-05-25 12:41:22 +01:00
vector-partial-undef.ll
vector-pcmp.ll
vector-popcnt-128.ll
vector-popcnt-256.ll
vector-popcnt-512.ll [X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead. 2020-04-15 12:17:18 -07:00
vector-reduce-add.ll [X86][SSE] Prefer trunc(movd(x)) to pextrb(x,0) 2020-03-13 18:43:04 +00:00
vector-reduce-and-bool.ll [X86][SSE] Add SimplifyDemandedVectorEltsForTargetShuffle to handle target shuffle variable masks 2020-06-21 11:16:07 +01:00
vector-reduce-and-cmp.ll [X86][SSE] Add tests for and/or reduction results compared to zero 2020-06-15 10:40:45 +01:00
vector-reduce-and.ll [X86][SSE] Prefer trunc(movd(x)) to pextrb(x,0) 2020-03-13 18:43:04 +00:00
vector-reduce-fadd-fast.ll [x86] use instruction-level fast-math-flags to drive MachineCombiner 2020-02-27 15:19:37 -05:00
vector-reduce-fadd.ll [x86] form broadcast of scalar memop even with >1 use 2020-02-16 10:32:56 -05:00
vector-reduce-fmax-nnan.ll
vector-reduce-fmax.ll
vector-reduce-fmin-nnan.ll
vector-reduce-fmin.ll
vector-reduce-fmul-fast.ll [x86] use instruction-level fast-math-flags to drive MachineCombiner 2020-02-27 15:19:37 -05:00
vector-reduce-fmul.ll [x86] form broadcast of scalar memop even with >1 use 2020-02-16 10:32:56 -05:00
vector-reduce-mul.ll [X86][SSE] Add SimplifyDemandedVectorEltsForTargetShuffle to handle target shuffle variable masks 2020-06-21 11:16:07 +01:00
vector-reduce-or-bool.ll [X86][SSE] Add SimplifyDemandedVectorEltsForTargetShuffle to handle target shuffle variable masks 2020-06-21 11:16:07 +01:00
vector-reduce-or-cmp.ll Revert "[X86][SSE] MatchVectorAllZeroTest - handle OR vector reductions" 2020-06-22 21:27:11 +02:00
vector-reduce-or.ll [X86][SSE] Prefer trunc(movd(x)) to pextrb(x,0) 2020-03-13 18:43:04 +00:00
vector-reduce-smax.ll [X86] Add sse4.2 command lines to min/max reduction tests. 2020-03-29 13:51:03 -07:00
vector-reduce-smin.ll [DAG] SimplifyDemandedVectorElts - remove INSERT_SUBVECTOR if we don't demand the subvector 2020-05-01 16:20:51 +01:00
vector-reduce-umax.ll [X86] Add sse4.2 command lines to min/max reduction tests. 2020-03-29 13:51:03 -07:00
vector-reduce-umin.ll [X86] Add sse4.2 command lines to min/max reduction tests. 2020-03-29 13:51:03 -07:00
vector-reduce-xor-bool.ll [X86][SSE] Add SimplifyDemandedVectorEltsForTargetShuffle to handle target shuffle variable masks 2020-06-21 11:16:07 +01:00
vector-reduce-xor.ll [X86][SSE] Prefer trunc(movd(x)) to pextrb(x,0) 2020-03-13 18:43:04 +00:00
vector-rem.ll
vector-rotate-128.ll [X86][SSE] Add SimplifyDemandedVectorEltsForTargetShuffle to handle target shuffle variable masks 2020-06-21 11:16:07 +01:00
vector-rotate-256.ll [X86][AVX] Fold extract_subvector(broadcast(x),c) -> extract_subvector(broadcast(x),0) iff c != 0 2020-05-24 18:05:54 +01:00
vector-rotate-512.ll [X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead. 2020-04-15 12:17:18 -07:00
vector-sext.ll [SelectionDAG] Unify scalarizeVectorLoad and VectorLegalizer::ExpandLoad 2020-05-02 15:18:10 -07:00
vector-shift-ashr-128.ll [DAGCombiner] try to move splat after binop with splat constant 2020-05-26 08:12:46 -04:00
vector-shift-ashr-256.ll [X86][AVX] Fold extract_subvector(broadcast(x),c) -> extract_subvector(broadcast(x),0) iff c != 0 2020-05-24 18:05:54 +01:00
vector-shift-ashr-512.ll [X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases. 2020-05-09 12:19:30 -07:00
vector-shift-ashr-sub128.ll [X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases. 2020-05-09 12:19:30 -07:00
vector-shift-by-select-loop.ll [x86][CGP] improve sinking of splatted vector shift amount operand 2020-05-14 08:36:03 -04:00
vector-shift-lshr-128.ll [DAGCombiner] try to move splat after binop with splat constant 2020-05-26 08:12:46 -04:00
vector-shift-lshr-256.ll [X86][AVX] Fold extract_subvector(broadcast(x),c) -> extract_subvector(broadcast(x),0) iff c != 0 2020-05-24 18:05:54 +01:00
vector-shift-lshr-512.ll [X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead. 2020-04-15 12:17:18 -07:00
vector-shift-lshr-sub128.ll [SelectionDAG] ComputeKnownBits - minimum leading/trailing zero bits in LSHR/SHL (PR44526) 2020-01-13 11:08:12 +00:00
vector-shift-shl-128.ll [X86][SSE] Add SimplifyDemandedVectorEltsForTargetShuffle to handle target shuffle variable masks 2020-06-21 11:16:07 +01:00
vector-shift-shl-256.ll [X86][AVX] Fold extract_subvector(broadcast(x),c) -> extract_subvector(broadcast(x),0) iff c != 0 2020-05-24 18:05:54 +01:00
vector-shift-shl-512.ll [X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead. 2020-04-15 12:17:18 -07:00
vector-shift-shl-sub128.ll [X86][SSE] Add SimplifyDemandedVectorEltsForTargetShuffle to handle target shuffle variable masks 2020-06-21 11:16:07 +01:00
vector-shuffle-128-unpck.ll
vector-shuffle-128-v2.ll
vector-shuffle-128-v4.ll [X86][AVX] Add X86ISD::VALIGN target shuffle decode support 2020-03-29 16:41:58 +01:00
vector-shuffle-128-v8.ll [X86][SSE] Add SimplifyDemandedVectorEltsForTargetShuffle to handle target shuffle variable masks 2020-06-21 11:16:07 +01:00
vector-shuffle-128-v16.ll [X86] Prefer PACKUS(AND(),AND()) to SHUFFLE(PSHUFB(),PSHUFB()) on all targets 2020-03-26 20:46:24 +00:00
vector-shuffle-256-v4.ll [X86][AVX] Use lowerShuffleAsLanePermuteAndSHUFP to lower binary v4f64 shuffles. 2020-01-12 12:29:41 +00:00
vector-shuffle-256-v8.ll [X86][SSE] Add SimplifyDemandedVectorEltsForTargetShuffle to handle target shuffle variable masks 2020-06-21 11:16:07 +01:00
vector-shuffle-256-v16.ll [X86][SSE] Add SimplifyDemandedVectorEltsForTargetShuffle to handle target shuffle variable masks 2020-06-21 11:16:07 +01:00
vector-shuffle-256-v32.ll [X86][SSE] Add SimplifyDemandedVectorEltsForTargetShuffle to handle target shuffle variable masks 2020-06-21 11:16:07 +01:00
vector-shuffle-512-v8.ll [x86] favor vector constant load to avoid GPR to XMM transfer, part 2 2020-05-25 08:01:48 -04:00
vector-shuffle-512-v16.ll [X86][AVX] Attempt to lower v16i32/v16f32 shuffles with lowerShuffleAsRepeatedMaskAndLanePermute 2020-06-23 18:33:50 +01:00
vector-shuffle-512-v32.ll [x86] favor vector constant load to avoid GPR to XMM transfer, part 2 2020-05-25 08:01:48 -04:00
vector-shuffle-512-v64.ll [x86] favor vector constant load to avoid GPR to XMM transfer, part 2 2020-05-25 08:01:48 -04:00
vector-shuffle-avx512.ll [X86][SSE] Add SimplifyDemandedVectorEltsForTargetShuffle to handle target shuffle variable masks 2020-06-21 11:16:07 +01:00
vector-shuffle-combining-avx.ll [X86][AVX] Reduce unary target shuffles width if the upper elements aren't demanded. 2020-05-31 20:19:24 +01:00
vector-shuffle-combining-avx2.ll [X86][SSE] Add SimplifyDemandedVectorEltsForTargetShuffle to handle target shuffle variable masks 2020-06-21 11:16:07 +01:00
vector-shuffle-combining-avx512bw.ll [X86][SSE] Add SimplifyDemandedVectorEltsForTargetShuffle to handle target shuffle variable masks 2020-06-21 11:16:07 +01:00
vector-shuffle-combining-avx512bwvl.ll [X86][AVX] getFauxShuffleMask - fix sub vector size check in INSERT_SUBVECTOR(X,SHUFFLE(Y,Z)) 2020-06-03 15:26:22 +01:00
vector-shuffle-combining-avx512f.ll [x86] favor vector constant load to avoid GPR to XMM transfer, part 2 2020-05-25 08:01:48 -04:00
vector-shuffle-combining-avx512vbmi.ll [X86][AVX] Attempt to scale masked shuffles to match the root type 2020-04-13 14:57:25 +01:00
vector-shuffle-combining-sse4a.ll
vector-shuffle-combining-sse41.ll
vector-shuffle-combining-ssse3.ll [X86][SSE] Add SimplifyDemandedVectorEltsForTargetShuffle to handle target shuffle variable masks 2020-06-21 11:16:07 +01:00
vector-shuffle-combining-xop.ll [X86][SSE] combineX86ShuffleChain - combine INSERT_VECTOR_ELT patterns to INSERTPS 2020-06-12 11:59:01 +01:00
vector-shuffle-combining.ll [X86][SSE] Add SimplifyDemandedVectorEltsForTargetShuffle to handle target shuffle variable masks 2020-06-21 11:16:07 +01:00
vector-shuffle-masked.ll
vector-shuffle-mmx.ll
vector-shuffle-sse1.ll
vector-shuffle-sse4a.ll
vector-shuffle-sse41.ll [X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source 2020-04-28 15:11:32 -07:00
vector-shuffle-v1.ll [X86] Fold vXi1 OR(KSHIFTL(X,NumElts/2),Y) -> KUNPCK 2020-06-11 15:47:20 +01:00
vector-shuffle-v48.ll
vector-shuffle-variable-128.ll [X86] Make (insert_vector_elt (v8i16 zerovec), i16 %x, 0) generate the same code as (v8i16 (build_vector %x, 0, 0, 0, 0, 0, 0, 0)). 2020-02-09 21:52:11 -08:00
vector-shuffle-variable-256.ll
vector-sqrt.ll
vector-trunc-math.ll [X86][SSE] Add SimplifyDemandedVectorEltsForTargetShuffle to handle target shuffle variable masks 2020-06-21 11:16:07 +01:00
vector-trunc-packus.ll [X86][SSE] Add SimplifyDemandedVectorEltsForTargetShuffle to handle target shuffle variable masks 2020-06-21 11:16:07 +01:00
vector-trunc-ssat.ll [X86][SSE] Add SimplifyDemandedVectorEltsForTargetShuffle to handle target shuffle variable masks 2020-06-21 11:16:07 +01:00
vector-trunc-usat.ll [X86][SSE] Add SimplifyDemandedVectorEltsForTargetShuffle to handle target shuffle variable masks 2020-06-21 11:16:07 +01:00
vector-trunc.ll [X86][SSE] Add SimplifyDemandedVectorEltsForTargetShuffle to handle target shuffle variable masks 2020-06-21 11:16:07 +01:00
vector-truncate-combine.ll
vector-tzcnt-128.ll [x86] favor vector constant load to avoid GPR to XMM transfer, part 2 2020-05-25 08:01:48 -04:00
vector-tzcnt-256.ll
vector-tzcnt-512.ll [X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead. 2020-04-15 12:17:18 -07:00
vector-unsigned-cmp.ll
vector-variable-idx.ll
vector-variable-idx2.ll
vector-width-store-merge.ll
vector-zext.ll [X86][SSE] Add SimplifyDemandedVectorEltsForTargetShuffle to handle target shuffle variable masks 2020-06-21 11:16:07 +01:00
vector-zmov.ll
vector.ll
vector_splat-const-shift-of-constmasked.ll
vectorcall.ll [X86] Cleanup vectorcall test checks 2020-04-04 22:46:56 +01:00
version_directive.ll
vfcmp.ll
viabs.ll [X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead. 2020-04-15 12:17:18 -07:00
virtreg-physreg-def-regallocfast.mir
virtual-registers-cleared-in-machine-functions-liveins.ll
visibility.ll
visibility2.ll
vmaskmov-offset.ll
vmovq.ll [x86] favor vector constant load to avoid GPR to XMM transfer 2020-05-17 11:56:26 -04:00
volatile-memstores-nooverlapping-load-stores.ll
volatile.ll
vortex-bug.ll
vp2intersect_multiple_pairs.ll [X86] Move expansion of MASKPAIR16LOAD and MASKPAIR16STORE from X86MCInstLower to X86ExpandPseudo. 2020-05-15 09:51:32 -07:00
vpshufbitqbm-intrinsics-upgrade.ll
vpshufbitqbm-intrinsics.ll
vsel-cmp-load.ll
vselect-2.ll
vselect-avx.ll
vselect-constants.ll [DAGCombine] foldVSelectOfConstants - ensure constants are same type 2020-03-12 20:02:05 +00:00
vselect-minmax.ll
vselect-packss.ll
vselect-pcmp.ll
vselect-zero.ll
vselect.ll
vshift-1.ll
vshift-2.ll
vshift-3.ll
vshift-4.ll
vshift-5.ll
vshift-6.ll
vshift_scalar.ll
vshift_split.ll
vshift_split2.ll
vshli-simplify-demanded-bits.ll [X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases. 2020-05-09 12:19:30 -07:00
vsplit-and.ll
vzero-excess.ll
waitpkg-intrinsics.ll
warn-stack.ll
wbinvd-intrinsic.ll
wbnoinvd-intrinsic.ll
weak-undef.ll
weak.ll
weak_def_can_be_hidden.ll
webkit-jscc.ll
wide-fma-contraction.ll [X86] X86InstComments - add FMA4 comments 2020-02-08 17:02:00 +00:00
wide-integer-cmp.ll
wide-integer-fold.ll
widen_arith-1.ll
widen_arith-2.ll
widen_arith-3.ll
widen_arith-4.ll
widen_arith-5.ll
widen_arith-6.ll
widen_bitops-0.ll [X86][SSE] Prefer trunc(movd(x)) to pextrb(x,0) 2020-03-13 18:43:04 +00:00
widen_bitops-1.ll
widen_cast-1.ll
widen_cast-2.ll [SelectionDAG] Fix usage of Align constructing MachineMemOperands. 2020-04-15 13:01:41 -07:00
widen_cast-3.ll
widen_cast-4.ll
widen_cast-5.ll
widen_cast-6.ll
widen_compare-1.ll
widen_conv-1.ll
widen_conv-2.ll
widen_conv-3.ll
widen_conv-4.ll
widen_conversions.ll
widen_extract-1.ll
widen_load-0.ll
widen_load-1.ll
widen_load-2.ll [SelectionDAG] Fix usage of Align constructing MachineMemOperands. 2020-04-15 13:01:41 -07:00
widen_load-3.ll
widen_mul.ll [X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases. 2020-05-09 12:19:30 -07:00
widen_shuffle-1.ll
widened-broadcast.ll
win-alloca-expander.ll
win-catchpad-csrs.ll
win-catchpad-nested-cxx.ll [Windows EH] Fix the order of Nested try-catches in $tryMap$ table 2020-05-15 22:03:43 -07:00
win-catchpad-nested.ll
win-catchpad-varargs.ll
win-catchpad.ll
win-cleanuppad.ll
win-funclet-cfi.ll
win-mixed-ehpersonality.ll
win-smallparams.ll
win32-bool.ll
win32-eh-available-externally.ll
win32-eh-states.ll
win32-eh.ll
win32-pic-jumptable.ll
win32-preemption.ll
win32-seh-catchpad-realign.ll
win32-seh-catchpad.ll
win32-seh-nested-finally.ll
win32-spill-xmm.ll
win32-ssp.ll
win32_sret.ll
win64-bool.ll
win64-byval.ll
win64-eh-empty-block-2.mir [Win64] Insert int3 into trailing empty BBs 2020-03-23 08:50:37 -07:00
win64-eh-empty-block.ll [Win64] Insert int3 into trailing empty BBs 2020-03-23 08:50:37 -07:00
win64-funclet-savexmm.ll
win64-jumptable.ll
win64-long-double.ll
win64-nosse-csrs.ll
win64-stackprobe-overflow.ll
win64_alloca_dynalloca.ll
win64_call_epi.ll
win64_eh.ll
win64_eh_leaf.ll
win64_eh_leaf2.ll
win64_frame.ll
win64_nonvol.ll
win64_params.ll
win64_sibcall.ll
win64_vararg.ll
win_chkstk.ll
win_coreclr_chkstk.ll
win_coreclr_chkstk_liveins.mir
win_cst_pool.ll [AsmPrinter] Print FP constant in hexadecimal form instead 2020-02-07 16:00:55 +00:00
windows-itanium-alloca.ll
wineh-coreclr.ll [Win64] Insert int3 into trailing empty BBs 2020-03-23 08:50:37 -07:00
wineh-exceptionpointer.ll
wineh-no-ehpads.ll
x32-cet-intrinsics.ll
x32-function_pointer-1.ll
x32-function_pointer-2.ll
x32-function_pointer-3.ll
x32-indirectbr.ll
x32-landingpad.ll
x32-lea-1.ll
x32-movtopush64.ll
x32-va_start.ll
x64-cet-intrinsics.ll
x86-16.ll
x86-32-intrcc.ll
x86-32-vector-calling-conv.ll
x86-64-and-mask.ll
x86-64-arg.ll
x86-64-asm.ll
x86-64-baseptr.ll
x86-64-bittest-logic.ll
x86-64-call.ll
x86-64-disp.ll
x86-64-double-precision-shift-left.ll [DAG] MatchRotate - Add funnel shift by immediate support 2020-03-11 18:55:18 +00:00
x86-64-double-precision-shift-right.ll
x86-64-double-shifts-Oz-Os-O2.ll [DAG] MatchRotate - Add funnel shift by immediate support 2020-03-11 18:55:18 +00:00
x86-64-double-shifts-var.ll
x86-64-extend-shift.ll
x86-64-flags-intrinsics.ll
x86-64-gv-offset.ll
x86-64-intrcc-nosse.ll
x86-64-intrcc.ll
x86-64-jumps.ll
x86-64-mem.ll
x86-64-ms_abi-vararg.ll
x86-64-pic-1.ll
x86-64-pic-2.ll
x86-64-pic-3.ll
x86-64-pic-4.ll
x86-64-pic-5.ll
x86-64-pic-6.ll
x86-64-pic-7.ll
x86-64-pic-8.ll
x86-64-pic-9.ll
x86-64-pic-10.ll
x86-64-pic-11.ll
x86-64-pic-12.ll
x86-64-pic.ll
x86-64-plt-relative-reloc.ll
x86-64-psub.ll
x86-64-ptr-arg-simple.ll
x86-64-ret0.ll
x86-64-shortint.ll
x86-64-sret-return-2.ll
x86-64-sret-return.ll
x86-64-stack-and-frame-ptr.ll
x86-64-static-relo-movl.ll
x86-64-tls-1.ll
x86-64-varargs.ll
x86-64-veccallcc.ll
x86-big-ret.ll
x86-cmov-converter.ll
x86-flags-intrinsics.ll
x86-fold-pshufb.ll
x86-framelowering-trap.ll
x86-inline-asm-validation.ll
x86-interleaved-access.ll [X86] Combine concat(palignr,palignr) -> palignr(concat,concat) 2020-03-31 11:06:35 +01:00
x86-interleaved-check.ll
x86-interrupt_cc.ll
x86-interrupt_cld.ll
x86-interrupt_vzeroupper.ll
x86-mixed-alignment-dagcombine.ll
x86-no_caller_saved_registers-preserve.ll
x86-no_caller_saved_registers.ll
x86-plt-relative-reloc.ll
x86-repmov-copy-eflags.ll
x86-sanitizer-shrink-wrapping.ll
x86-setcc-int-to-fp-combine.ll [X86] Fix combineVectorCompareAndMaskUnaryOp regression after 0e8e731449 2020-05-10 19:03:38 -07:00
x86-shifts.ll
x86-shrink-wrap-unwind.ll
x86-shrink-wrapping.ll
x86-store-gv-addr.ll
x86-upgrade-avx-vbroadcast.ll
x86-upgrade-avx2-vbroadcast.ll
x86-win64-shrink-wrapping.ll
x86_64-mul-by-const.ll
x87-reg-usage.mir
x87.ll
xaluo.ll
xchg-nofold.ll
xmm-r64.ll
xmulo.ll
xop-ifma.ll
xop-intrinsics-fast-isel.ll
xop-intrinsics-x86_64-upgrade.ll
xop-intrinsics-x86_64.ll
xop-mask-comments.ll
xop-pcmov.ll
xor-combine-debugloc.ll
xor-icmp.ll [x86] add tests for awkward 'icmp eq i1'; NFC 2020-04-29 14:39:47 -04:00
xor-select-i1-combine.ll
xor.ll
xray-attribute-instrumentation.ll [XRay] Change xray_instr_map sled addresses from absolute to PC relative for x86-64 2020-04-21 09:36:09 -07:00
xray-custom-log.ll Revert "Reland "[DebugInfo] Enable the debug entry values feature by default"" 2020-02-20 14:41:39 +01:00
xray-empty-firstmbb.mir
xray-ignore-loop-detection.ll [xray] Add xray-ignore-loops option 2020-01-17 13:32:17 -08:00
xray-log-args.ll [XRay] Change Sled.Function to PC-relative for sled version 2 and make llvm-xray support sled version 2 addresses 2020-04-24 14:41:56 -07:00
xray-loop-detection.ll [xray] Add xray-ignore-loops option 2020-01-17 13:32:17 -08:00
xray-multiplerets-in-blocks.mir
xray-partial-instrumentation-skip-entry.ll [xray] Allow instrumenting only function entry and/or only function exit 2020-01-17 13:32:34 -08:00
xray-partial-instrumentation-skip-exit.ll [xray] Allow instrumenting only function entry and/or only function exit 2020-01-17 13:32:34 -08:00
xray-section-group.ll [XRay] Change xray_instr_map sled addresses from absolute to PC relative for x86-64 2020-04-21 09:36:09 -07:00
xray-selective-instrumentation-miss.ll
xray-selective-instrumentation.ll
xray-tail-call-sled.ll
xray-typed-event-log.ll Revert "Reland "[DebugInfo] Enable the debug entry values feature by default"" 2020-02-20 14:41:39 +01:00
xtest.ll
zero-remat.ll
zext-demanded.ll
zext-extract_subreg.ll
zext-fold.ll
zext-inreg-0.ll
zext-inreg-1.ll
zext-logicop-shift-load.ll
zext-sext.ll
zext-shl.ll
zext-trunc.ll
zlib-longest-match.ll