forked from OSchip/llvm-project
51 lines
1.8 KiB
LLVM
51 lines
1.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -simplifycfg -switch-to-lookup -S %s | FileCheck %s
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; RUN: opt -passes='simplify-cfg<switch-to-lookup>' -S %s | FileCheck %s
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; rdar://15268442
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target datalayout = "e-p:64:64:64-S128-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f16:16:16-f32:32:32-f64:64:64-f128:128:128-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
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target triple = "x86_64-apple-darwin12.0.0"
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define i3 @coveredswitch_test(i3 %input) {
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; CHECK-LABEL: @coveredswitch_test(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[SWITCH_TABLEIDX:%.*]] = sub i3 [[INPUT:%.*]], -4
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; CHECK-NEXT: [[SWITCH_CAST:%.*]] = zext i3 [[SWITCH_TABLEIDX]] to i24
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; CHECK-NEXT: [[SWITCH_SHIFTAMT:%.*]] = mul i24 [[SWITCH_CAST]], 3
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; CHECK-NEXT: [[SWITCH_DOWNSHIFT:%.*]] = lshr i24 7507338, [[SWITCH_SHIFTAMT]]
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; CHECK-NEXT: [[SWITCH_MASKED:%.*]] = trunc i24 [[SWITCH_DOWNSHIFT]] to i3
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; CHECK-NEXT: ret i3 [[SWITCH_MASKED]]
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;
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entry:
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switch i3 %input, label %bb8 [
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i3 0, label %bb7
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i3 1, label %bb
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i3 2, label %bb3
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i3 3, label %bb4
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i3 4, label %bb5
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i3 5, label %bb6
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]
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bb: ; preds = %entry
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br label %bb8
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bb3: ; preds = %entry
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br label %bb8
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bb4: ; preds = %entry
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br label %bb8
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bb5: ; preds = %entry
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br label %bb8
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bb6: ; preds = %entry
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br label %bb8
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bb7: ; preds = %entry
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br label %bb8
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bb8: ; preds = %bb7, %bb6, %bb5, %bb4, %bb3, %bb, %entry
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%result = phi i3 [ 0, %bb7 ], [ 1, %bb6 ], [ 2, %bb5 ], [ 3, %bb4 ], [ 4, %bb3 ], [ 5, %bb ], [ 6, %entry ]
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ret i3 %result
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}
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