forked from OSchip/llvm-project
377 lines
15 KiB
LLVM
377 lines
15 KiB
LLVM
; RUN: llc -march=amdgcn -mcpu=tahiti -mattr=+fast-fmaf,-fp32-denormals -enable-unsafe-fp-math -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=GCN-FLUSH %s
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; RUN: llc -march=amdgcn -mcpu=tahiti -mattr=-fast-fmaf,-fp32-denormals -enable-unsafe-fp-math -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=GCN-FLUSH %s
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; RUN: llc -march=amdgcn -mcpu=tahiti -mattr=+fast-fmaf,+fp32-denormals -enable-unsafe-fp-math -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=GCN-FASTFMA %s
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; RUN: llc -march=amdgcn -mcpu=tahiti -mattr=-fast-fmaf,+fp32-denormals -enable-unsafe-fp-math -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=GCN-SLOWFMA %s
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; FIXME: This should also fold when fma is actually fast if an FMA
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; exists in the original program.
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; (fadd (fma x, y, (fmul u, v), z) -> (fma x, y (fma u, v, z))
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; GCN-LABEL: {{^}}fast_add_fmuladd_fmul:
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; GCN: buffer_load_dword [[X:v[0-9]+]]
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; GCN: buffer_load_dword [[Y:v[0-9]+]]
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; GCN: buffer_load_dword [[Z:v[0-9]+]]
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; GCN: buffer_load_dword [[U:v[0-9]+]]
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; GCN: buffer_load_dword [[V:v[0-9]+]]
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; GCN-FLUSH: v_mac_f32_e32 [[Z]], [[U]], [[V]]
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; GCN-FLUSH-NEXT: v_mac_f32_e32 [[Z]], [[X]], [[Y]]
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; GCN-FLUSH-NEXT: buffer_store_dword [[Z]]
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; GCN-FASTFMA: v_fma_f32 [[FMA0:v[0-9]+]], [[U]], [[V]], [[Z]]
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; GCN-FASTFMA: v_fma_f32 [[FMA1:v[0-9]+]], [[X]], [[Y]], [[FMA0]]
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; GCN-FASTFMA: buffer_store_dword [[FMA1]]
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; GCN-SLOWFMA: v_mul_f32_e32
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; GCN-SLOWFMA: v_mul_f32_e32
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; GCN-SLOWFMA: v_add_f32_e32
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; GCN-SLOWFMA: v_add_f32_e32
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define amdgpu_kernel void @fast_add_fmuladd_fmul() #0 {
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%x = load volatile float, float addrspace(1)* undef
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%y = load volatile float, float addrspace(1)* undef
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%z = load volatile float, float addrspace(1)* undef
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%u = load volatile float, float addrspace(1)* undef
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%v = load volatile float, float addrspace(1)* undef
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%mul.u.v = fmul fast float %u, %v
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%fma = call fast float @llvm.fmuladd.f32(float %x, float %y, float %mul.u.v)
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%add = fadd fast float %fma, %z
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store volatile float %add, float addrspace(1)* undef
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ret void
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}
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; GCN-LABEL: {{^}}fast_sub_fmuladd_fmul:
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; GCN: buffer_load_dword [[X:v[0-9]+]]
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; GCN: buffer_load_dword [[Y:v[0-9]+]]
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; GCN: buffer_load_dword [[Z:v[0-9]+]]
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; GCN: buffer_load_dword [[U:v[0-9]+]]
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; GCN: buffer_load_dword [[V:v[0-9]+]]
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; GCN-FLUSH: v_mad_f32 [[TMP:v[0-9]]], [[U]], [[V]], -[[Z]]
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; GCN-FLUSH-NEXT: v_mac_f32_e32 [[TMP]], [[X]], [[Y]]
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; GCN-FLUSH-NEXT: buffer_store_dword [[Z]]
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; GCN-FASTFMA: v_fma_f32 [[FMA0:v[0-9]+]], [[U]], [[V]], -[[Z]]
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; GCN-FASTFMA: v_fma_f32 [[FMA1:v[0-9]+]], [[X]], [[Y]], [[FMA0]]
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; GCN-FASTFMA: buffer_store_dword [[FMA1]]
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define amdgpu_kernel void @fast_sub_fmuladd_fmul() #0 {
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%x = load volatile float, float addrspace(1)* undef
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%y = load volatile float, float addrspace(1)* undef
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%z = load volatile float, float addrspace(1)* undef
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%u = load volatile float, float addrspace(1)* undef
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%v = load volatile float, float addrspace(1)* undef
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%mul.u.v = fmul fast float %u, %v
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%fma = call fast float @llvm.fmuladd.f32(float %x, float %y, float %mul.u.v)
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%add = fsub fast float %fma, %z
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store volatile float %add, float addrspace(1)* undef
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ret void
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}
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; GCN-LABEL: {{^}}fast_add_fmuladd_fmul_multi_use_mul:
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; GCN: buffer_load_dword [[X:v[0-9]+]]
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; GCN: buffer_load_dword [[Y:v[0-9]+]]
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; GCN: buffer_load_dword [[Z:v[0-9]+]]
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; GCN: buffer_load_dword [[U:v[0-9]+]]
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; GCN: buffer_load_dword [[V:v[0-9]+]]
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; GCN-FLUSH-DAG: v_mul_f32_e32 [[MUL:v[0-9]+]], [[U]], [[V]]
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; GCN-FLUSH-DAG: v_mac_f32_e32 [[MUL]], [[X]], [[Y]]
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; GCN-FLUSH: v_add_f32_e32 v{{[0-9]+}}, [[U]], [[Z]]
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; GCN-FASTFMA: v_mul_f32_e32 [[MUL:v[0-9]+]], [[U]], [[V]]
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; GCN-FASTFMA: v_fma_f32 [[FMA1:v[0-9]+]], [[X]], [[Y]], [[MUL]]
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; GCN-FASTFMA: v_add_f32_e32 v{{[0-9]+}}, [[FMA1]], [[Z]]
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; GCN-SLOWFMA: v_mul_f32_e32
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; GCN-SLOWFMA: v_mul_f32_e32
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; GCN-SLOWFMA: v_add_f32_e32
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; GCN-SLOWFMA: v_add_f32_e32
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define amdgpu_kernel void @fast_add_fmuladd_fmul_multi_use_mul() #0 {
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%x = load volatile float, float addrspace(1)* undef
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%y = load volatile float, float addrspace(1)* undef
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%z = load volatile float, float addrspace(1)* undef
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%u = load volatile float, float addrspace(1)* undef
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%v = load volatile float, float addrspace(1)* undef
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%mul.u.v = fmul fast float %u, %v
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store volatile float %mul.u.v, float addrspace(1)* undef
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%fma = call fast float @llvm.fmuladd.f32(float %x, float %y, float %mul.u.v)
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%add = fadd fast float %fma, %z
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store volatile float %add, float addrspace(1)* undef
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ret void
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}
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; GCN-LABEL: {{^}}fast_add_fmuladd_fmul_multi_use_mul_commute:
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; GCN: buffer_load_dword [[X:v[0-9]+]]
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; GCN: buffer_load_dword [[Y:v[0-9]+]]
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; GCN: buffer_load_dword [[Z:v[0-9]+]]
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; GCN: buffer_load_dword [[U:v[0-9]+]]
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; GCN: buffer_load_dword [[V:v[0-9]+]]
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; GCN-FLUSH-DAG: v_mul_f32_e32 [[MUL:v[0-9]+]], [[U]], [[V]]
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; GCN-FLUSH-DAG: v_mac_f32_e32 [[MUL]], [[X]], [[Y]]
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; GCN-FLUSH: v_add_f32_e32 v{{[0-9]+}}, [[Z]], [[U]]
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; GCN-FASTFMA: v_mul_f32_e32 [[MUL:v[0-9]+]], [[U]], [[V]]
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; GCN-FASTFMA: v_fma_f32 [[FMA1:v[0-9]+]], [[X]], [[Y]], [[MUL]]
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; GCN-FASTFMA: v_add_f32_e32 v{{[0-9]+}}, [[Z]], [[FMA1]]
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; GCN-SLOWFMA: v_mul_f32_e32
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; GCN-SLOWFMA: v_mul_f32_e32
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; GCN-SLOWFMA: v_add_f32_e32
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; GCN-SLOWFMA: v_add_f32_e32
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define amdgpu_kernel void @fast_add_fmuladd_fmul_multi_use_mul_commute() #0 {
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%x = load volatile float, float addrspace(1)* undef
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%y = load volatile float, float addrspace(1)* undef
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%z = load volatile float, float addrspace(1)* undef
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%u = load volatile float, float addrspace(1)* undef
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%v = load volatile float, float addrspace(1)* undef
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%mul.u.v = fmul fast float %u, %v
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store volatile float %mul.u.v, float addrspace(1)* undef
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%fma = call fast float @llvm.fmuladd.f32(float %x, float %y, float %mul.u.v)
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%add = fadd fast float %z, %fma
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store volatile float %add, float addrspace(1)* undef
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ret void
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}
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; GCN-LABEL: {{^}}fast_add_fmuladd_fmul_multi_use_fmuladd:
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; GCN: buffer_load_dword [[X:v[0-9]+]]
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; GCN: buffer_load_dword [[Y:v[0-9]+]]
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; GCN: buffer_load_dword [[Z:v[0-9]+]]
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; GCN: buffer_load_dword [[U:v[0-9]+]]
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; GCN: buffer_load_dword [[V:v[0-9]+]]
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; GCN-SLOWFMA: v_mul_f32_e32
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; GCN-SLOWFMA: v_mul_f32_e32
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; GCN-SLOWFMA: v_add_f32_e32
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; GCN-SLOWFMA: v_add_f32_e32
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define amdgpu_kernel void @fast_add_fmuladd_fmul_multi_use_fmuladd() #0 {
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%x = load volatile float, float addrspace(1)* undef
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%y = load volatile float, float addrspace(1)* undef
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%z = load volatile float, float addrspace(1)* undef
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%u = load volatile float, float addrspace(1)* undef
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%v = load volatile float, float addrspace(1)* undef
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%mul.u.v = fmul fast float %u, %v
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%fma = call fast float @llvm.fmuladd.f32(float %x, float %y, float %mul.u.v)
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store volatile float %fma, float addrspace(1)* undef
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%add = fadd fast float %fma, %z
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store volatile float %add, float addrspace(1)* undef
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ret void
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}
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; GCN-LABEL: {{^}}fast_add_fmuladd_fmul_multi_use_fmuladd_commute:
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; GCN: buffer_load_dword [[X:v[0-9]+]]
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; GCN: buffer_load_dword [[Y:v[0-9]+]]
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; GCN: buffer_load_dword [[Z:v[0-9]+]]
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; GCN: buffer_load_dword [[U:v[0-9]+]]
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; GCN: buffer_load_dword [[V:v[0-9]+]]
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; GCN-SLOWFMA: v_mul_f32_e32
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; GCN-SLOWFMA: v_mul_f32_e32
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; GCN-SLOWFMA: v_add_f32_e32
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; GCN-SLOWFMA: v_add_f32_e32
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define amdgpu_kernel void @fast_add_fmuladd_fmul_multi_use_fmuladd_commute() #0 {
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%x = load volatile float, float addrspace(1)* undef
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%y = load volatile float, float addrspace(1)* undef
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%z = load volatile float, float addrspace(1)* undef
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%u = load volatile float, float addrspace(1)* undef
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%v = load volatile float, float addrspace(1)* undef
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%mul.u.v = fmul fast float %u, %v
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%fma = call fast float @llvm.fmuladd.f32(float %x, float %y, float %mul.u.v)
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store volatile float %fma, float addrspace(1)* undef
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%add = fadd fast float %z, %fma
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store volatile float %add, float addrspace(1)* undef
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ret void
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}
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; GCN-LABEL: {{^}}fast_sub_fmuladd_fmul_multi_use_mul:
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; GCN: buffer_load_dword [[X:v[0-9]+]]
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; GCN: buffer_load_dword [[Y:v[0-9]+]]
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; GCN: buffer_load_dword [[Z:v[0-9]+]]
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; GCN: buffer_load_dword [[U:v[0-9]+]]
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; GCN: buffer_load_dword [[V:v[0-9]+]]
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; GCN-DAG: v_mul_f32_e32 [[MUL:v[0-9]+]], [[U]], [[V]]
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; GCN-FLUSH: v_mad_f32 [[MAD:v[0-9]+]], [[X]], [[Y]], [[MUL]]
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; GCN-FLUSH: v_sub_f32_e32 [[SUB:v[0-9]+]], [[MAD]], [[Z]]
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; GCN-FASTFMA: v_fma_f32 [[MAD:v[0-9]+]], [[X]], [[Y]], [[MUL]]
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; GCN-FASTFMA: v_sub_f32_e32 [[SUB:v[0-9]+]], [[MAD]], [[Z]]
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; GCN-SLOWFMA-DAG: v_mul_f32_e32 v{{[0-9]+}}, [[X]], [[Y]]
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; GCN-SLOWFMA: v_add_f32_e32
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; GCN-SLOWFMA: v_sub_f32_e32 [[MAD:v[0-9]+]]
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; GCN: buffer_store_dword [[MUL]]
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; GCN: buffer_store_dword [[MAD]]
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define amdgpu_kernel void @fast_sub_fmuladd_fmul_multi_use_mul() #0 {
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%x = load volatile float, float addrspace(1)* undef
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%y = load volatile float, float addrspace(1)* undef
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%z = load volatile float, float addrspace(1)* undef
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%u = load volatile float, float addrspace(1)* undef
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%v = load volatile float, float addrspace(1)* undef
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%mul.u.v = fmul fast float %u, %v
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%fma = call fast float @llvm.fmuladd.f32(float %x, float %y, float %mul.u.v)
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%add = fsub fast float %fma, %z
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store volatile float %mul.u.v, float addrspace(1)* undef
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store volatile float %add, float addrspace(1)* undef
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ret void
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}
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; GCN-LABEL: {{^}}fast_sub_fmuladd_fmul_multi_use_fmuladd_lhs:
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; GCN: buffer_load_dword [[X:v[0-9]+]]
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; GCN: buffer_load_dword [[Y:v[0-9]+]]
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; GCN: buffer_load_dword [[Z:v[0-9]+]]
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; GCN: buffer_load_dword [[U:v[0-9]+]]
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; GCN: buffer_load_dword [[V:v[0-9]+]]
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; GCN-DAG: v_mul_f32_e32 [[MUL:v[0-9]+]], [[U]], [[V]]
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; GCN-FLUSH-NEXT: v_mac_f32_e32 [[MUL]], [[X]], [[Y]]
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; GCN-FLUSH-NEXT: v_sub_f32_e32 [[SUB:v[0-9]+]], [[MUL]], [[Z]]
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; GCN-FLUSH-NEXT: buffer_store_dword [[MUL]]
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; GCN-FLUSH-NEXT: buffer_store_dword [[SUB]]
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; GCN-FASTFMA-NEXT: v_fma_f32 [[FMA:v[0-9]+]], [[X]], [[Y]], [[U]]
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; GCN-FASTFMA-NEXT: v_sub_f32_e32 [[SUB:v[0-9]+]], [[FMA]], [[Z]]
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; GCN-FASTFMA-NEXT: buffer_store_dword [[FMA]]
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; GCN-FASTFMA-NEXT: buffer_store_dword [[SUB]]
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; GCN-SLOWFMA-DAG: v_mul_f32_e32 v{{[0-9]+}}, [[X]], [[Y]]
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; GCN-SLOWFMA: v_add_f32_e32
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; GCN-SLOWFMA: v_sub_f32_e32
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define amdgpu_kernel void @fast_sub_fmuladd_fmul_multi_use_fmuladd_lhs() #0 {
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%x = load volatile float, float addrspace(1)* undef
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%y = load volatile float, float addrspace(1)* undef
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%z = load volatile float, float addrspace(1)* undef
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%u = load volatile float, float addrspace(1)* undef
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%v = load volatile float, float addrspace(1)* undef
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%mul.u.v = fmul fast float %u, %v
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%fma = call fast float @llvm.fmuladd.f32(float %x, float %y, float %mul.u.v)
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%add = fsub fast float %fma, %z
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store volatile float %fma, float addrspace(1)* undef
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store volatile float %add, float addrspace(1)* undef
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ret void
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}
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; GCN-LABEL: {{^}}fast_sub_fmuladd_fmul_multi_use_fmuladd_rhs:
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; GCN: buffer_load_dword [[X:v[0-9]+]]
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; GCN: buffer_load_dword [[Y:v[0-9]+]]
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; GCN: buffer_load_dword [[Z:v[0-9]+]]
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; GCN: buffer_load_dword [[U:v[0-9]+]]
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; GCN: buffer_load_dword [[V:v[0-9]+]]
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; GCN-DAG: v_mul_f32_e32 [[MUL:v[0-9]+]], [[U]], [[V]]
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; GCN-FLUSH-NEXT: v_mac_f32_e32 [[MUL]], [[X]], [[Y]]
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; GCN-FLUSH-NEXT: v_sub_f32_e32 [[SUB:v[0-9]+]], [[Z]], [[MUL]]
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; GCN-FLUSH-NEXT: buffer_store_dword [[MUL]]
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; GCN-FLUSH-NEXT: buffer_store_dword [[SUB]]
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; GCN-FASTFMA-NEXT: v_fma_f32 [[FMA:v[0-9]+]], [[X]], [[Y]], [[U]]
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; GCN-FASTFMA-NEXT: v_sub_f32_e32 [[SUB:v[0-9]+]], [[Z]], [[FMA]]
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; GCN-FASTFMA-NEXT: buffer_store_dword [[FMA]]
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; GCN-FASTFMA-NEXT: buffer_store_dword [[SUB]]
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; GCN-SLOWFMA-DAG: v_mul_f32_e32 v{{[0-9]+}}, [[X]], [[Y]]
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; GCN-SLOWFMA: v_add_f32_e32
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; GCN-SLOWFMA: v_sub_f32_e32
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define amdgpu_kernel void @fast_sub_fmuladd_fmul_multi_use_fmuladd_rhs() #0 {
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%x = load volatile float, float addrspace(1)* undef
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%y = load volatile float, float addrspace(1)* undef
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%z = load volatile float, float addrspace(1)* undef
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%u = load volatile float, float addrspace(1)* undef
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%v = load volatile float, float addrspace(1)* undef
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%mul.u.v = fmul fast float %u, %v
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%fma = call fast float @llvm.fmuladd.f32(float %x, float %y, float %mul.u.v)
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%add = fsub fast float %z, %fma
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store volatile float %fma, float addrspace(1)* undef
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store volatile float %add, float addrspace(1)* undef
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ret void
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}
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; GCN-LABEL: {{^}}fast_sub_fmuladd_fpext_fmul_multi_use_fmuladd_lhs:
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; GCN: buffer_load_dword [[X:v[0-9]+]]
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; GCN: buffer_load_dword [[Y:v[0-9]+]]
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; GCN: buffer_load_dword [[Z:v[0-9]+]]
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; GCN: buffer_load_ushort [[U:v[0-9]+]]
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; GCN: buffer_load_ushort [[V:v[0-9]+]]
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; GCN-DAG: v_cvt_f32_f16_e32 [[UFLOAT:v[0-9]+]], [[U]]
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; GCN-DAG: v_cvt_f32_f16_e32 [[VFLOAT:v[0-9]+]], [[V]]
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; GCN-DAG: v_mul_f32_e32 [[MUL:v[0-9]+]], [[UFLOAT]], [[VFLOAT]]
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; GCN-FLUSH-NEXT: v_mac_f32_e32 [[MUL]], [[X]], [[Y]]
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; GCN-FLUSH-NEXT: v_sub_f32_e32 [[SUB:v[0-9]+]], [[MUL]], [[Z]]
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; GCN-FLUSH-NEXT: buffer_store_dword [[MUL]]
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; GCN-FLUSH-NEXT: buffer_store_dword [[SUB]]
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; GCN-FASTFMA-NEXT: v_fma_f32 [[FMA:v[0-9]+]], [[X]], [[Y]], [[UFLOAT]]
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; GCN-FASTFMA-NEXT: v_sub_f32_e32 [[SUB:v[0-9]+]], [[FMA]], [[Z]]
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; GCN-FASTFMA-NEXT: buffer_store_dword [[FMA]]
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; GCN-FASTFMA-NEXT: buffer_store_dword [[SUB]]
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; GCN-SLOWFMA-DAG: v_mul_f32_e32 v{{[0-9]+}}, [[X]], [[Y]]
|
|
; GCN-SLOWFMA: v_add_f32_e32
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|
; GCN-SLOWFMA: v_sub_f32_e32
|
|
define amdgpu_kernel void @fast_sub_fmuladd_fpext_fmul_multi_use_fmuladd_lhs() #0 {
|
|
%x = load volatile float, float addrspace(1)* undef
|
|
%y = load volatile float, float addrspace(1)* undef
|
|
%z = load volatile float, float addrspace(1)* undef
|
|
%u = load volatile half, half addrspace(1)* undef
|
|
%v = load volatile half, half addrspace(1)* undef
|
|
%mul.u.v.half = fmul fast half %u, %v
|
|
%mul.u.v = fpext half %mul.u.v.half to float
|
|
%fma = call fast float @llvm.fmuladd.f32(float %x, float %y, float %mul.u.v)
|
|
%add = fsub fast float %fma, %z
|
|
store volatile float %fma, float addrspace(1)* undef
|
|
store volatile float %add, float addrspace(1)* undef
|
|
ret void
|
|
}
|
|
|
|
; GCN-LABEL: {{^}}fast_sub_fmuladd_fpext_fmul_multi_use_fmuladd_rhs:
|
|
; GCN: buffer_load_dword [[X:v[0-9]+]]
|
|
; GCN: buffer_load_dword [[Y:v[0-9]+]]
|
|
; GCN: buffer_load_dword [[Z:v[0-9]+]]
|
|
; GCN: buffer_load_ushort [[U:v[0-9]+]]
|
|
; GCN: buffer_load_ushort [[V:v[0-9]+]]
|
|
|
|
; GCN-DAG: v_cvt_f32_f16_e32 [[UFLOAT:v[0-9]+]], [[U]]
|
|
; GCN-DAG: v_cvt_f32_f16_e32 [[VFLOAT:v[0-9]+]], [[V]]
|
|
; GCN-DAG: v_mul_f32_e32 [[MUL:v[0-9]+]], [[UFLOAT]], [[VFLOAT]]
|
|
|
|
; GCN-FLUSH-NEXT: v_mac_f32_e32 [[MUL]], [[X]], [[Y]]
|
|
; GCN-FLUSH-NEXT: v_sub_f32_e32 [[SUB:v[0-9]+]], [[Z]], [[MUL]]
|
|
; GCN-FLUSH-NEXT: buffer_store_dword [[MUL]]
|
|
; GCN-FLUSH-NEXT: buffer_store_dword [[SUB]]
|
|
|
|
; GCN-FASTFMA-NEXT: v_fma_f32 [[FMA:v[0-9]+]], [[X]], [[Y]], [[UFLOAT]]
|
|
; GCN-FASTFMA-NEXT: v_sub_f32_e32 [[SUB:v[0-9]+]], [[Z]], [[FMA]]
|
|
; GCN-FASTFMA-NEXT: buffer_store_dword [[FMA]]
|
|
; GCN-FASTFMA-NEXT: buffer_store_dword [[SUB]]
|
|
|
|
; GCN-SLOWFMA-DAG: v_mul_f32_e32 v{{[0-9]+}}, [[X]], [[Y]]
|
|
; GCN-SLOWFMA: v_add_f32_e32
|
|
; GCN-SLOWFMA: v_sub_f32_e32
|
|
define amdgpu_kernel void @fast_sub_fmuladd_fpext_fmul_multi_use_fmuladd_rhs() #0 {
|
|
%x = load volatile float, float addrspace(1)* undef
|
|
%y = load volatile float, float addrspace(1)* undef
|
|
%z = load volatile float, float addrspace(1)* undef
|
|
%u = load volatile half, half addrspace(1)* undef
|
|
%v = load volatile half, half addrspace(1)* undef
|
|
%mul.u.v.half = fmul fast half %u, %v
|
|
%mul.u.v = fpext half %mul.u.v.half to float
|
|
%fma = call fast float @llvm.fmuladd.f32(float %x, float %y, float %mul.u.v)
|
|
%add = fsub fast float %z, %fma
|
|
store volatile float %fma, float addrspace(1)* undef
|
|
store volatile float %add, float addrspace(1)* undef
|
|
ret void
|
|
}
|
|
|
|
declare float @llvm.fma.f32(float, float, float) #1
|
|
declare float @llvm.fmuladd.f32(float, float, float) #1
|
|
|
|
attributes #0 = { nounwind }
|
|
attributes #1 = { nounwind readnone }
|