..
AArch64
[COFF, ARM64] Hook up a few remaining relocations
2018-05-02 18:24:37 +00:00
AMDGPU
AMDGPU: Add D16 instructions preserve unused bits feature
2018-05-04 20:06:57 +00:00
ARM
[ARM] Do not convert some vmov instructions
2018-04-04 08:54:19 +00:00
AVR
[AVR] Implement some missing code paths
2017-12-11 11:01:27 +00:00
AsmParser
[MC] Change AsmParser to leverage Assembler during evaluation
2018-04-30 19:22:40 +00:00
BPF
bpf: New disassembler testcases for 32-bit subregister support
2018-02-23 23:49:35 +00:00
COFF
[codeview] Ignore .cv_loc directives at the end of a function
2018-04-25 23:34:15 +00:00
Disassembler
[x86] Introduce the enclv instruction
2018-05-08 07:11:05 +00:00
ELF
ELFObjectWriter: Allow one unique symver per symbol
2018-04-27 20:32:34 +00:00
Hexagon
[Hexagon] Move clamping of extended operands directly to MC code emitter
2018-05-07 17:34:23 +00:00
Lanai
…
MachO
MachO: trap unreachable instructions
2018-04-13 22:25:20 +00:00
Mips
[mips] Correct the predicates of sign extension instructions
2018-05-04 15:00:54 +00:00
PowerPC
[PowerPC] Code cleanup. Remove instructions that were withdrawn from Power 9.
2018-02-23 15:55:16 +00:00
RISCV
[RISCV] Allow call pseudoinstruction to be used to call a function name that coincides with a register name
2018-04-25 17:25:29 +00:00
Sparc
[Sparc] invalid adjustments in TLS_LE/TLS_LDO relocations removed
2017-07-25 15:28:28 +00:00
SystemZ
[SystemZ, AsmParser] Enable the mnemonic spell corrector.
2017-07-18 09:17:00 +00:00
WebAssembly
[WebAssembly] MC: Don't litter test directory.
2018-05-03 08:25:14 +00:00
X86
[x86] Introduce the enclv instruction
2018-05-08 07:11:05 +00:00