maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity
llvm-project/llvm/test/CodeGen
History
Craig Topper b5f2659130 [X86] Correct the scheduling data for register forms of XCHG and XADD on Intel CPUs. 
The XCHG16rr/XCHG32rr/XCHG64rr instructions should be 3 uops just like XCHG8rr. I believe they're just implemented as 3 move uops with a temporary register.

XADD is probably 2 moves and an add also using a temporary register.

Change the latency for both from 2 cycles to 3 cycles. Only 2 of the uops are serialized in their execution, the move into the temporary and the move out of the temporary. The move from one GPR to the other should be able to go in parallel with this if there are ALU resources available.

llvm-svn: 330349
 		2018-04-19 18:00:17 +00:00
..
AArch64 [AArch64] Add isel pattern for v8i8->v2f32 NVCASTs. 2018-04-18 17:10:19 +00:00
AMDGPU [AMDGPU] Do not only rely on BB number when finding bottom loop 2018-04-19 15:42:30 +00:00
ARC
…
ARM [ARM] Add some missing FP16 VSEL test cases 2018-04-19 08:21:50 +00:00
AVR [AVR] Add a regression test for struct return lowering 2018-03-20 11:23:03 +00:00
BPF bpf: fix incorrect SELECT_CC lowering 2018-04-03 03:56:37 +00:00
Generic Revert "Fix incorrect choice of callee-saved registers save/restore points (take 2)" 2018-04-17 16:29:58 +00:00
Hexagon [if-converter] Handle BBs that terminate in ret during diamond conversion 2018-04-19 17:26:46 +00:00
Inputs
…
Lanai
…
MIR [if-converter] Handle BBs that terminate in ret during diamond conversion 2018-04-19 17:26:46 +00:00
MSP430
…
Mips [mips] Correct the definitions of the unaligned word memory operation instructions 2018-04-19 13:33:51 +00:00
NVPTX [NVPTX, CUDA] Added support for m8n32k16 and m32n8k16 variants of wmma instructions. 2018-04-18 21:51:48 +00:00
Nios2
…
PowerPC [NFC] test case clean up 2018-04-18 20:22:26 +00:00
RISCV [RISCV] Add test changes missed from rL330293 2018-04-18 20:36:12 +00:00
SPARC [NFC] fix trivial typos in comments 2018-04-13 11:37:06 +00:00
SystemZ [PostRASink]Add register dependency check for implicit operands 2018-04-13 14:23:09 +00:00
Thumb Reapply ARM: Do not spill CSR to stack on entry to noreturn functions 2018-04-07 10:57:03 +00:00
Thumb2 MachO: trap unreachable instructions 2018-04-13 22:25:20 +00:00
WebAssembly [WebAssembly] Teach fast-isel to gracefully recover from illegal return types. 2018-04-17 20:46:42 +00:00
WinCFGuard
…
WinEH
…
X86 [X86] Correct the scheduling data for register forms of XCHG and XADD on Intel CPUs. 2018-04-19 18:00:17 +00:00
XCore Use .set instead of = when printing assignment in assembly output 2018-03-27 16:44:41 +00:00