forked from OSchip/llvm-project
270 lines
8.1 KiB
C++
270 lines
8.1 KiB
C++
// $Id$ -*-c++-*-
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//***************************************************************************
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// File:
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// InstrSelection.h
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//
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// Purpose:
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//
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// History:
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// 7/02/01 - Vikram Adve - Created
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//***************************************************************************
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#include "llvm/CodeGen/InstrSelection.h"
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#include "llvm/Method.h"
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#include "llvm/BasicBlock.h"
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#include "llvm/Type.h"
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#include "llvm/iMemory.h"
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#include "llvm/Instruction.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/Support/CommandLine.h"
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enum DebugLev {
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NoDebugInfo,
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DebugInstTrees,
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DebugBurgTrees,
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};
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// Enable Debug Options to be specified on the command line
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cl::Enum<enum DebugLev> DebugLevel("debug_select", cl::NoFlags, // cl::Hidden
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"enable instruction selection debugging information",
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clEnumVal(NoDebugInfo , "disable debug output"),
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clEnumVal(DebugInstTrees, "print instruction trees"),
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clEnumVal(DebugBurgTrees, "print burg trees"), 0);
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//************************* Forward Declarations ***************************/
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static bool SelectInstructionsForTree(BasicTreeNode* treeRoot, int goalnt,
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TargetMachine &Target);
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//******************* Externally Visible Functions *************************/
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//---------------------------------------------------------------------------
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// Entry point for instruction selection using BURG.
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// Returns true if instruction selection failed, false otherwise.
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//---------------------------------------------------------------------------
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bool SelectInstructionsForMethod(Method* method, TargetMachine &Target) {
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bool failed = false;
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InstrForest instrForest;
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instrForest.buildTreesForMethod(method);
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const hash_set<InstructionNode*> &treeRoots = instrForest.getRootSet();
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//
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// Invoke BURG instruction selection for each tree
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//
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for (hash_set<InstructionNode*>::const_iterator
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treeRootIter = treeRoots.begin();
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treeRootIter != treeRoots.end();
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++treeRootIter)
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{
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BasicTreeNode* basicNode = (*treeRootIter)->getBasicNode();
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// Invoke BURM to label each tree node with a state
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(void) burm_label(basicNode);
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if (DebugLevel >= DebugBurgTrees)
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{
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printcover(basicNode, 1, 0);
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cerr << "\nCover cost == " << treecost(basicNode, 1, 0) << "\n\n";
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printMatches(basicNode);
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}
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// Then recursively walk the tree to select instructions
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if (SelectInstructionsForTree(basicNode, /*goalnt*/1, Target))
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{
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failed = true;
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break;
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}
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}
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if (!failed)
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{
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if (DebugLevel >= DebugInstTrees)
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{
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cout << "\n\n*** Instruction trees for method "
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<< (method->hasName()? method->getName() : "")
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<< endl << endl;
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instrForest.dump();
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}
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if (DebugLevel > NoDebugInfo)
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PrintMachineInstructions(method);
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}
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return false;
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}
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//---------------------------------------------------------------------------
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// Function: FoldGetElemChain
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//
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// Purpose:
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// Fold a chain of GetElementPtr instructions into an equivalent
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// (Pointer, IndexVector) pair. Returns the pointer Value, and
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// stores the resulting IndexVector in argument chainIdxVec.
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//---------------------------------------------------------------------------
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Value*
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FoldGetElemChain(const InstructionNode* getElemInstrNode,
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vector<ConstPoolVal*>& chainIdxVec)
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{
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MemAccessInst* getElemInst = (MemAccessInst*)
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getElemInstrNode->getInstruction();
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// Initialize return values from the incoming instruction
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Value* ptrVal = getElemInst->getPtrOperand();
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chainIdxVec = getElemInst->getIndexVec(); // copies index vector values
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// Now chase the chain of getElementInstr instructions, if any
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InstrTreeNode* ptrChild = getElemInstrNode->leftChild();
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while (ptrChild->getOpLabel() == Instruction::GetElementPtr ||
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ptrChild->getOpLabel() == GetElemPtrIdx)
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{
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// Child is a GetElemPtr instruction
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getElemInst = (MemAccessInst*)
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((InstructionNode*) ptrChild)->getInstruction();
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const vector<ConstPoolVal*>& idxVec = getElemInst->getIndexVec();
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// Get the pointer value out of ptrChild and *prepend* its index vector
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ptrVal = getElemInst->getPtrOperand();
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chainIdxVec.insert(chainIdxVec.begin(), idxVec.begin(), idxVec.end());
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ptrChild = ptrChild->leftChild();
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}
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return ptrVal;
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}
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void PrintMachineInstructions(Method* method) {
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cout << "\n" << method->getReturnType()
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<< " \"" << method->getName() << "\"" << endl;
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for (Method::const_iterator bbIter = method->begin();
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bbIter != method->end();
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++bbIter)
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{
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BasicBlock* bb = *bbIter;
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cout << "\n"
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<< (bb->hasName()? bb->getName() : "Label")
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<< " (" << bb << ")" << ":"
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<< endl;
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for (BasicBlock::const_iterator instrIter = bb->begin();
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instrIter != bb->end();
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++instrIter)
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{
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Instruction *instr = *instrIter;
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const MachineCodeForVMInstr& minstrVec = instr->getMachineInstrVec();
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for (unsigned i=0, N=minstrVec.size(); i < N; i++)
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cout << "\t" << *minstrVec[i] << endl;
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}
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}
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}
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//*********************** Private Functions *****************************/
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//---------------------------------------------------------------------------
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// Function SelectInstructionsForTree
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//
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// Recursively walk the tree to select instructions.
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// Do this top-down so that child instructions can exploit decisions
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// made at the child instructions.
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//
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// E.g., if br(setle(reg,const)) decides the constant is 0 and uses
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// a branch-on-integer-register instruction, then the setle node
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// can use that information to avoid generating the SUBcc instruction.
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//
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// Note that this cannot be done bottom-up because setle must do this
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// only if it is a child of the branch (otherwise, the result of setle
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// may be used by multiple instructions).
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//---------------------------------------------------------------------------
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bool
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SelectInstructionsForTree(BasicTreeNode* treeRoot,
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int goalnt,
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TargetMachine &Target)
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{
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// Use a static vector to avoid allocating a new one per VM instruction
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static MachineInstr* minstrVec[MAX_INSTR_PER_VMINSTR];
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// Get the rule that matches this node.
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//
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int ruleForNode = burm_rule(treeRoot->state, goalnt);
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if (ruleForNode == 0)
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{
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cerr << "Could not match instruction tree for instr selection" << endl;
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return true;
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}
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// Get this rule's non-terminals and the corresponding child nodes (if any)
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//
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short *nts = burm_nts[ruleForNode];
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// First, select instructions for the current node and rule.
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// (If this is a list node, not an instruction, then skip this step).
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// This function is specific to the target architecture.
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//
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if (treeRoot->opLabel != VRegListOp)
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{
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InstructionNode* instrNode = (InstructionNode*) MainTreeNode(treeRoot);
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assert(instrNode->getNodeType() == InstrTreeNode::NTInstructionNode);
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unsigned N = GetInstructionsByRule(instrNode, ruleForNode, nts, Target,
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minstrVec);
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assert(N <= MAX_INSTR_PER_VMINSTR);
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for (unsigned i=0; i < N; i++)
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{
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assert(minstrVec[i] != NULL);
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instrNode->getInstruction()->addMachineInstruction(minstrVec[i]);
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}
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}
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// Then, recursively compile the child nodes, if any.
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//
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if (nts[0])
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{ // i.e., there is at least one kid
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BasicTreeNode* kids[2];
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int currentRule = ruleForNode;
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burm_kids(treeRoot, currentRule, kids);
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// First skip over any chain rules so that we don't visit
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// the current node again.
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//
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while (ThisIsAChainRule(currentRule))
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{
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currentRule = burm_rule(treeRoot->state, nts[0]);
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nts = burm_nts[currentRule];
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burm_kids(treeRoot, currentRule, kids);
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}
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// Now we have the first non-chain rule so we have found
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// the actual child nodes. Recursively compile them.
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//
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for (int i = 0; nts[i]; i++)
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{
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assert(i < 2);
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InstrTreeNode::InstrTreeNodeType
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nodeType = MainTreeNode(kids[i])->getNodeType();
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if (nodeType == InstrTreeNode::NTVRegListNode ||
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nodeType == InstrTreeNode::NTInstructionNode)
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{
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if (SelectInstructionsForTree(kids[i], nts[i], Target))
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return true; // failure
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}
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}
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}
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return false; // success
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}
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