forked from OSchip/llvm-project
74 lines
4.1 KiB
LLVM
74 lines
4.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes
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; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
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; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
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; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
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; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
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; FIXME: DOT should be replaced with 3
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define i32 @test-ashr(i32 %c) {
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; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn
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; IS__TUNIT____-LABEL: define {{[^@]+}}@test-ashr
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; IS__TUNIT____-SAME: (i32 [[C:%.*]]) [[ATTR0:#.*]] {
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; IS__TUNIT____-NEXT: chk65:
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; IS__TUNIT____-NEXT: [[CMP:%.*]] = icmp sgt i32 [[C]], 65
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; IS__TUNIT____-NEXT: br i1 [[CMP]], label [[RETURN:%.*]], label [[CHK0:%.*]]
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; IS__TUNIT____: chk0:
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; IS__TUNIT____-NEXT: [[CMP1:%.*]] = icmp slt i32 [[C]], 0
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; IS__TUNIT____-NEXT: br i1 [[CMP]], label [[RETURN]], label [[BB_IF:%.*]]
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; IS__TUNIT____: bb_if:
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; IS__TUNIT____-NEXT: [[ASHR_VAL:%.*]] = ashr exact i32 [[C]], 2
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; IS__TUNIT____-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[ASHR_VAL]], 15
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; IS__TUNIT____-NEXT: br i1 [[CMP2]], label [[BB_THEN:%.*]], label [[RETURN]]
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; IS__TUNIT____: bb_then:
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; IS__TUNIT____-NEXT: [[CMP3:%.*]] = icmp eq i32 [[ASHR_VAL]], 16
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; IS__TUNIT____-NEXT: [[DOT:%.*]] = select i1 [[CMP3]], i32 3, i32 2
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; IS__TUNIT____-NEXT: br label [[RETURN]]
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; IS__TUNIT____: return:
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; IS__TUNIT____-NEXT: [[RETVAL:%.*]] = phi i32 [ 0, [[CHK65:%.*]] ], [ 1, [[CHK0]] ], [ [[DOT]], [[BB_THEN]] ], [ 4, [[BB_IF]] ]
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; IS__TUNIT____-NEXT: ret i32 [[RETVAL]]
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;
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; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
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; IS__CGSCC____-LABEL: define {{[^@]+}}@test-ashr
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; IS__CGSCC____-SAME: (i32 [[C:%.*]]) [[ATTR0:#.*]] {
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; IS__CGSCC____-NEXT: chk65:
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; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp sgt i32 [[C]], 65
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; IS__CGSCC____-NEXT: br i1 [[CMP]], label [[RETURN:%.*]], label [[CHK0:%.*]]
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; IS__CGSCC____: chk0:
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; IS__CGSCC____-NEXT: [[CMP1:%.*]] = icmp slt i32 [[C]], 0
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; IS__CGSCC____-NEXT: br i1 [[CMP]], label [[RETURN]], label [[BB_IF:%.*]]
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; IS__CGSCC____: bb_if:
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; IS__CGSCC____-NEXT: [[ASHR_VAL:%.*]] = ashr exact i32 [[C]], 2
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; IS__CGSCC____-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[ASHR_VAL]], 15
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; IS__CGSCC____-NEXT: br i1 [[CMP2]], label [[BB_THEN:%.*]], label [[RETURN]]
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; IS__CGSCC____: bb_then:
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; IS__CGSCC____-NEXT: [[CMP3:%.*]] = icmp eq i32 [[ASHR_VAL]], 16
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; IS__CGSCC____-NEXT: [[DOT:%.*]] = select i1 [[CMP3]], i32 3, i32 2
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; IS__CGSCC____-NEXT: br label [[RETURN]]
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; IS__CGSCC____: return:
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; IS__CGSCC____-NEXT: [[RETVAL:%.*]] = phi i32 [ 0, [[CHK65:%.*]] ], [ 1, [[CHK0]] ], [ [[DOT]], [[BB_THEN]] ], [ 4, [[BB_IF]] ]
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; IS__CGSCC____-NEXT: ret i32 [[RETVAL]]
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;
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chk65:
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%cmp = icmp sgt i32 %c, 65
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br i1 %cmp, label %return, label %chk0
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chk0:
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%cmp1 = icmp slt i32 %c, 0
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br i1 %cmp, label %return, label %bb_if
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bb_if:
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%ashr.val = ashr exact i32 %c, 2
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%cmp2 = icmp sgt i32 %ashr.val, 15
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br i1 %cmp2, label %bb_then, label %return
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bb_then:
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%cmp3 = icmp eq i32 %ashr.val, 16
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%. = select i1 %cmp3, i32 3, i32 2
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br label %return
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return:
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%retval = phi i32 [0, %chk65], [1, %chk0], [%., %bb_then], [4, %bb_if]
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ret i32 %retval
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}
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