..
AArch64
[objdump][macho] Emit segment names along with section names
2020-09-04 09:57:02 -07:00
AMDGPU
[AMDGPU][MC] Corrected parser to avoid generation of excessive error messages
2020-09-02 19:42:18 +03:00
ARM
[ARM] Fix Asm/Disasm of TBB/TBH instructions
2020-07-22 09:31:56 +01:00
AVR
[AVRInstPrinter] printOperand: support llvm-objdump --print-imm-hex
2020-07-12 08:14:52 -07:00
AsmParser
[MC] Support infix operator !
2020-07-30 23:25:53 -07:00
BPF
[test] llvm/test/: change llvm-objdump single-dash long options to double-dash options
2020-03-15 17:46:23 -07:00
COFF
[MC] [COFF] Make sure that weak external symbols are undefined symbols
2020-07-24 22:15:08 +03:00
Disassembler
[PowerPC] Implement instruction definitions/MC Tests for xvcvspbf16 and xvcvbf16spn
2020-09-01 10:59:43 -05:00
ELF
Revert "Reland D64327 [MC][ELF] Allow STT_SECTION referencing SHF_MERGE on REL targets"
2020-08-07 10:56:33 -07:00
Hexagon
[llvm-readobj] Update tests because of changes in llvm-readobj behavior
2020-07-20 10:39:04 +01:00
Lanai
[lit] Delete empty lines at the end of lit.local.cfg NFC
2019-06-17 09:51:07 +00:00
MSP430
[llvm-readobj] Update tests because of changes in llvm-readobj behavior
2020-07-20 10:39:04 +01:00
MachO
[llvm-readobj] Update tests because of changes in llvm-readobj behavior
2020-07-20 10:39:04 +01:00
Mips
Revert "Reland D64327 [MC][ELF] Allow STT_SECTION referencing SHF_MERGE on REL targets"
2020-08-07 10:56:33 -07:00
PowerPC
[PowerPC] Implement instruction definitions/MC Tests for xvcvspbf16 and xvcvbf16spn
2020-09-01 10:59:43 -05:00
RISCV
[RISCV] add the MC layer support of riscv vector Zvamo extension
2020-08-27 14:11:38 +08:00
Sparc
[llvm-readobj] Update tests because of changes in llvm-readobj behavior
2020-07-20 10:39:04 +01:00
SystemZ
[llvm-readobj] Update tests because of changes in llvm-readobj behavior
2020-07-20 10:39:04 +01:00
VE
[VE] Support symbol with offset in assembly
2020-07-07 04:16:51 +09:00
WebAssembly
[WebAssembly][AsmParser] Name missing features in error message
2020-08-11 17:26:14 -07:00
X86
[X86] Add assembler support for .d32 and .d8 mnemonic suffixes to control displacement size.
2020-08-26 10:45:50 -07:00