llvm-project/llvm/test/CodeGen/AArch64
Amara Emerson 7a4d2df04a [AArch64][GlobalISel] Optimize compare and branch cases with G_INTTOPTR and unknown values.
Since we have distinct types for pointers and scalars, G_INTTOPTRs can sometimes
obstruct attempts to find constant source values. These usually come about when
try to do some kind of null pointer check. Teaching getConstantVRegValWithLookThrough
about this operation allows the CBZ/CBNZ optimization to catch more cases.

This change also improves the case where we can't find a constant source at all.
Previously we would emit a cmp, cset and tbnz for that. Now we try to just emit
a cmp and conditional branch, saving an instruction.

The cumulative code size improvement of this change plus D64354 is 5.5% geomean
on arm64 CTMark -O0.

Differential Revision: https://reviews.llvm.org/D64377

llvm-svn: 365690
2019-07-10 19:21:43 +00:00
..
GlobalISel [AArch64][GlobalISel] Optimize compare and branch cases with G_INTTOPTR and unknown values. 2019-07-10 19:21:43 +00:00
128bit_load_store.ll
O0-pipeline.ll Rename ExpandISelPseudo->FinalizeISel, delay register reservation 2019-06-19 00:25:39 +00:00
O3-pipeline.ll Revert "r364412 [ExpandMemCmp][MergeICmps] Move passes out of CodeGen into opt pipeline." 2019-06-26 12:13:13 +00:00
PBQP-chain.ll
PBQP-coalesce-benefit.ll
PBQP-csr.ll Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
PBQP.ll
Redundantstore.ll
a57-csel.ll
aarch-multipart.ll
aarch64-2014-08-11-MachineCombinerCrash.ll [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00
aarch64-2014-12-02-combine-soften.ll
aarch64-DAGCombine-findBetterNeighborChains-crash.ll Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
aarch64-a57-fp-load-balancing.ll [CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register. 2017-12-07 10:40:31 +00:00
aarch64-address-type-promotion-assertion.ll
aarch64-address-type-promotion.ll
aarch64-addv.ll Improve reduction intrinsics by overloading result value. 2019-06-13 09:37:38 +00:00
aarch64-be-bv.ll [AArch64] Do 64-bit vector move of 0 and -1 by extracting from the 128-bit move 2018-10-25 14:56:48 +00:00
aarch64-codegen-prepare-atp.ll
aarch64-combine-fmul-fsub.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
aarch64-dynamic-stack-layout.ll Replace "no-frame-pointer-*" function attributes with "frame-pointer" 2019-01-14 10:55:55 +00:00
aarch64-fix-cortex-a53-835769.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
aarch64-fold-lslfast.ll Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding" 2018-02-27 16:59:10 +00:00
aarch64-gep-opt.ll
aarch64-insert-subvector-undef.ll [AArch64] add missing pattern for insert_subvector undef 2018-03-07 22:07:13 +00:00
aarch64-interleaved-ld-combine.ll Subject: [PATCH] [CodeGen] Add pass to combine interleaved loads. 2018-11-19 14:26:10 +00:00
aarch64-loop-gep-opt.ll [AArch64] Use LateSimplifyCFG after expanding atomic operations. 2017-10-03 22:39:24 +00:00
aarch64-minmaxv.ll Improve reduction intrinsics by overloading result value. 2019-06-13 09:37:38 +00:00
aarch64-mov-debug-locs.mir Describe stack-id as an enum 2019-06-17 09:13:29 +00:00
aarch64-named-reg-w18.ll [AArch64] Reserve x18 register on Fuchsia 2018-04-01 23:44:04 +00:00
aarch64-named-reg-x18.ll [AArch64] Reserve x18 register on Fuchsia 2018-04-01 23:44:04 +00:00
aarch64-neon-v1i1-setcc.ll
aarch64-smax-constantfold.ll [AArch64] Do 64-bit vector move of 0 and -1 by extracting from the 128-bit move 2018-10-25 14:56:48 +00:00
aarch64-smull.ll [AArch64] make test immune to scalarization improvements; NFC 2018-12-14 17:44:07 +00:00
aarch64-stp-cluster.ll [CodeGen] Use MIR syntax for MachineMemOperand printing 2018-03-14 21:52:13 +00:00
aarch64-tbz.ll
aarch64-tryBitfieldInsertOpFromOr-crash.ll
aarch64-vcvtfp2fxs-combine.ll
aarch64-vector-pcs.mir [AArch64] Implement aarch64_vector_pcs codegen support. 2018-09-12 12:10:22 +00:00
aarch64-vuzp.ll [x86][aarch64] ask the backend whether it has a vector blend instruction 2018-03-09 14:29:21 +00:00
aarch64-wide-shuffle.ll
aarch64_f16_be.ll [AArch64][GlobalISel] Enable GlobalISel at -O0 by default 2018-01-02 16:30:47 +00:00
aarch64_tree_tests.ll Partial revert of "NFC - Various typo fixes in tests" 2018-07-05 08:42:16 +00:00
aarch64_win64cc_vararg.ll [DAGCombiner] If a TokenFactor would be merged into its user, consider the user later. 2019-03-13 17:07:09 +00:00
adc.ll
addcarry-crash.ll
addr-of-ret-addr.ll [DAGCombiner] If a TokenFactor would be merged into its user, consider the user later. 2019-03-13 17:07:09 +00:00
addsub-constant-folding.ll [NFC][Codegen] Add/sub constant-folding: add scalar tests too 2019-05-31 08:23:48 +00:00
addsub-shifted.ll
addsub.ll
addsub_ext.ll
alloca.ll [DAGCombiner] If a TokenFactor would be merged into its user, consider the user later. 2019-03-13 17:07:09 +00:00
analyze-branch.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
analyzecmp.ll
and-mask-removal.ll [AArch64] Swap comparison operands if that enables some folding. 2018-10-13 07:43:56 +00:00
and-sink.ll
andandshift.ll NFC - Various typo fixes in tests 2018-07-04 13:28:39 +00:00
apple-latest-cpu.ll Rename ExpandISelPseudo->FinalizeISel, delay register reservation 2019-06-19 00:25:39 +00:00
argument-blocks.ll
arm64-2011-03-09-CPSRSpill.ll
arm64-2011-03-17-AsmPrinterCrash.ll Remove irrelevant references to legacy git repositories from 2019-01-15 16:18:52 +00:00
arm64-2011-03-21-Unaligned-Frame-Index.ll
arm64-2011-04-21-CPSRBug.ll
arm64-2011-10-18-LdStOptBug.ll
arm64-2012-01-11-ComparisonDAGCrash.ll
arm64-2012-05-07-DAGCombineVectorExtract.ll
arm64-2012-05-07-MemcpyAlignBug.ll [AArch64] Gangup loads and stores for pairing. 2018-05-16 15:36:52 +00:00
arm64-2012-05-09-LOADgot-bug.ll
arm64-2012-05-22-LdStOptBug.ll [CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register. 2017-12-07 10:40:31 +00:00
arm64-2012-06-06-FPToUI.ll
arm64-2012-07-11-InstrEmitterBug.ll
arm64-2013-01-13-ffast-fcmp.ll
arm64-2013-01-23-frem-crash.ll
arm64-2013-01-23-sext-crash.ll
arm64-2013-02-12-shufv8i8.ll
arm64-AdvSIMD-Scalar.ll Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding" 2018-02-27 16:59:10 +00:00
arm64-AnInfiniteLoopInDAGCombine.ll
arm64-EXT-undef-mask.ll [AArch64][GlobalISel] Enable GlobalISel at -O0 by default 2018-01-02 16:30:47 +00:00
arm64-aapcs-be.ll
arm64-aapcs.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
arm64-abi-varargs.ll [DAGCombine] Improve alias analysis for chain of independent stores. 2018-11-08 19:14:20 +00:00
arm64-abi.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
arm64-abi_align.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
arm64-addp.ll
arm64-addr-mode-folding.ll NFC - Various typo fixes in tests 2018-07-04 13:28:39 +00:00
arm64-addr-type-promotion.ll [DAG] Refactor DAGCombiner::ReassociateOps 2019-04-29 17:50:10 +00:00
arm64-addrmode.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
arm64-alloc-no-stack-realign.ll
arm64-alloca-frame-pointer-offset.ll [AArch64] Use FP to access the emergency spill slot 2018-04-10 11:29:40 +00:00
arm64-andCmpBrToTBZ.ll
arm64-ands-bad-peephole.ll
arm64-anyregcc-crash.ll RegAlloc: try to fail more gracefully when out of registers 2019-05-15 17:29:58 +00:00
arm64-anyregcc.ll
arm64-arith-saturating.ll
arm64-arith.ll [DAGCombiner] When combining zero_extend of a truncate, only mask before extending for vectors. 2018-03-01 22:32:25 +00:00
arm64-arm64-dead-def-elimination-flag.ll
arm64-atomic-128.ll Revert r329611, "AArch64: Allow offsets to be folded into addresses with ELF." 2018-04-10 16:19:30 +00:00
arm64-atomic.ll Fix some misc. -enable-var-scope violations 2017-11-13 01:47:52 +00:00
arm64-basic-pic.ll
arm64-bcc.ll
arm64-big-endian-bitconverts.ll [AArch64] Avoid unnecessary vector byte-swapping in big-endian 2018-01-24 14:13:47 +00:00
arm64-big-endian-eh.ll [MC] Sort FDEs by the associated CIE before emitting them. 2019-03-14 23:08:19 +00:00
arm64-big-endian-varargs.ll
arm64-big-endian-vector-callee.ll
arm64-big-endian-vector-caller.ll
arm64-big-imm-offsets.ll
arm64-big-stack.ll
arm64-bitfield-extract.ll [NFC][AArch64] Add some ubfx tests with immediates 2019-05-18 13:49:44 +00:00
arm64-blockaddress.ll
arm64-build-vector.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
arm64-builtins-linux.ll [AArch64] Allow -mattr=tpidr-el[1|2|3] 2019-03-21 11:30:17 +00:00
arm64-call-tailcalls.ll
arm64-cast-opt.ll
arm64-ccmp-heuristics.ll
arm64-ccmp.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
arm64-clrsb.ll [GlobalISel][AArch64] Legalize + select some llvm.ctlz.* intrinsics 2019-02-18 23:33:24 +00:00
arm64-coalesce-ext.ll
arm64-coalescing-MOVi32imm.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
arm64-code-model-large-abs.ll
arm64-codegen-prepare-extload.ll Fix some misc. -enable-var-scope violations 2017-11-13 01:47:52 +00:00
arm64-collect-loh-garbage-crash.ll
arm64-collect-loh-str.ll
arm64-collect-loh.ll [AArch64] preserve test intent by removing undef 2018-05-17 18:07:02 +00:00
arm64-complex-copy-noneon.ll
arm64-complex-ret.ll [ARM][AArch64][DAG] Reenable post-legalize store merge 2017-12-06 15:30:13 +00:00
arm64-const-addr.ll
arm64-convert-v4f64.ll [LegalizeVectorTypes][X86][ARM][AArch64][PowerPC] Don't use SplitVecOp_TruncateHelper for FP_TO_SINT/UINT. 2018-11-26 21:12:39 +00:00
arm64-copy-tuple.ll
arm64-crc32.ll
arm64-crypto.ll [GlobalISel][AArch64] Select llvm.aarch64.crypto.sha1h 2019-04-29 20:58:17 +00:00
arm64-cse.ll [DAGCombiner] Teach DAG combiner that A-(B-C) can be folded to A+(C-B) 2018-07-28 00:27:25 +00:00
arm64-csel.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
arm64-csldst-mmo.ll Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
arm64-custom-call-saved-reg.ll [AArch64] Support adding X[8-15,18] registers as CSRs. 2018-09-22 22:17:50 +00:00
arm64-cvt.ll
arm64-dagcombiner-convergence.ll
arm64-dagcombiner-dead-indexed-load.ll
arm64-dagcombiner-load-slicing.ll
arm64-dead-def-frame-index.ll
arm64-dead-register-def-bug.ll [CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register. 2017-12-07 10:40:31 +00:00
arm64-detect-vec-redux.ll
arm64-dup.ll [AArch64][TableGen] Skip tied result operands for InstAlias 2017-11-20 14:36:40 +00:00
arm64-early-ifcvt.ll
arm64-elf-calls.ll
arm64-elf-constpool.ll [AArch64][GlobalISel] Enable GlobalISel at -O0 by default 2018-01-02 16:30:47 +00:00
arm64-elf-globals.ll [AArch64][GlobalISel] Enable GlobalISel at -O0 by default 2018-01-02 16:30:47 +00:00
arm64-ext.ll [AArch64] define isExtractSubvectorCheap 2018-03-06 16:54:55 +00:00
arm64-extend-int-to-fp.ll
arm64-extend.ll
arm64-extern-weak.ll [llvm] Remove redundant check-prefix=CHECK from tests. NFC. 2017-07-17 17:32:45 +00:00
arm64-extload-knownzero.ll
arm64-extract.ll
arm64-extract_subvector.ll
arm64-fast-isel-addr-offset.ll
arm64-fast-isel-alloca.ll Replace "no-frame-pointer-*" function attributes with "frame-pointer" 2019-01-14 10:55:55 +00:00
arm64-fast-isel-br.ll RegAllocFast: Improve hinting heuristic 2019-05-16 12:50:39 +00:00
arm64-fast-isel-call.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
arm64-fast-isel-conversion-fallback.ll RegAllocFast: Remove early selection loop, the spill calculation will report cost 0 anyway for free regs 2019-03-19 19:01:34 +00:00
arm64-fast-isel-conversion.ll RegAllocFast: Improve hinting heuristic 2019-05-16 12:50:39 +00:00
arm64-fast-isel-fcmp.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
arm64-fast-isel-gv.ll [FastISel] Disable local value sinking by default 2018-04-11 16:03:07 +00:00
arm64-fast-isel-icmp.ll Relax fast register allocator related test cases; NFC 2018-10-29 20:10:42 +00:00
arm64-fast-isel-indirectbr.ll [AArch64] FastISel: fix test to specify -fast-isel when -fast-isel-abort=1 is used. 2019-06-04 23:11:42 +00:00
arm64-fast-isel-intrinsic.ll Relax fast register allocator related test cases; NFC 2018-10-29 20:10:42 +00:00
arm64-fast-isel-materialize.ll Fix erroneous flag in GISel line for arm64-fast-isel-materialize.ll 2019-05-01 22:50:11 +00:00
arm64-fast-isel-noconvert.ll [AArch64][GlobalISel] Enable GlobalISel at -O0 by default 2018-01-02 16:30:47 +00:00
arm64-fast-isel-rem.ll Rename ExpandISelPseudo->FinalizeISel, delay register reservation 2019-06-19 00:25:39 +00:00
arm64-fast-isel-ret.ll Relax fast register allocator related test cases; NFC 2018-10-29 20:10:42 +00:00
arm64-fast-isel-store.ll
arm64-fast-isel.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
arm64-fastcc-tailcall.ll
arm64-fastisel-gep-promote-before-add.ll
arm64-fcmp-opt.ll AArch64: work around how Cyclone handles "movi.2d vD, #0". 2017-12-18 10:36:00 +00:00
arm64-fcopysign.ll
arm64-fixed-point-scalar-cvt-dagcombine.ll
arm64-fma-combine-with-fpfusion.ll
arm64-fma-combines.ll
arm64-fmadd.ll
arm64-fmax-safe.ll
arm64-fmax.ll Revert "adding more fmf propagation for selects plus tests" 2019-06-15 03:51:08 +00:00
arm64-fminv.ll
arm64-fml-combines.ll
arm64-fmuladd.ll
arm64-fold-address.ll
arm64-fold-lsl.ll [AArch64] Don't reduce the width of loads if it prevents combining a shift 2018-03-23 14:47:07 +00:00
arm64-fp-contract-zero.ll
arm64-fp-imm-size.ll [AArch64] Optimize floating point materialization 2019-03-18 18:45:57 +00:00
arm64-fp-imm.ll [AArch64] Optimize floating point materialization 2019-03-18 18:45:57 +00:00
arm64-fp.ll
arm64-fp128-folding.ll
arm64-fp128.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
arm64-fpcr.ll [AArch64] Implement FLT_ROUNDS macro. 2018-06-20 12:09:01 +00:00
arm64-frame-index.ll
arm64-global-address.ll
arm64-hello.ll Replace "no-frame-pointer-*" function attributes with "frame-pointer" 2019-01-14 10:55:55 +00:00
arm64-i16-subreg-extract.ll
arm64-icmp-opt.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
arm64-illegal-float-ops.ll
arm64-indexed-memory.ll
arm64-indexed-vector-ldst-2.ll [AArch64] Fix performPostLD1Combine to check for constant lane index. 2018-05-11 16:25:06 +00:00
arm64-indexed-vector-ldst.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
arm64-inline-asm-error-I.ll
arm64-inline-asm-error-J.ll
arm64-inline-asm-error-K.ll
arm64-inline-asm-error-L.ll
arm64-inline-asm-error-M.ll
arm64-inline-asm-error-N.ll
arm64-inline-asm-zero-reg-error.ll
arm64-inline-asm.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
arm64-join-reserved.ll
arm64-jumptable.ll [SimplifyCFG] Avoid quadratic on a predecessors number behavior in instruction sinking. 2017-12-21 01:22:13 +00:00
arm64-large-frame.ll Replace "no-frame-pointer-*" function attributes with "frame-pointer" 2019-01-14 10:55:55 +00:00
arm64-ld-from-st.ll [DAGCombine] Improve Load-Store Forwarding 2018-10-10 14:15:52 +00:00
arm64-ld1.ll [DAGCombiner] look through bitcasts when trying to narrow vector binops 2018-11-20 22:26:35 +00:00
arm64-ldp-aa.ll
arm64-ldp-cluster.ll [DAGCombiner] Set the right SDLoc on a newly-created sextload (6/N) 2018-05-11 18:40:08 +00:00
arm64-ldp.ll [AArch64] Extend tests of loads and stores of register pairs 2017-09-19 15:46:35 +00:00
arm64-ldst-unscaled-pre-post.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
arm64-ldur.ll
arm64-ldxr-stxr.ll [AArch64][GlobalISel] Select llvm.aarch64.stlxr(i64, i64*) 2019-04-02 19:57:26 +00:00
arm64-leaf.ll
arm64-long-shift.ll [AArch64] Take advantage of variable shift/rotate amount implicit mod operation. 2018-05-24 18:29:42 +00:00
arm64-memcpy-inline.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
arm64-memset-inline.ll [MachineScheduler] Order FI-based memops based on stack direction 2018-11-29 20:03:19 +00:00
arm64-memset-to-bzero.ll Recommit "Enable MachineOutliner by default under -Oz for AArch64" 2018-07-27 20:18:27 +00:00
arm64-misaligned-memcpy-inline.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
arm64-misched-basic-A53.ll Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
arm64-misched-basic-A57.ll Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
arm64-misched-forwarding-A53.ll [CodeGen] Print RegClasses on MI in verbose mode 2018-01-18 17:59:06 +00:00
arm64-misched-memdep-bug.ll [CodeGen] Use MIR syntax for MachineMemOperand printing 2018-03-14 21:52:13 +00:00
arm64-misched-multimmo.ll Revert r329611, "AArch64: Allow offsets to be folded into addresses with ELF." 2018-04-10 16:19:30 +00:00
arm64-movi.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
arm64-mte.ll [AArch64] Add support for MTE intrinsics 2019-04-23 09:39:58 +00:00
arm64-mul.ll
arm64-named-reg-alloc.ll
arm64-named-reg-notareg.ll
arm64-narrow-st-merge.ll [ARM][AArch64][DAG] Reenable post-legalize store merge 2017-12-06 15:30:13 +00:00
arm64-neg.ll
arm64-neon-2velem-high.ll
arm64-neon-2velem.ll [AArch64] Regenerate 2velem tests. NFCI. 2019-06-24 16:58:19 +00:00
arm64-neon-3vdiff.ll
arm64-neon-aba-abd.ll
arm64-neon-across.ll
arm64-neon-add-pairwise.ll [AArch64] Split the neon.addp intrinsic into integer and fp variants. 2019-03-21 22:31:37 +00:00
arm64-neon-add-sub.ll
arm64-neon-compare-instructions.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
arm64-neon-copy.ll Regenerate neon copy tests. NFCI. 2018-12-15 14:23:18 +00:00
arm64-neon-copyPhysReg-tuple.ll
arm64-neon-mul-div-cte.ll [AArch64] Add missing testcase for r331522 2018-05-04 17:21:26 +00:00
arm64-neon-mul-div.ll
arm64-neon-scalar-by-elem-mul.ll
arm64-neon-select_cc.ll
arm64-neon-simd-ldst-one.ll [AArch64] Improve single vector lane stores 2018-05-14 15:26:35 +00:00
arm64-neon-simd-shift.ll
arm64-neon-simd-vget.ll
arm64-neon-v1i1-setcc.ll
arm64-neon-v8.1a.ll [AArch64] Add basic support for Qualcomm's Saphira CPU. 2017-09-25 14:05:00 +00:00
arm64-neon-vector-list-spill.ll
arm64-neon-vector-shuffle-extract.ll [AArch64] Skip mask checks for masks with an odd number of elements. 2019-05-21 10:05:26 +00:00
arm64-nvcast.ll [AArch64] Add nvcast patterns for v2f32 -> v1f64 2019-05-24 01:20:34 +00:00
arm64-opt-remarks-lazy-bfi.ll Add machine verifier to arm64-opt-remarks-lazy-bfi 2018-07-30 17:13:25 +00:00
arm64-patchpoint-scratch-regs.ll
arm64-patchpoint-webkit_jscc.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
arm64-patchpoint.ll
arm64-pic-local-symbol.ll
arm64-platform-reg.ll [AArch64] Support reserving arbitrary general purpose registers 2019-02-13 17:28:47 +00:00
arm64-popcnt.ll [AArch64][x86] add tests for ctpop != 1; NFC 2019-06-25 13:37:16 +00:00
arm64-prefetch.ll
arm64-promote-const.ll
arm64-redzone.ll
arm64-reg-copy-noneon.ll
arm64-register-offset-addressing.ll [AArch64] Don't reduce the width of loads if it prevents combining a shift 2018-03-23 14:47:07 +00:00
arm64-register-pairing.ll
arm64-regress-f128csel-flags.ll
arm64-regress-interphase-shift.ll
arm64-regress-opt-cmp.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
arm64-reserve-call-saved-reg.ll [AArch64] Support reserving arbitrary general purpose registers 2019-02-13 17:28:47 +00:00
arm64-reserved-arg-reg-call-error.ll [AArch64] Support reserving x1-7 registers. 2018-09-07 20:58:57 +00:00
arm64-return-vector.ll
arm64-returnaddr.ll
arm64-rev.ll [AArch64][GlobalISel] Select G_BSWAP for vectors of s32 and s64 2019-04-26 18:00:01 +00:00
arm64-rounding.ll
arm64-scaled_iv.ll
arm64-scvt.ll Fix some misc. -enable-var-scope violations 2017-11-13 01:47:52 +00:00
arm64-setcc-int-to-fp-combine.ll
arm64-shifted-sext.ll
arm64-shrink-v1i64.ll
arm64-shrink-wrapping.ll [FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack 2019-06-13 13:56:19 +00:00
arm64-simd-scalar-to-vector.ll [AArch64][GlobalISel] Enable GlobalISel at -O0 by default 2018-01-02 16:30:47 +00:00
arm64-simplest-elf.ll
arm64-sincos.ll [TargetLowering] Android has sincos functions 2018-09-18 13:18:21 +00:00
arm64-sitofp-combine-chains.ll
arm64-sli-sri-opt.ll
arm64-smaxv.ll [AArch64][TableGen] Skip tied result operands for InstAlias 2017-11-20 14:36:40 +00:00
arm64-sminv.ll [AArch64][TableGen] Skip tied result operands for InstAlias 2017-11-20 14:36:40 +00:00
arm64-spill-lr.ll
arm64-spill-remarks-treshold-hotness.ll [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00
arm64-spill-remarks.ll Make YAML quote forward slashes. 2018-10-12 16:31:20 +00:00
arm64-spill.ll
arm64-sqshl-uqshl-i64Contant.ll
arm64-st1.ll [AArch64] Improve single vector lane unscaled stores 2018-05-15 20:41:12 +00:00
arm64-stack-no-frame.ll
arm64-stackmap-nops.ll
arm64-stackmap.ll
arm64-stackpointer.ll
arm64-stacksave.ll
arm64-storebytesmerge.ll [ARM][AArch64][DAG] Reenable post-legalize store merge 2017-12-06 15:30:13 +00:00
arm64-stp-aa.ll [NFC] fix trivial typos in comments 2018-01-24 05:04:35 +00:00
arm64-stp.ll AArch64: Cyclone: Remove SlowMisaligned128Store tuning flag 2018-01-24 00:39:53 +00:00
arm64-strict-align.ll
arm64-stur.ll AArch64: Cyclone: Remove SlowMisaligned128Store tuning flag 2018-01-24 00:39:53 +00:00
arm64-subsections.ll
arm64-subvector-extend.ll [GlobalISel][AArch64] Add generic legalization rule for extends 2019-04-25 18:42:00 +00:00
arm64-summary-remarks.ll
arm64-swizzle-tbl-i16-layout.ll
arm64-tbl.ll
arm64-this-return.ll
arm64-tls-darwin.ll
arm64-tls-dynamic-together.ll [AArch64][GlobalISel] Enable GlobalISel at -O0 by default 2018-01-02 16:30:47 +00:00
arm64-tls-dynamics.ll [AArch64] Add Tiny Code Model for AArch64 2018-08-22 11:31:39 +00:00
arm64-tls-execs.ll [AArch64] Add Tiny Code Model for AArch64 2018-08-22 11:31:39 +00:00
arm64-trap.ll
arm64-triv-disjoint-mem-access.ll
arm64-trn.ll
arm64-trunc-store.ll
arm64-umaxv.ll [AArch64][TableGen] Skip tied result operands for InstAlias 2017-11-20 14:36:40 +00:00
arm64-uminv.ll [AArch64][TableGen] Skip tied result operands for InstAlias 2017-11-20 14:36:40 +00:00
arm64-umov.ll
arm64-unaligned_ldst.ll
arm64-uzp.ll
arm64-vaargs.ll
arm64-vabs.ll Improve reduction intrinsics by overloading result value. 2019-06-13 09:37:38 +00:00
arm64-vadd.ll [AArch64] Split the neon.addp intrinsic into integer and fp variants. 2019-03-21 22:31:37 +00:00
arm64-vaddlv.ll
arm64-vaddv.ll [AArch64][TableGen] Skip tied result operands for InstAlias 2017-11-20 14:36:40 +00:00
arm64-variadic-aapcs.ll [DAGCombiner] If a TokenFactor would be merged into its user, consider the user later. 2019-03-13 17:07:09 +00:00
arm64-vbitwise.ll
arm64-vclz.ll [GlobalISel][AArch64] Legalize + select some llvm.ctlz.* intrinsics 2019-02-18 23:33:24 +00:00
arm64-vcmp.ll
arm64-vcnt.ll
arm64-vcombine.ll [AArch64][TableGen] Skip tied result operands for InstAlias 2017-11-20 14:36:40 +00:00
arm64-vcvt.ll [GlobalISel][AArch64] Add support for @llvm.ceil 2018-12-19 19:01:36 +00:00
arm64-vcvt_f.ll [AArch64] Regenerate vcvt tests. NFCI. 2019-06-24 17:18:20 +00:00
arm64-vcvt_f32_su32.ll
arm64-vcvt_n.ll
arm64-vcvt_su32_f32.ll
arm64-vcvtxd_f32_f64.ll
arm64-vecCmpBr.ll
arm64-vecFold.ll
arm64-vector-ext.ll [AArch64] Do 64-bit vector move of 0 and -1 by extracting from the 128-bit move 2018-10-25 14:56:48 +00:00
arm64-vector-imm.ll
arm64-vector-insertion.ll [AArch64] Improve code generation of constant vectors 2018-03-05 17:02:47 +00:00
arm64-vector-ldst.ll Reland r329956, "AArch64: Introduce a DAG combine for folding offsets into addresses.", with a fix for the bot failure. 2018-04-23 19:09:34 +00:00
arm64-vext.ll [DAGCombiner] loosen restrictions for moving shuffles after vector binop 2019-04-03 13:42:06 +00:00
arm64-vext_reverse.ll
arm64-vfloatintrinsics.ll [GlobalISel][AArch64] Legalize G_FNEARBYINT 2019-04-25 16:44:40 +00:00
arm64-vhadd.ll
arm64-vhsub.ll
arm64-virtual_base.ll [AArch64] Gangup loads and stores for pairing. 2018-05-16 15:36:52 +00:00
arm64-vmax.ll
arm64-vminmaxnm.ll
arm64-vmovn.ll
arm64-vmul.ll [AArch64] Fix condition for "high-vector" DUP optimizations. 2019-02-08 00:23:35 +00:00
arm64-volatile.ll
arm64-vpopcnt.ll [AARCH64] Improve vector popcnt lowering with ADDLP 2018-10-15 21:15:58 +00:00
arm64-vqadd.ll
arm64-vqsub.ll
arm64-vselect.ll
arm64-vsetcc_fp.ll
arm64-vshift.ll
arm64-vshr.ll
arm64-vshuffle.ll [AArch64] Do 64-bit vector move of 0 and -1 by extracting from the 128-bit move 2018-10-25 14:56:48 +00:00
arm64-vsqrt.ll
arm64-vsra.ll
arm64-vsub.ll
arm64-weak-reference.ll
arm64-windows-calls.ll [COFF, ARM64] Fix ABI implementation of struct returns 2019-05-03 21:12:36 +00:00
arm64-windows-tailcall.ll [COFF, ARM64] Fix ABI implementation of struct returns 2019-05-03 21:12:36 +00:00
arm64-xaluo.ll [AArch64][GlobalISel] Add isel support for G_UADDO on s32s and s64s 2019-03-14 22:54:29 +00:00
arm64-zero-cycle-regmov.ll [AArch64] Split zero cycle feature more granularly 2018-09-28 19:05:09 +00:00
arm64-zero-cycle-zeroing.ll [AArch64] Do 64-bit vector move of 0 and -1 by extracting from the 128-bit move 2018-10-25 14:56:48 +00:00
arm64-zeroreg.ll
arm64-zext.ll
arm64-zextload-unscaled.ll
arm64-zip.ll
asm-large-immediate.ll
asm-print-comments.ll
assertion-rc-mismatch.ll
atomic-ops-lse.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
atomic-ops-not-barriers.ll
atomic-ops.ll
autoupgrade-aarch64-neon-addp-float.ll [AArch64] Split the neon.addp intrinsic into integer and fp variants. 2019-03-21 22:31:37 +00:00
basic-pic.ll
bics.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
big-callframe.ll Revert "AArch64: Omit callframe setup/destroy when not necessary" 2018-01-29 19:56:42 +00:00
bisect-post-ra-machine-sink.mir Add skipFunction to PostRA machine sinking pass. 2019-02-21 02:11:06 +00:00
bitcast-promote-widen.ll [LegalizeTypes] Teach PromoteIntRes_BITCAST to better handle a bitcast with vector output type and a vector input type that needs to be widened 2018-10-30 03:27:15 +00:00
bitcast-v2i8.ll
bitcast.ll [AArch64] Do 64-bit vector move of 0 and -1 by extracting from the 128-bit move 2018-10-25 14:56:48 +00:00
bitfield-extract.ll AArch64: get type from correct result when forming BFX 2018-01-23 15:11:27 +00:00
bitfield-insert-0.ll
bitfield-insert.ll [NFC][AArch64] Autogenerate bitfield-insert.ll, selectcc-to-shiftand.ll tests 2019-05-18 17:42:06 +00:00
bitfield.ll [DAGCombiner] When combining zero_extend of a truncate, only mask before extending for vectors. 2018-03-01 22:32:25 +00:00
bitreverse.ll [AArch64][TableGen] Skip tied result operands for InstAlias 2017-11-20 14:36:40 +00:00
blockaddress.ll [AArch64] Add Tiny Code Model for AArch64 2018-08-22 11:31:39 +00:00
bool-ext-inc.ll [DAGCombiner] sub X, 0/1 --> add X, 0/-1 2019-01-30 22:41:35 +00:00
bool-loads.ll
br-cond-not-merge.ll [AArch64][GlobalISel] Enable GlobalISel at -O0 by default 2018-01-02 16:30:47 +00:00
br-to-eh-lpad.ll
br-undef-cond.ll
branch-folder-merge-mmos.ll
branch-folder-oneinst.mir [AArch64] Fix mir test case liveins info. 2018-05-15 16:27:34 +00:00
branch-relax-alignment.ll
branch-relax-asm.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
branch-relax-bcc.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
branch-relax-cbz.ll [FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack 2019-06-13 13:56:19 +00:00
branch-target-enforcement-indirect-calls.ll [AArch64][v8.5A] Restrict indirect tail calls to use x16/17 only when using BTI 2018-10-08 14:09:15 +00:00
branch-target-enforcment.mir Describe stack-id as an enum 2019-06-17 09:13:29 +00:00
breg.ll
bswap-known-bits.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
build-one-lane.ll [AArch64] Improve code generation of constant vectors 2018-03-05 17:02:47 +00:00
build-pair-isel.ll [AArch64] Fix isel failure when BUILD_PAIR nodes are left over. 2018-04-10 19:01:58 +00:00
build-vector-extract.ll [AArch64] add more tests for buildvec to shuffle transform; NFC 2019-01-21 17:46:35 +00:00
byval-type.ll Reapply: IR: add optional type to 'byval' function parameters 2019-05-30 18:48:23 +00:00
callee-save.ll
ccmp-successor-probs.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
cfi_restore.mir Describe stack-id as an enum 2019-06-17 09:13:29 +00:00
cgp-trivial-phi-node.ll [CGP] Fix UB when GEP is bound to trivial PHINode 2019-03-12 10:10:29 +00:00
cgp-usubo.ll [AArch64][x86] add tests for unsigned subtract with overflow; NFC 2019-02-05 15:26:42 +00:00
chkstk.ll [ARM64] [Windows] Exception handling support in frame lowering 2018-10-31 09:27:01 +00:00
cluster-frame-index.mir [MachineScheduler] Add support for clustering mem ops with FI base operands 2018-11-28 12:00:28 +00:00
cmp-const-max.ll
cmp-frameindex.ll AArch64: account for possible frame index operand in compares. 2017-10-17 21:43:52 +00:00
cmp-to-cmn.ll [AArch64] Catch some more CMN opportunities. 2018-12-13 10:31:32 +00:00
cmpwithshort.ll NFC - Various typo fixes in tests 2018-07-04 13:28:39 +00:00
cmpxchg-O0.ll Revert r329611, "AArch64: Allow offsets to be folded into addresses with ELF." 2018-04-10 16:19:30 +00:00
cmpxchg-idioms.ll [MBP] Move a latch block with conditional exit and multi predecessors to top of loop 2019-06-14 23:08:59 +00:00
cmpxchg-lse-even-regs.ll AArch64: enforce even/odd register pairs for CASP instructions. 2019-02-06 15:26:35 +00:00
code-model-large-abs.ll
code-model-tiny-abs.ll [AArch64] Optimise load(adr address) to ldr address 2018-08-30 11:55:16 +00:00
combine-and-like.ll [DAGCombine] visitANDLike - ensure APInt is is in range for getSExtValue/getZExtValue 2017-12-26 23:27:44 +00:00
combine-comparisons-by-cse.ll
compare-branch.ll
compiler-ident.ll
complex-copy-noneon.ll
complex-fp-to-int.ll
complex-int-to-fp.ll
concat_vector-scalar-combine.ll [AArch64][TableGen] Skip tied result operands for InstAlias 2017-11-20 14:36:40 +00:00
concat_vector-truncate-combine.ll
concat_vector-truncated-scalar-combine.ll
cond-br-tuning.ll
cond-sel-value-prop.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
cond-sel.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
const-shift-of-constmasked.ll [NFC][CodeGen][X86][AArch64] Add and-const-mask + const-shift pattern tests 2019-05-14 20:17:04 +00:00
consthoist-gep.ll Revert "Revert r341269: [Constant Hoisting] Hoisting Constant GEP Expressions" 2018-09-04 22:17:03 +00:00
copyprop.mir Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding" 2018-02-27 16:59:10 +00:00
cpus.ll [AArch64, ARM] Add support for Exynos M5 2019-03-22 18:42:14 +00:00
csel-zero-float.ll
cxx-tlscc.ll [AArch64][GlobalISel] Enable GlobalISel at -O0 by default 2018-01-02 16:30:47 +00:00
dag-combine-invaraints.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
dag-combine-mul-shl.ll
dag-combine-select.ll
dag-numsignbits.ll
dbg-declare-tag-offset.ll hwasan: Add a tag_offset DWARF attribute to instrumented stack variables. 2019-06-17 23:39:41 +00:00
directcond.ll
div_minsize.ll
divrem.ll
dllexport.ll [CodeGen] Hoist common AsmPrinter code out of X86, ARM, and AArch64 2018-01-17 23:55:23 +00:00
dllimport.ll [GlobalISel] Bail out on calls to dllimported functions 2018-01-30 19:50:58 +00:00
dont-shrink-wrap-stack-mayloadorstore.mir Describe stack-id as an enum 2019-06-17 09:13:29 +00:00
dont-take-over-the-world.ll
dp-3source.ll
dp1.ll [GlobalISel][AArch64] Select llvm.bswap* for non-vector types 2019-02-12 17:28:17 +00:00
dp2.ll
dwarf-cfi.ll [AArch64] Default to SEH exception handling on MinGW 2019-05-06 21:18:15 +00:00
eh_recoverfp.ll [AutoUpgrade] Fix AutoUpgrade for x86.seh.recoverfp 2019-02-02 01:32:48 +00:00
eliminate-trunc.ll
emutls.ll Replace "no-frame-pointer-*" function attributes with "frame-pointer" 2019-01-14 10:55:55 +00:00
emutls_generic.ll [TLS] use emulated TLS if the target supports only this mode 2018-02-28 17:48:55 +00:00
eon.ll
expand-select.ll [LegalizeDAG] Truncate condition operand of ISD::SELECT 2018-02-07 05:38:29 +00:00
ext-narrow-index.ll [AArch64] Add EXT patterns for 64-bit EXT of a subvector of a 128-bit vector 2018-10-25 15:31:51 +00:00
extern-weak.ll [AArch64] Add Tiny Code Model for AArch64 2018-08-22 11:31:39 +00:00
extract-bits.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
extract-insert.ll [DAGCombiner] reduce insert+bitcast+extract vector ops to truncate (PR39016) 2018-10-21 20:13:29 +00:00
extract-lowbits.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
extract.ll
f16-convert.ll
f16-imm.ll [AArch64] Add FMOVH0: materialize 0 using zero register for f16 values 2017-08-24 14:47:06 +00:00
f16-instructions.ll [AArch64][GlobalISel] Select G_INTRINSIC_ROUND 2019-04-23 23:03:03 +00:00
fabs.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
fadd-combines.ll [AArch64] Optimize floating point materialization 2019-02-01 12:26:06 +00:00
falkor-hwpf-fix.ll [AArch64][Falkor] Avoid HW prefetcher tag collisions (step 2) 2017-07-18 16:14:22 +00:00
falkor-hwpf-fix.mir [AArch64][Falkor] Fix bug in Falkor HWPF collision avoidance pass. 2018-04-10 21:43:03 +00:00
falkor-hwpf.ll [AArch64][Falkor] Avoid HW prefetcher tag collisions (step 1) 2017-07-14 21:44:12 +00:00
fast-isel-address-extends.ll Relax fast register allocator related test cases; NFC 2018-10-29 20:10:42 +00:00
fast-isel-addressing-modes.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
fast-isel-assume.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
fast-isel-atomic.ll Relax fast register allocator related test cases; NFC 2018-10-29 20:10:42 +00:00
fast-isel-branch-cond-mask.ll Relax fast register allocator related test cases; NFC 2018-10-29 20:10:42 +00:00
fast-isel-branch-cond-split.ll
fast-isel-branch_weights.ll
fast-isel-call-return.ll
fast-isel-cbz.ll
fast-isel-cmp-branch.ll
fast-isel-cmp-vec.ll [DAG] Move integer setcc %x, %x folding into FoldSetCC 2019-03-13 11:08:57 +00:00
fast-isel-cmpxchg.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
fast-isel-dbg.ll Rename ExpandISelPseudo->FinalizeISel, delay register reservation 2019-06-19 00:25:39 +00:00
fast-isel-erase.ll FastIsel: take care to update iterators when removing instructions. 2018-12-17 17:25:53 +00:00
fast-isel-folded-shift.ll
fast-isel-folding.ll
fast-isel-gep.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
fast-isel-int-ext.ll
fast-isel-int-ext2.ll
fast-isel-int-ext3.ll
fast-isel-int-ext4.ll
fast-isel-int-ext5.ll
fast-isel-intrinsic.ll
fast-isel-logic-op.ll
fast-isel-memcpy.ll Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
fast-isel-mul.ll
fast-isel-runtime-libcall.ll
fast-isel-sdiv.ll Fix check-prefix vs check-prefixes typo in updated test 2018-07-11 10:42:51 +00:00
fast-isel-select.ll [AArch64][GlobalISel] Use fcsel instead of csel for G_SELECT on FPRs 2019-05-03 22:37:46 +00:00
fast-isel-shift.ll
fast-isel-sp-adjust.ll [AArch64][GlobalISel] Enable GlobalISel at -O0 by default 2018-01-02 16:30:47 +00:00
fast-isel-sqrt.ll
fast-isel-switch-phi.ll
fast-isel-tail-call.ll
fast-isel-tbz.ll
fast-isel-trunc.ll
fast-isel-vector-arithmetic.ll
fast-isel-vret.ll
fast-regalloc-empty-bb-with-liveins.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
fastcc-reserved.ll
fastcc.ll Replace "no-frame-pointer-*" function attributes with "frame-pointer" 2019-01-14 10:55:55 +00:00
fcmp.ll
fcopysign.ll [NFC][AArch64] Autogenerate fcopysign.ll test 2019-05-18 20:24:40 +00:00
fcsel-zero.ll
fcvt-fixed.ll
fcvt-int.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
fcvt_combine.ll [DAG] fold FP binops with undef operands to NaN 2018-05-21 23:54:19 +00:00
fdiv-combine.ll
fdiv_combine.ll
fence-singlethread.ll Enhance synchscope representation 2017-07-11 22:23:00 +00:00
flags-multiuse.ll Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding" 2018-02-27 16:59:10 +00:00
floatdp_1source.ll
floatdp_2source.ll
fold-constants.ll [DAGCombiner][X86][SystemZ][AArch64] Combine some cases of (bitcast (build_vector constants)) between legalize types and legalize dag. 2019-03-04 19:12:16 +00:00
fold-global-offsets.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
fp-cond-sel.ll AArch64: work around how Cyclone handles "movi.2d vD, #0". 2017-12-18 10:36:00 +00:00
fp-const-fold.ll [SelectionDAG] remove constant folding limitations based on FP exceptions 2019-05-02 14:47:59 +00:00
fp-dp3.ll
fp16-v4-instructions.ll [AArch64] Improve FP16 instruction selection for vector round and vector conver from half instructions 2019-03-06 20:30:06 +00:00
fp16-v8-instructions.ll [AArch64] Improve FP16 instruction selection for vector round and vector conver from half instructions 2019-03-06 20:30:06 +00:00
fp16-v16-instructions.ll [AArch64][TableGen] Skip tied result operands for InstAlias 2017-11-20 14:36:40 +00:00
fp16-vector-bitcast.ll
fp16-vector-load-store.ll [AArch64] Improve single vector lane unscaled stores 2018-05-15 20:41:12 +00:00
fp16-vector-nvcast.ll
fp16-vector-shuffle.ll [AArch64][TableGen] Skip tied result operands for InstAlias 2017-11-20 14:36:40 +00:00
fp16_intrinsic_lane.ll [AArch64] Add vmulxh_lane fp16 vector intrinsic 2018-03-20 20:25:40 +00:00
fp16_intrinsic_scalar_1op.ll [AArch64] Codegen tests for the Armv8.2-A FP16 intrinsics 2018-03-15 13:42:28 +00:00
fp16_intrinsic_scalar_2op.ll [AArch64] Add lowering pattern for llvm.aarch64.neon.vcvtfxs2fp.f16.i64 2019-04-11 14:19:43 +00:00
fp16_intrinsic_scalar_3op.ll [AArch64] Codegen tests for the Armv8.2-A FP16 intrinsics 2018-03-15 13:42:28 +00:00
fp16_intrinsic_vector_1op.ll [AArch64] Codegen tests for the Armv8.2-A FP16 intrinsics 2018-03-15 13:42:28 +00:00
fp16_intrinsic_vector_2op.ll [AArch64] Add patterns matching (fabs (fsub x y)) to (fabd x y) 2018-04-04 10:12:53 +00:00
fp16_intrinsic_vector_3op.ll [AArch64] Codegen tests for the Armv8.2-A FP16 intrinsics 2018-03-15 13:42:28 +00:00
fp128-folding.ll
fpconv-vector-op-scalarize.ll
fpimm.ll [AArch64] Optimize floating point materialization 2019-03-18 18:45:57 +00:00
fptouint-i8-zext.ll
frameaddr.ll
free-zext.ll
ftrunc.ll [DAGCombiner] restrict (float)((int) f) --> ftrunc with no-signed-zeros 2018-06-27 18:16:40 +00:00
func-argpassing.ll Revert r329611, "AArch64: Allow offsets to be folded into addresses with ELF." 2018-04-10 16:19:30 +00:00
func-calls.ll Revert r329611, "AArch64: Allow offsets to be folded into addresses with ELF." 2018-04-10 16:19:30 +00:00
funclet-local-stack-size.ll [ARM64][Windows] Fix local stack size for funclets 2018-12-04 00:54:52 +00:00
funcptr_cast.ll
function-subtarget-features.ll
funnel-shift-rot.ll [SelectionDAG] try harder to convert funnel shift to rotate 2018-08-09 17:26:22 +00:00
funnel-shift.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
gep-nullptr.ll
ghc-cc.ll
global-alignment.ll
global-merge-1.ll [GlobalMerge] Set the alignment on merged global structs 2018-06-06 14:48:32 +00:00
global-merge-2.ll [GlobalMerge] Set the alignment on merged global structs 2018-06-06 14:48:32 +00:00
global-merge-3.ll [GlobalMerge] Fix GlobalMerge on bss external global variables. 2018-08-30 00:49:50 +00:00
global-merge-4.ll [GlobalMerge] Set the alignment on merged global structs 2018-06-06 14:48:32 +00:00
global-merge-group-by-use.ll [GlobalMerge] Set the alignment on merged global structs 2018-06-06 14:48:32 +00:00
global-merge-ignore-single-use-minsize.ll [GlobalMerge] Set the alignment on merged global structs 2018-06-06 14:48:32 +00:00
global-merge-ignore-single-use.ll [GlobalMerge] Set the alignment on merged global structs 2018-06-06 14:48:32 +00:00
global-merge-minsize.ll [AArch64] Merge globals when optimising for size 2019-06-12 08:28:35 +00:00
global-merge.ll
got-abuse.ll
half.ll [SelectionDAG] Add fcmp UNDEF handling to SelectionDAG::FoldSetCC 2019-04-05 14:56:21 +00:00
hints.ll
hoist-and-by-const-from-lshr-in-eqcmp-zero.ll [NFC][Codegen] D62818 - also add tests with X being constant 2019-06-04 11:44:50 +00:00
hoist-and-by-const-from-shl-in-eqcmp-zero.ll [NFC][Codegen] D62818 - also add tests with X being constant 2019-06-04 11:44:50 +00:00
hwasan-check-memaccess.ll hwasan: Improve precision of checks using short granule tags. 2019-07-09 20:22:36 +00:00
hwasan-prefer-fp.ll AArch64: Prefer FP-relative debug locations in HWASANified functions. 2019-06-22 00:06:51 +00:00
i1-contents.ll
i128-align.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
i128-fast-isel-fallback.ll Revert "[AArch64] Coalesce Copy Zero during instruction selection" 2018-06-21 16:05:24 +00:00
iabs.ll [SelectionDAG] Handle unary SelectPatternFlavor for ABS case in SelectionDAGBuilder::visitSelect 2019-03-19 16:24:55 +00:00
ifcvt-select.ll
illegal-float-ops.ll [Analysis] Disable calls to *_finite and other glibc-only functions on Android. 2018-01-31 19:12:50 +00:00
immcost.ll [AArch64] Small fix for getIntImmCost 2019-03-18 18:50:58 +00:00
implicit-sret.ll
inc-of-add.ll [Codegen][X86][AArch64][ARM][PowerPC] Inc-of-add vs sub-of-not (PR42457) 2019-07-03 09:41:35 +00:00
init-array.ll [IR] Disallow llvm.global_ctors and llvm.global_dtors of the 2-field form in textual format 2019-05-15 02:35:32 +00:00
inline-asm-blockaddress.ll [TargetLowering] support BlockAddress as "i" inline asm constraint 2019-07-10 17:08:25 +00:00
inline-asm-clobber.ll [CodeGen] emit inline asm clobber list warnings for reserved (cont) 2018-08-30 12:52:35 +00:00
inline-asm-constraints-badI.ll
inline-asm-constraints-badK.ll
inline-asm-constraints-badK2.ll
inline-asm-constraints-badL.ll
inline-asm-globaladdress.ll
inline-asm-i-constraint-i1.ll [TargetLowering] Extend bool args to inline-asm according to getBooleanType 2019-05-22 16:16:15 +00:00
inline-asm-multilevel-gep.ll [TargetLowering] Handle multi depth GEPs w/ inline asm constraints 2019-05-13 17:27:44 +00:00
inlineasm-S-constraint.ll [AArch64] Support "S" inline assembler constraint 2018-05-16 09:33:25 +00:00
inlineasm-X-allocation.ll
inlineasm-X-constraint.ll
inlineasm-illegal-type.ll [AArch64] Reject inline asm with FP registers when FP is disabled. 2018-08-24 19:12:13 +00:00
inlineasm-ldr-pseudo.ll
inlineasm-output-template.ll [AsmPrinter] refactor to support %c w/ GlobalAddress' 2019-04-26 18:45:04 +00:00
intrinsics-memory-barrier.ll
isinf.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
jump-table-compress.mir AArch64: add a pass to compress jump-table entries when possible. 2018-10-24 20:19:09 +00:00
jump-table-exynos.ll AArch64: add a pass to compress jump-table entries when possible. 2018-10-24 20:19:09 +00:00
jump-table.ll AArch64: add a pass to compress jump-table entries when possible. 2018-10-24 20:19:09 +00:00
known-never-nan.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
lack-of-signed-truncation-check.ll [AArch64] Swap comparison operands if that enables some folding. 2018-10-13 07:43:56 +00:00
landingpad-ifcvt.ll [EarlyIfConversion] Don't if-convert unconditional branches. 2019-01-15 00:19:46 +00:00
large-consts.ll
large_shift.ll
ldp-stp-scaled-unscaled-pairs.ll Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
ldradr.ll [AArch64] Optimise load(adr address) to ldr address 2018-08-30 11:55:16 +00:00
ldst-miflags.mir [AArch64] Keep track of MIFlags in the LoadStoreOptimizer 2018-03-14 17:10:58 +00:00
ldst-opt-aa.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
ldst-opt-after-block-placement.ll [AArch64] Re-run load/store optimizer after aggressive tail duplication 2018-12-17 10:45:43 +00:00
ldst-opt-zr-clobber.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
ldst-opt.ll AArch64: avoid splitting vector truncating stores. 2019-01-08 13:30:27 +00:00
ldst-opt.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
ldst-paired-aliasing.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
ldst-regoffset.ll
ldst-unscaledimm.ll
ldst-unsignedimm.ll
ldst-zero.ll Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
legalize-bug-bogus-cpu.ll
lit.local.cfg
literal_pools_float.ll [AArch64] Optimize floating point materialization 2019-03-18 18:45:57 +00:00
live-interval-analysis.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
llrint-conv-fp16.ll AArch64] Handle ISD::LRINT and ISD::LLRINT for float16 2019-06-06 12:38:11 +00:00
llrint-conv.ll [AArch64] Handle ISD::LRINT and ISD::LLRINT 2019-05-28 21:04:29 +00:00
llround-conv-fp16.ll [AArch64] Handle ISD::LROUND and ISD::LLROUND for float16 2019-06-06 11:53:26 +00:00
llround-conv.ll [AArch64] Handle ISD::LROUND and ISD::LLROUND 2019-05-16 13:30:18 +00:00
load-combine-big-endian.ll
load-combine.ll Fix a reoccuring typo in load-combine tests 2018-03-27 17:33:50 +00:00
load-store-forwarding.ll [DAGCombiner] Fix for big endian in ForwardStoreValueToDirectLoad 2018-10-30 20:16:39 +00:00
local_vars.ll Replace "no-frame-pointer-*" function attributes with "frame-pointer" 2019-01-14 10:55:55 +00:00
logical-imm.ll
logical_shifted_reg.ll
loh.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
loop-micro-op-buffer-size-t99.ll [Utils] Clean another duplicated util method. 2019-06-04 18:45:15 +00:00
loopvectorize_pr33804_double.ll [LoopVectorizer] Add more testcases for PR33804. 2017-09-18 17:28:15 +00:00
lower-range-metadata-func-call.ll
lrint-conv-fp16-win.ll AArch64] Handle ISD::LRINT and ISD::LLRINT for float16 2019-06-06 12:38:11 +00:00
lrint-conv-fp16.ll AArch64] Handle ISD::LRINT and ISD::LLRINT for float16 2019-06-06 12:38:11 +00:00
lrint-conv-win.ll [AArch64] Handle ISD::LRINT and ISD::LLRINT 2019-05-28 21:04:29 +00:00
lrint-conv.ll [AArch64] Handle ISD::LRINT and ISD::LLRINT 2019-05-28 21:04:29 +00:00
lround-conv-fp16-win.ll [AArch64] Handle ISD::LROUND and ISD::LLROUND for float16 2019-06-06 11:53:26 +00:00
lround-conv-fp16.ll [AArch64] Handle ISD::LROUND and ISD::LLROUND for float16 2019-06-06 11:53:26 +00:00
lround-conv-win.ll [AArch64] Handle lowering lround on windows, where long is 32 bit 2019-05-20 19:53:28 +00:00
lround-conv.ll [AArch64] Handle ISD::LROUND and ISD::LLROUND 2019-05-16 13:30:18 +00:00
machine-combiner-madd.ll [AArch64] Update test cases for Exynos M3 2018-01-30 15:40:27 +00:00
machine-combiner.ll [MachineCombiner] Add check for optimal pattern order. 2018-01-31 13:54:30 +00:00
machine-combiner.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
machine-copy-prop.ll [CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register. 2017-12-07 10:40:31 +00:00
machine-copy-remove.ll
machine-copy-remove.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
machine-cp-clobbers.mir Reapply "[MachineCopyPropagation] Reimplement CopyTracker in terms of register units" 2018-10-22 19:51:31 +00:00
machine-dead-copy.mir [MachineCopyPropagation] Handle COPY with overlapping source/dest. 2018-03-30 00:56:03 +00:00
machine-outliner-all-stack.mir [MachineOutliner] Drop candidates that require fixups if it's beneficial 2018-12-03 19:11:27 +00:00
machine-outliner-bad-adrp.mir AArch64/test: Add check for function name to machine-outliner-bad-adrp.mir 2019-02-20 18:43:45 +00:00
machine-outliner-bad-register.mir [MachineOutliner] Don't outline sequences where x16/x17/nzcv are live across 2018-06-27 17:43:27 +00:00
machine-outliner-bti.mir [AArch64][v8.5A] Don't create BR instructions in outliner when BTI enabled 2018-10-08 14:12:08 +00:00
machine-outliner-calls.mir [MachineOutliner] Add defs to calls + don't track liveness on outlined functions 2018-04-27 23:36:35 +00:00
machine-outliner-compatible-candidates.mir [MachineOutliner] Drop candidates that require fixups if it's beneficial 2018-12-03 19:11:27 +00:00
machine-outliner-default.mir Recommit "Enable MachineOutliner by default under -Oz for AArch64" 2018-07-27 20:18:27 +00:00
machine-outliner-drop-stack.mir [MachineOutliner] Drop candidates that require fixups if it's beneficial 2018-12-03 19:11:27 +00:00
machine-outliner-flags.ll Recommit "Enable MachineOutliner by default under -Oz for AArch64" 2018-07-27 20:18:27 +00:00
machine-outliner-inline-asm-adrp.mir [MachineOutliner] Check for explicit uses of LR/W30 in MI operands 2018-04-24 22:38:15 +00:00
machine-outliner-noredzone.ll [MachineOutliner] Add defs to calls + don't track liveness on outlined functions 2018-04-27 23:36:35 +00:00
machine-outliner-ordering.mir [MachineOutliner] Outline functions by order of benefit 2018-12-05 21:36:04 +00:00
machine-outliner-outline-bti.ll [AArch64][Outliner] Don't outline BTI instructions 2019-02-05 17:21:57 +00:00
machine-outliner-regsave.mir [MachineOutliner] Outline both register save calls + no LR save calls together 2018-11-30 21:14:58 +00:00
machine-outliner-remarks.ll [MachineOutliner][AArch64] Improve checks for stack instructions 2018-12-01 21:24:06 +00:00
machine-outliner-size-info.mir [MachineOutliner] Add codegen size remarks to the MachineOutliner 2018-09-11 23:05:34 +00:00
machine-outliner-tail.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
machine-outliner-thunk.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
machine-outliner-unsafe-stack-call.mir [MachineOutliner] Move stack instr check logic to getOutliningCandidateInfo 2018-12-04 00:31:55 +00:00
machine-outliner.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
machine-outliner.mir [MachineOutliner][AArch64] Improve checks for stack instructions 2018-12-01 21:24:06 +00:00
machine-scheduler.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
machine-sink-kill-flags.ll
machine-sink-zr.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
machine-zero-copy-remove.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
machine_cse.ll [AArch64] Do 64-bit vector move of 0 and -1 by extracting from the 128-bit move 2018-10-25 14:56:48 +00:00
machine_cse_illegal_hoist.ll [MIR] Skip hoisting to basic block which may throw exception or return 2019-06-12 13:51:44 +00:00
machine_cse_impdef_killflags.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
macho-global-symbols.ll
macho-trap.ll MachO: trap unreachable instructions 2018-04-13 22:25:20 +00:00
macro-fusion-last.mir MacroFusion: Fix macro fusion with ExitSU failing in top-down scheduling 2018-07-26 17:43:56 +00:00
madd-combiner.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
madd-lohi.ll
mature-mc-support.ll
max-jump-table.ll [CodeGen] Improve formatting of jump tables (NFC) 2019-06-26 15:11:31 +00:00
memcpy-f128.ll Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
merge-store-dependency.ll Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding" 2018-02-27 16:59:10 +00:00
merge-store.ll [AArch64] Regenerate merge-store tests. NFCI. 2019-06-24 16:57:12 +00:00
mergestores_noimplicitfloat.ll [AArch64] Gangup loads and stores for pairing. 2018-05-16 15:36:52 +00:00
midpoint-int.ll [NFC][CodeGen][X86][AArch64] Add tests for C++ std::midpoint() pattern (PR40965) 2019-03-05 20:18:47 +00:00
min-jump-table.ll [CodeGen] Fix formatting and comments (NFC) 2019-06-20 16:34:00 +00:00
mingw-refptr.ll [GlobalISel] Add ISel support for @llvm.lifetime.start and @llvm.lifetime.end 2019-01-28 19:22:29 +00:00
minmax-of-minmax.ll [ValueTracking] recognize min/max-of-min/max with notted ops (PR35875) 2018-01-11 15:13:47 +00:00
minmax.ll
misched-fusion-addr.ll [AArch64, ARM] Add support for Exynos M5 2019-03-22 18:42:14 +00:00
misched-fusion-aes.ll Adjust MachineScheduler to use ProcResource counts 2019-05-10 16:54:32 +00:00
misched-fusion-arith-logic.mir [AArch64] Adjust the feature set for Exynos 2019-01-15 01:53:49 +00:00
misched-fusion-crypto-eor.mir [CodeGen] Always print register ties in MI::dump() 2018-09-26 13:33:09 +00:00
misched-fusion-csel.ll [AArch64, ARM] Add support for Exynos M5 2019-03-22 18:42:14 +00:00
misched-fusion-lit.ll [AArch64, ARM] Add support for Exynos M5 2019-03-22 18:42:14 +00:00
misched-fusion.ll [AArch64] Restore the test of conditional branch fusion 2017-08-21 21:57:43 +00:00
misched-stp.ll AArch64: Cyclone: Remove SlowMisaligned128Store tuning flag 2018-01-24 00:39:53 +00:00
mlicm-stack-write-check.mir [MachineLICM] Debug intrinsics shouldn't affect hoist decisions 2018-05-04 19:25:09 +00:00
movimm-wzr.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
movw-consts.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
movw-shift-encoding.ll
mul-lohi.ll
mul_by_elt.ll [AArch64] add tests with multiple binop+splat vals; NFC 2019-04-21 15:01:19 +00:00
mul_pow2.ll
multi-vector-store-size.ll [AArch64] Create proper memoperand for multi-vector stores 2018-10-30 19:17:51 +00:00
neg-imm.ll [MBP] Move a latch block with conditional exit and multi predecessors to top of loop 2019-06-14 23:08:59 +00:00
neon-bitcast.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
neon-bitwise-instructions.ll [AArch64] Harden test case 2018-03-05 17:42:18 +00:00
neon-compare-instructions.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
neon-diagnostics.ll
neon-dot-product.ll [AArch64] Codegen for v8.2A dot product intrinsics 2018-04-27 13:45:32 +00:00
neon-extract.ll [AArch64] Harden test cases 2018-02-26 23:19:25 +00:00
neon-fma-FMF.ll Utilize new SDNode flag functionality to expand current support for fma 2018-06-16 00:03:06 +00:00
neon-fma.ll
neon-fp16fml.ll [AArch64] Implement FP16FML intrinsics 2018-10-25 23:36:41 +00:00
neon-fpround_f128.ll
neon-idiv.ll [AArch64] Custom Lower MULLH{S,U} for v16i8, v8i16, and v4i32 2018-05-04 14:33:55 +00:00
neon-inline-asm-16-bit-fp.ll
neon-mla-mls.ll
neon-mov.ll
neon-or-combine.ll
neon-perm.ll
neon-scalar-by-elem-fma.ll
neon-scalar-copy.ll [AArch64] define isExtractSubvectorCheap 2018-03-06 16:54:55 +00:00
neon-shift-left-long.ll
neon-truncStore-extLoad.ll [AArch64] Add custom lowering for v4i8 trunc store 2018-06-27 13:58:46 +00:00
nest-register.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
no-fp-asm-clobbers-crash.ll Don't crash when we see unallocatable registers in clobbers 2017-10-23 20:46:36 +00:00
no-quad-ldp-stp.ll [AArch64] Update test cases for Exynos M3 2018-01-30 15:40:27 +00:00
no-stack-arg-probe.ll [ARM, AArch64] Check the no-stack-arg-probe attribute for dynamic stack probes 2018-03-19 20:06:50 +00:00
nonlazybind.ll Fixed typos in tests: s/CHEKC/CHECK/ 2019-02-25 13:41:59 +00:00
nontemporal.ll Revert "AArch64: Omit callframe setup/destroy when not necessary" 2018-01-29 19:56:42 +00:00
nzcv-save.ll
optimize-cond-branch.ll
optimize-imm.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
or-combine.ll
overlapping-copy-bundle-cycle.mir Re-apply "[VirtRegRewriter] Avoid clobbering registers when expanding copy bundles" 2018-06-14 19:24:03 +00:00
overlapping-copy-bundle.mir Re-apply "[VirtRegRewriter] Avoid clobbering registers when expanding copy bundles" 2018-06-14 19:24:03 +00:00
paired-load.ll
phi-dbg.ll MachineOperand/MIParser: Do not print debug-use flag, infer it 2018-10-30 23:28:27 +00:00
pic-eh-stubs.ll
pie.ll
post-ra-machine-sink.mir [PostRASink] extend the live-in check for all aliased registers 2018-04-27 19:59:20 +00:00
postra-mi-sched.ll
pow.75.ll [DAGCombine] Optimize pow(X, 0.75) to sqrt(X) * sqrt(sqrt(X)) 2019-02-08 19:50:58 +00:00
pow.ll [DAGCombiner] try to convert pow(x, 0.25) to sqrt(sqrt(x)) 2018-09-05 17:01:56 +00:00
pr27816.ll
pr33172.ll Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
pr40091.ll [TargetLowering] Fix propagation of undefs in zero extension ops (PR40091) 2018-12-19 13:37:59 +00:00
preferred-alignment.ll [AArch64][GlobalISel] Enable GlobalISel at -O0 by default 2018-01-02 16:30:47 +00:00
preferred-function-alignment.ll Fix additional cases of more that two dashes for options in tests. 2019-04-29 18:58:52 +00:00
prefixdata.ll
preserve_mostcc.ll
print-mrs-system-register.ll
prologue-epilogue-remarks.mir [PEI] Add basic opt-remarks support 2017-07-19 23:47:32 +00:00
pull-binop-through-shift.ll [DAGCombiner] visitShiftByConstant(): drop bogus signbit check 2019-05-17 15:52:58 +00:00
pull-conditional-binop-through-shift.ll [NFC][CodeGen] Add some more tests for pulling binops through shifts 2019-05-16 12:26:53 +00:00
ragreedy-csr.ll Codegen: Fixed perf branch_weights in couple of tests. NFC. 2019-04-15 09:30:31 +00:00
rbit.ll
read-pc.ll AArch64: Add support for reading pc using llvm.read_register. 2019-06-22 03:03:25 +00:00
readcyclecounter.ll
recp-fastmath.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
redundant-copy-elim-empty-mbb.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
reg-scavenge-frame.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
regcoal-physreg.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
regress-bitcast-formals.ll
regress-f128csel-flags.ll
regress-fp128-livein.ll
regress-tail-livereg.ll
regress-tblgen-chains.ll Replace "no-frame-pointer-*" function attributes with "frame-pointer" 2019-01-14 10:55:55 +00:00
regress-w29-reserved-with-fp.ll Replace "no-frame-pointer-*" function attributes with "frame-pointer" 2019-01-14 10:55:55 +00:00
reloc-specifiers.mir [AArch64] Emit the correct MCExpr relocations specifiers like VK_ABS_G0, etc 2019-01-10 04:59:44 +00:00
rem_crash.ll
remat-float0.ll
remat.ll [AArch64, ARM] Add support for Exynos M5 2019-03-22 18:42:14 +00:00
returnaddr.ll
reverse-csr-restore-seq.mir Describe stack-id as an enum 2019-06-17 09:13:29 +00:00
rm_redundant_cmp.ll
rotate-extract.ll [DAGCombiner] Bug 31275- Extract a shift from a constant mul or udiv if a rotate can be formed 2018-07-30 16:50:00 +00:00
rotate.ll
round-conv.ll
sadd_sat.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
sadd_sat_vec.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
sat-add.ll [DAG] isBitwiseNot / isConstOrConstSplat - add support for build vector undefs + truncation (PR41020) 2019-06-02 11:56:39 +00:00
sched-past-vector-ldst.ll
scheduledag-constreg.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
sdag-store-merging-bug.ll [AArch64] auto-generate complete test checks; NFC 2019-05-29 01:37:44 +00:00
sdivpow2.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
seh-finally.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
seh_funclet_x1.ll Fix the buildbot failure introduced by r351404 2019-01-17 20:24:14 +00:00
select_cc.ll [SelectionDAG] swap select_cc operands to enable folding 2018-11-09 11:09:40 +00:00
select_fmf.ll adding more fmf propagation for selects plus updated tests 2019-06-15 04:53:51 +00:00
selectcc-to-shiftand.ll [NFC][AArch64] Autogenerate bitfield-insert.ll, selectcc-to-shiftand.ll tests 2019-05-18 17:42:06 +00:00
selectiondag-order.ll [AArch64] Do 64-bit vector move of 0 and -1 by extracting from the 128-bit move 2018-10-25 14:56:48 +00:00
seqpaircopy.mir AArch64: implement copy for paired GPR registers. 2019-02-07 10:35:34 +00:00
seqpairspill.mir AArch64: Fix XSeqPairs/WSeqPairs problems 2018-10-04 17:02:53 +00:00
setcc-takes-i32.ll
setcc-type-mismatch.ll
shadow-call-stack.ll AArch64: Don't emit CFI for SCS register in nounwind functions. 2018-11-30 21:04:25 +00:00
shift-amount-mod.ll [DAGCombine][X86][AArch64][MIPS][LANAI] (C - x) - y -> C - (x + y) fold (PR41952) 2019-06-04 11:06:21 +00:00
shift-mod.ll [AArch64] Add patterns for zext/sext of shift amount. 2019-01-22 00:21:35 +00:00
shift_minsize.ll [SelectionDAG] Codesize: don't expand SHIFT to SHIFT_PARTS 2019-01-31 08:07:30 +00:00
shrink-constant-multiple-users.ll [AArch64] Add test for constant shrinking with multiple users (NFC). 2019-01-09 21:04:36 +00:00
shrink-wrap.ll
shrink-wrapping-vla.ll Add tests for shrink wrapping and VLAs 2018-04-18 13:37:12 +00:00
shuffle-mask-legal.ll [SelectionDAG] soften splat mask assert/unreachable (PR41535) 2019-04-19 15:31:11 +00:00
sibling-call.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
sign-return-address.ll [AArch64] - Return address signing dwarf support 2018-12-18 10:37:42 +00:00
signbit-shift.ll [DAGCombiner] transform sub-of-shifted-signbit to add 2018-07-30 22:21:37 +00:00
signed-truncation-check.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
simple-macho.ll
sincos-expansion.ll
sincospow-vector-expansion.ll [GlobalISel][AArch64] Add instruction selection support for G_FCOS and G_FSIN 2019-01-28 18:34:18 +00:00
sink-addsub-of-const.ll [DAGCombine][X86][AArch64][MIPS][LANAI] (C - x) - y -> C - (x + y) fold (PR41952) 2019-06-04 11:06:21 +00:00
sink-copy-for-shrink-wrap.ll [CodeGen] Add a new pass for PostRA sink 2018-03-22 20:06:47 +00:00
sitofp-fixed-legal.ll
special-reg.ll
speculation-hardening-dagisel.ll Introduce control flow speculation tracking pass for AArch64 2018-12-18 08:50:02 +00:00
speculation-hardening-loads.ll [SLH] AArch64: correctly pick temporary register to mask SP 2019-01-23 08:18:39 +00:00
speculation-hardening.ll [AArch64][GlobalISel] Optimize conditional branches followed by unconditional branches 2019-07-09 16:05:59 +00:00
speculation-hardening.mir [SLH][AArch64] Remove accidentally retained -debug-only line from test. 2019-01-23 09:10:12 +00:00
spill-fold.ll
spill-fold.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
spill-stack-realignment.mir Describe stack-id as an enum 2019-06-17 09:13:29 +00:00
spill-undef.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
sponentry.ll Fixed typos in tests: s/CEHCK/CHECK/ 2019-02-25 13:12:33 +00:00
sqrt-fastmath.ll [AArch64] add tests with sqrt estimate and ieee denorms; NFC 2018-02-01 17:57:45 +00:00
ssub_sat.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
ssub_sat_vec.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
stack-guard-remat-bitcast.ll Replace "no-frame-pointer-*" function attributes with "frame-pointer" 2019-01-14 10:55:55 +00:00
stack-id-pei-alloc.mir Describe stack-id as an enum 2019-06-17 09:13:29 +00:00
stack-id-stackslot-scavenging.mir Describe stack-id as an enum 2019-06-17 09:13:29 +00:00
stack-protector-target.ll [COFF, ARM64] Add support for MSVC buffer security check 2018-11-09 02:48:36 +00:00
stack_guard_remat.ll [GlobalISel] Add ISel support for @llvm.lifetime.start and @llvm.lifetime.end 2019-01-28 19:22:29 +00:00
stackguard-internal.ll [AArch64] Don't crash trying to resolve __stack_chk_guard. 2018-04-21 00:07:46 +00:00
stackmap-frame-setup.ll
stackmap-liveness.ll
store_merge_pair_offset.ll
strqro.ll [AArch64] Harden test cases 2018-02-26 23:19:25 +00:00
strqu.ll [AArch64] auto-generate complete test checks; NFC 2019-05-29 01:35:10 +00:00
sub-of-not.ll [Codegen][X86][AArch64][ARM][PowerPC] Inc-of-add vs sub-of-not (PR42457) 2019-07-03 09:41:35 +00:00
sub1.ll [TargetLowering] try to create -1 constant operand for math ops via demanded bits 2018-02-11 14:38:23 +00:00
subs-to-sub-opt.ll
swap-compare-operands.ll [AArch64] Swap comparison operands if that enables some folding. 2018-10-13 07:43:56 +00:00
swift-error.ll AArch64: support SwiftCC properly on AAPCS64 2017-09-22 04:31:44 +00:00
swift-return.ll RegAllocFast: Remove early selection loop, the spill calculation will report cost 0 anyway for free regs 2019-03-19 19:01:34 +00:00
swiftcc.ll
swifterror.ll [FastISel] Skip creating unnecessary vregs for arguments 2019-06-10 16:53:37 +00:00
swiftself-scavenger.ll
swiftself.ll [FastISel] Skip creating unnecessary vregs for arguments 2019-06-10 16:53:37 +00:00
switch-unreachable-default.ll Switch lowering: exploit unreachable fall-through when lowering case range cluster 2019-03-29 13:40:05 +00:00
tail-call-unused-zext.ll Rename ExpandISelPseudo->FinalizeISel, delay register reservation 2019-06-19 00:25:39 +00:00
tail-call.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
tailcall-ccmismatch.ll
tailcall-explicit-sret.ll Revert "AArch64: Omit callframe setup/destroy when not necessary" 2018-01-29 19:56:42 +00:00
tailcall-fastisel.ll [AArch64][GlobalISel] Enable GlobalISel at -O0 by default 2018-01-02 16:30:47 +00:00
tailcall-implicit-sret.ll [ARM][AArch64][DAG] Reenable post-legalize store merge 2017-12-06 15:30:13 +00:00
tailcall-mem-intrinsics.ll Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
tailcall-string-rvo.ll Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
tailcall_misched_graph.ll [CodeGen] Don't omit any redundant information in -debug output 2018-02-26 15:23:42 +00:00
taildup-cfi.ll [FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack 2019-06-13 13:56:19 +00:00
taildup-inst-dup-loc.mir [TailDuplicator] Fix copy instruction emitting into the wrong block. 2019-07-02 06:04:46 +00:00
tailmerging_in_mbp.ll [MBP] Move a latch block with conditional exit and multi predecessors to top of loop 2019-06-14 23:08:59 +00:00
tbi.ll [AArch64] Fix legality info passed to demanded bits for TBI opt. 2017-07-27 21:27:25 +00:00
tbz-tbnz.ll [AArch64] Teach getTestBitOperand to look through ANY_EXTENDS 2019-04-10 17:27:29 +00:00
tiny_model.ll [AArch64] Optimise load(adr address) to ldr address 2018-08-30 11:55:16 +00:00
tiny_supported.ll [AArch64] Add Tiny Code Model for AArch64 2018-08-22 11:31:39 +00:00
trunc-v1i64.ll
tst-br.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
uadd_sat.ll [AArch64] add tests for uaddsat/usubsat; NFC 2019-03-06 19:02:01 +00:00
uadd_sat_vec.ll [TargetLowering] improve the default expansion of uaddsat/usubsat 2019-03-17 14:57:40 +00:00
uaddo.ll [CGP] add special-cases to form unsigned add with overflow (PR40486) 2019-02-24 15:31:27 +00:00
umulo-128-legalisation-lowering.ll [SelectionDAG] Improve the legalisation lowering of UMULO. 2018-08-16 18:39:39 +00:00
unfold-masked-merge-scalar-constmask-innerouter.ll Extend hasStoreToStackSlot with list of FI accesses. 2018-09-03 09:15:58 +00:00
unfold-masked-merge-scalar-constmask-interleavedbits.ll Extend hasStoreToStackSlot with list of FI accesses. 2018-09-03 09:15:58 +00:00
unfold-masked-merge-scalar-constmask-interleavedbytehalves.ll Extend hasStoreToStackSlot with list of FI accesses. 2018-09-03 09:15:58 +00:00
unfold-masked-merge-scalar-constmask-lowhigh.ll Extend hasStoreToStackSlot with list of FI accesses. 2018-09-03 09:15:58 +00:00
unfold-masked-merge-scalar-variablemask.ll [DAGCombine] Fold (x & ~y) | y patterns 2019-03-17 15:45:38 +00:00
unfold-masked-merge-vector-variablemask-const.ll Revert r356996 "[DAG] Avoid smart constructor-based dangling nodes." 2019-03-27 19:54:41 +00:00
unfold-masked-merge-vector-variablemask.ll [DAGCombine][X86][AArch64] Masked merge unfolding: vector edition. 2018-05-21 21:41:02 +00:00
unreachable-emergency-spill-slot.mir [AArch64] Add test case for r329797 2018-04-11 13:37:25 +00:00
urem-seteq-optsize.ll [CodeGen] [SelectionDAG] More efficient code for X % C == 0 (UREM case) (try 3) 2019-06-27 21:52:10 +00:00
urem-seteq-vec-nonsplat.ll [NFC][Codegen] Revisit test coverage for X % C == 0 fold once more (add tests with '1' divisor) 2019-06-28 17:26:28 +00:00
urem-seteq-vec-splat.ll [NFC][Codegen] Revisit test coverage for X % C == 0 fold once more (add tests with '1' divisor) 2019-06-28 17:26:28 +00:00
urem-seteq.ll [NFC][Codegen] Revisit test coverage for X % C == 0 fold 2019-06-28 11:36:34 +00:00
usub_sat.ll [AArch64] add tests for uaddsat/usubsat; NFC 2019-03-06 19:02:01 +00:00
usub_sat_vec.ll [AArch64] add tests for uaddsat/usubsat; NFC 2019-03-06 19:02:01 +00:00
v3f-to-int.ll [AArch64] Check for simple type in FPToUInt 2019-06-03 08:49:17 +00:00
vararg-tallcall.ll [AArch64] Preserve X8 for thunks ending in variadic musttail calls 2019-05-24 01:27:20 +00:00
vcvt-oversize.ll [LegalizeVectorTypes][X86][ARM][AArch64][PowerPC] Don't use SplitVecOp_TruncateHelper for FP_TO_SINT/UINT. 2018-11-26 21:12:39 +00:00
vec-libcalls.ll Extend hasStoreToStackSlot with list of FI accesses. 2018-09-03 09:15:58 +00:00
vec_cttz.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
vec_uaddo.ll [LegalizeTypes][AArch64][X86] Make type legalization of vector (S/U)ADD/SUB/MULO follow getSetCCResultType for the overflow bits. Make UnrollVectorOverflowOp properly convert from scalar boolean contents to vector boolean contents 2019-02-24 19:23:36 +00:00
vec_umulo.ll [SDAG] Recursively legalize both vector mulo results 2019-05-10 20:42:48 +00:00
vecreduce-add-legalization.ll Improve reduction intrinsics by overloading result value. 2019-06-13 09:37:38 +00:00
vecreduce-and-legalization.ll Improve reduction intrinsics by overloading result value. 2019-06-13 09:37:38 +00:00
vecreduce-bool.ll Improve reduction intrinsics by overloading result value. 2019-06-13 09:37:38 +00:00
vecreduce-fadd-legalization.ll Change semantics of fadd/fmul vector reductions. 2019-06-11 08:22:10 +00:00
vecreduce-fadd.ll Change semantics of fadd/fmul vector reductions. 2019-06-11 08:22:10 +00:00
vecreduce-fmax-legalization.ll Improve reduction intrinsics by overloading result value. 2019-06-13 09:37:38 +00:00
vecreduce-propagate-sd-flags.ll Improve reduction intrinsics by overloading result value. 2019-06-13 09:37:38 +00:00
vecreduce-umax-legalization.ll Improve reduction intrinsics by overloading result value. 2019-06-13 09:37:38 +00:00
vector-fcopysign.ll [AArch64][TableGen] Skip tied result operands for InstAlias 2017-11-20 14:36:40 +00:00
vector_merge_dep_check.ll
vector_splat-const-shift-of-constmasked.ll [NFC][CodeGen][X86][AArch64] Add and-const-mask + const-shift pattern tests 2019-05-14 20:17:04 +00:00
win-alloca-no-stack-probe.ll [ARM, AArch64] Check the no-stack-arg-probe attribute for dynamic stack probes 2018-03-19 20:06:50 +00:00
win-alloca.ll [AArch64] Fix use of a regex in the win-alloca.ll test. NFC. 2018-03-09 09:45:37 +00:00
win-tls.ll [AArch64] Fold adds with tprel_lo12_nc and secrel_lo12 into a following ldr/str 2018-03-12 18:47:43 +00:00
win64-jumptable.ll Re-commit r357452 (take 3): "SimplifyCFG SinkCommonCodeFromPredecessors: Also sink function calls without used results (PR41259)" 2019-06-17 07:47:28 +00:00
win64-nocfi.ll [AArch64] only indicate CFI on Windows if we emitted CFI 2019-05-15 21:23:41 +00:00
win64_vararg.ll [DAGCombiner] If a TokenFactor would be merged into its user, consider the user later. 2019-03-13 17:07:09 +00:00
win_cst_pool.ll [AArch64] Optimize floating point materialization 2019-03-18 18:45:57 +00:00
windows-SEH-support.ll AArch64: support funclets in fastcall and swift_call 2018-12-05 07:09:20 +00:00
windows-trap.ll [AArch64] [Windows] Trap after noreturn calls. 2018-11-07 21:31:14 +00:00
windows-trap1.ll [COFF, ARM64] Fix encoding of debugtrap for Windows 2019-06-21 23:38:05 +00:00
wineh-frame0.mir [ARM64] [Windows] Exception handling support in frame lowering 2018-10-31 09:27:01 +00:00
wineh-frame1.mir [ARM64] [Windows] Exception handling support in frame lowering 2018-10-31 09:27:01 +00:00
wineh-frame2.mir [ARM64] [Windows] Exception handling support in frame lowering 2018-10-31 09:27:01 +00:00
wineh-frame3.mir [ARM64] [Windows] Exception handling support in frame lowering 2018-10-31 09:27:01 +00:00
wineh-frame4.mir [ARM64] [Windows] Exception handling support in frame lowering 2018-10-31 09:27:01 +00:00
wineh-frame5.mir Describe stack-id as an enum 2019-06-17 09:13:29 +00:00
wineh-frame6.mir Describe stack-id as an enum 2019-06-17 09:13:29 +00:00
wineh-frame7.mir Describe stack-id as an enum 2019-06-17 09:13:29 +00:00
wineh-frame8.mir Describe stack-id as an enum 2019-06-17 09:13:29 +00:00
wineh-mingw.ll [AArch64] Default to SEH exception handling on MinGW 2019-05-06 21:18:15 +00:00
wineh-try-catch-cbz.ll [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
wineh-try-catch-nobase.ll [ARM64] [Windows] Handle funclets 2018-11-09 23:33:30 +00:00
wineh-try-catch-realign.ll [ARM64] [Windows] Handle funclets 2018-11-09 23:33:30 +00:00
wineh-try-catch-vla.ll [ARM64] [Windows] Handle funclets 2018-11-09 23:33:30 +00:00
wineh-try-catch.ll [llvm-readobj] Change -long-option to --long-option in tests. NFC 2019-05-01 05:27:20 +00:00
wineh1.mir Describe stack-id as an enum 2019-06-17 09:13:29 +00:00
wineh2.mir Describe stack-id as an enum 2019-06-17 09:13:29 +00:00
wineh3.mir Describe stack-id as an enum 2019-06-17 09:13:29 +00:00
wineh4.mir Describe stack-id as an enum 2019-06-17 09:13:29 +00:00
wineh5.mir Describe stack-id as an enum 2019-06-17 09:13:29 +00:00
wineh6.mir Describe stack-id as an enum 2019-06-17 09:13:29 +00:00
wineh7.mir Describe stack-id as an enum 2019-06-17 09:13:29 +00:00
wineh8.mir Describe stack-id as an enum 2019-06-17 09:13:29 +00:00
wineh_shrinkwrap.mir Describe stack-id as an enum 2019-06-17 09:13:29 +00:00
wrong_debug_loc_after_regalloc.ll [DebugInfo] Incorrect debug info record generated for loop counter. 2019-06-06 21:19:39 +00:00
xbfiz.ll
xor.ll [DAGCombine][X86][AArch64][AMDGPU] (x - y) + -1 -> add (xor y, -1), x fold. Try 3 2019-05-30 20:37:29 +00:00
xray-attribute-instrumentation.ll [XRay][CodeGen] Use PIC-friendly code in XRay sleds and remove synthetic references in .text 2017-09-04 05:34:58 +00:00
xray-tail-call-sled.ll [XRay][CodeGen] Use PIC-friendly code in XRay sleds and remove synthetic references in .text 2017-09-04 05:34:58 +00:00
zero-reg.ll
zext-logic-shift-load.ll [DAGCombiner] Fold (zext (and/or/xor (shl/shr (load x), cst), cst)) 2018-04-07 23:36:10 +00:00