forked from OSchip/llvm-project
225 lines
6.3 KiB
C++
225 lines
6.3 KiB
C++
//===-- AMDGPUAnnotateKernelFeaturesPass.cpp ------------------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file This pass adds target attributes to functions which use intrinsics
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/// which will impact calling convention lowering.
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//
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//===----------------------------------------------------------------------===//
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#include "AMDGPU.h"
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#include "llvm/ADT/Triple.h"
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#include "llvm/IR/Constants.h"
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#include "llvm/IR/Instructions.h"
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#include "llvm/IR/Module.h"
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#define DEBUG_TYPE "amdgpu-annotate-kernel-features"
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using namespace llvm;
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namespace {
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class AMDGPUAnnotateKernelFeatures : public ModulePass {
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private:
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static bool hasAddrSpaceCast(const Function &F);
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void addAttrToCallers(Function *Intrin, StringRef AttrName);
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bool addAttrsForIntrinsics(Module &M, ArrayRef<StringRef[2]>);
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public:
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static char ID;
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AMDGPUAnnotateKernelFeatures() : ModulePass(ID) { }
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bool runOnModule(Module &M) override;
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StringRef getPassName() const override {
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return "AMDGPU Annotate Kernel Features";
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}
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void getAnalysisUsage(AnalysisUsage &AU) const override {
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AU.setPreservesAll();
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ModulePass::getAnalysisUsage(AU);
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}
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static bool visitConstantExpr(const ConstantExpr *CE);
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static bool visitConstantExprsRecursively(
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const Constant *EntryC,
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SmallPtrSet<const Constant *, 8> &ConstantExprVisited);
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};
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}
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char AMDGPUAnnotateKernelFeatures::ID = 0;
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char &llvm::AMDGPUAnnotateKernelFeaturesID = AMDGPUAnnotateKernelFeatures::ID;
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INITIALIZE_PASS(AMDGPUAnnotateKernelFeatures, DEBUG_TYPE,
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"Add AMDGPU function attributes", false, false)
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// The queue ptr is only needed when casting to flat, not from it.
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static bool castRequiresQueuePtr(unsigned SrcAS) {
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return SrcAS == AMDGPUAS::LOCAL_ADDRESS || SrcAS == AMDGPUAS::PRIVATE_ADDRESS;
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}
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static bool castRequiresQueuePtr(const AddrSpaceCastInst *ASC) {
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return castRequiresQueuePtr(ASC->getSrcAddressSpace());
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}
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bool AMDGPUAnnotateKernelFeatures::visitConstantExpr(const ConstantExpr *CE) {
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if (CE->getOpcode() == Instruction::AddrSpaceCast) {
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unsigned SrcAS = CE->getOperand(0)->getType()->getPointerAddressSpace();
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return castRequiresQueuePtr(SrcAS);
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}
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return false;
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}
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bool AMDGPUAnnotateKernelFeatures::visitConstantExprsRecursively(
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const Constant *EntryC,
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SmallPtrSet<const Constant *, 8> &ConstantExprVisited) {
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if (!ConstantExprVisited.insert(EntryC).second)
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return false;
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SmallVector<const Constant *, 16> Stack;
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Stack.push_back(EntryC);
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while (!Stack.empty()) {
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const Constant *C = Stack.pop_back_val();
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// Check this constant expression.
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if (const auto *CE = dyn_cast<ConstantExpr>(C)) {
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if (visitConstantExpr(CE))
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return true;
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}
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// Visit all sub-expressions.
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for (const Use &U : C->operands()) {
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const auto *OpC = dyn_cast<Constant>(U);
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if (!OpC)
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continue;
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if (!ConstantExprVisited.insert(OpC).second)
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continue;
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Stack.push_back(OpC);
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}
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}
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return false;
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}
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// Return true if an addrspacecast is used that requires the queue ptr.
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bool AMDGPUAnnotateKernelFeatures::hasAddrSpaceCast(const Function &F) {
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SmallPtrSet<const Constant *, 8> ConstantExprVisited;
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for (const BasicBlock &BB : F) {
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for (const Instruction &I : BB) {
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if (const AddrSpaceCastInst *ASC = dyn_cast<AddrSpaceCastInst>(&I)) {
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if (castRequiresQueuePtr(ASC))
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return true;
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}
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for (const Use &U : I.operands()) {
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const auto *OpC = dyn_cast<Constant>(U);
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if (!OpC)
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continue;
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if (visitConstantExprsRecursively(OpC, ConstantExprVisited))
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return true;
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}
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}
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}
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return false;
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}
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void AMDGPUAnnotateKernelFeatures::addAttrToCallers(Function *Intrin,
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StringRef AttrName) {
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SmallPtrSet<Function *, 4> SeenFuncs;
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for (User *U : Intrin->users()) {
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// CallInst is the only valid user for an intrinsic.
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CallInst *CI = cast<CallInst>(U);
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Function *CallingFunction = CI->getParent()->getParent();
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if (SeenFuncs.insert(CallingFunction).second)
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CallingFunction->addFnAttr(AttrName);
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}
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}
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bool AMDGPUAnnotateKernelFeatures::addAttrsForIntrinsics(
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Module &M,
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ArrayRef<StringRef[2]> IntrinsicToAttr) {
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bool Changed = false;
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for (const StringRef *Arr : IntrinsicToAttr) {
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if (Function *Fn = M.getFunction(Arr[0])) {
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addAttrToCallers(Fn, Arr[1]);
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Changed = true;
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}
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}
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return Changed;
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}
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bool AMDGPUAnnotateKernelFeatures::runOnModule(Module &M) {
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Triple TT(M.getTargetTriple());
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static const StringRef IntrinsicToAttr[][2] = {
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// .x omitted
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{ "llvm.amdgcn.workitem.id.y", "amdgpu-work-item-id-y" },
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{ "llvm.amdgcn.workitem.id.z", "amdgpu-work-item-id-z" },
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{ "llvm.amdgcn.workgroup.id.y", "amdgpu-work-group-id-y" },
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{ "llvm.amdgcn.workgroup.id.z", "amdgpu-work-group-id-z" },
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{ "llvm.r600.read.tgid.y", "amdgpu-work-group-id-y" },
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{ "llvm.r600.read.tgid.z", "amdgpu-work-group-id-z" },
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// .x omitted
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{ "llvm.r600.read.tidig.y", "amdgpu-work-item-id-y" },
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{ "llvm.r600.read.tidig.z", "amdgpu-work-item-id-z" }
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};
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static const StringRef HSAIntrinsicToAttr[][2] = {
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{ "llvm.amdgcn.dispatch.ptr", "amdgpu-dispatch-ptr" },
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{ "llvm.amdgcn.queue.ptr", "amdgpu-queue-ptr" },
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{ "llvm.amdgcn.dispatch.id", "amdgpu-dispatch-id" },
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{ "llvm.trap", "amdgpu-queue-ptr" },
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{ "llvm.debugtrap", "amdgpu-queue-ptr" }
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};
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// TODO: We should not add the attributes if the known compile time workgroup
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// size is 1 for y/z.
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// TODO: Intrinsics that require queue ptr.
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// We do not need to note the x workitem or workgroup id because they are
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// always initialized.
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bool Changed = addAttrsForIntrinsics(M, IntrinsicToAttr);
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if (TT.getOS() == Triple::AMDHSA || TT.getOS() == Triple::Mesa3D) {
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Changed |= addAttrsForIntrinsics(M, HSAIntrinsicToAttr);
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for (Function &F : M) {
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if (F.hasFnAttribute("amdgpu-queue-ptr"))
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continue;
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if (hasAddrSpaceCast(F))
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F.addFnAttr("amdgpu-queue-ptr");
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}
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}
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return Changed;
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}
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ModulePass *llvm::createAMDGPUAnnotateKernelFeaturesPass() {
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return new AMDGPUAnnotateKernelFeatures();
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}
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