llvm-project/llvm/test/Transforms/LoopVectorize/AArch64
Matthew Simpson 1a4d5c9860 [LV] Make test case more robust
This test case depends on the loop being vectorized without forcing the
vectorization factor. If the profitability ever changes in the future (due to
cost model improvements), the test may no longer work as intended. Instead of
checking the resulting IR, we should just check the instruction costs. The
costs will be computed regardless if vectorization is profitable.

llvm-svn: 299545
2017-04-05 14:34:13 +00:00
..
aarch64-predication.ll [LV] Make test case more robust 2017-04-05 14:34:13 +00:00
aarch64-unroll.ll
arbitrary-induction-step.ll [LV] Unify vector and scalar maps 2016-08-24 18:23:17 +00:00
arm64-unroll.ll
backedge-overflow.ll Re-commit [SCEV] Introduce a guarded backedge taken count and use it in LAA and LV 2016-04-08 14:29:09 +00:00
deterministic-type-shrinkage.ll
first-order-recurrence.ll [LV] Select legal insert point when fixing first-order recurrences 2017-03-08 18:18:20 +00:00
gather-cost.ll Second attempt at r285517. 2016-10-31 13:17:31 +00:00
induction-trunc.ll Reapply "[LV] Extend trunc optimization to all IVs with constant integer steps" 2017-02-14 16:28:32 +00:00
interleaved-vs-scalar.ll [Loop Vectorizer] Cost-based decision for vectorization form of memory instruction. 2017-02-08 19:25:23 +00:00
interleaved_cost.ll [TargetTransformInfo] getIntrinsicInstrCost() scalarization estimation improved 2017-03-14 06:35:36 +00:00
lit.local.cfg
loop-vectorization-factors.ll Revert "[VectorUtils] Query number of sign bits to allow more truncations" 2016-05-10 12:27:23 +00:00
max-vf-for-interleaved.ll [LAA] Rename forwarding conflict detection option (NFC) 2016-05-16 17:00:56 +00:00
pr31900.ll [LoopVectorize] Added address space check when analysing interleaved accesses 2017-02-22 18:37:36 +00:00
predication_costs.ll Reapply "[LV] Enable vectorization of loops with conditional stores by default" 2016-12-16 19:12:02 +00:00
reduction-small-size.ll
sdiv-pow2.ll
smallest-and-widest-types.ll [LV] Considier non-consecutive but vectorizable accesses for VF selection 2017-03-02 13:55:05 +00:00
type-shrinkage-insertelt.ll