forked from OSchip/llvm-project
40 lines
1.2 KiB
LLVM
40 lines
1.2 KiB
LLVM
; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
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define <2 x i32> @vrecpei32(<2 x i32>* %A) nounwind {
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;CHECK: vrecpei32:
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;CHECK: vrecpe.u32
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%tmp1 = load <2 x i32>* %A
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%tmp2 = call <2 x i32> @llvm.arm.neon.vrecpe.v2i32(<2 x i32> %tmp1)
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ret <2 x i32> %tmp2
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}
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define <4 x i32> @vrecpeQi32(<4 x i32>* %A) nounwind {
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;CHECK: vrecpeQi32:
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;CHECK: vrecpe.u32
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%tmp1 = load <4 x i32>* %A
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%tmp2 = call <4 x i32> @llvm.arm.neon.vrecpe.v4i32(<4 x i32> %tmp1)
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ret <4 x i32> %tmp2
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}
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define <2 x float> @vrecpef32(<2 x float>* %A) nounwind {
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;CHECK: vrecpef32:
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;CHECK: vrecpe.f32
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%tmp1 = load <2 x float>* %A
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%tmp2 = call <2 x float> @llvm.arm.neon.vrecpe.v2f32(<2 x float> %tmp1)
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ret <2 x float> %tmp2
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}
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define <4 x float> @vrecpeQf32(<4 x float>* %A) nounwind {
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;CHECK: vrecpeQf32:
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;CHECK: vrecpe.f32
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%tmp1 = load <4 x float>* %A
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%tmp2 = call <4 x float> @llvm.arm.neon.vrecpe.v4f32(<4 x float> %tmp1)
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ret <4 x float> %tmp2
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}
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declare <2 x i32> @llvm.arm.neon.vrecpe.v2i32(<2 x i32>) nounwind readnone
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declare <4 x i32> @llvm.arm.neon.vrecpe.v4i32(<4 x i32>) nounwind readnone
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declare <2 x float> @llvm.arm.neon.vrecpe.v2f32(<2 x float>) nounwind readnone
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declare <4 x float> @llvm.arm.neon.vrecpe.v4f32(<4 x float>) nounwind readnone
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