forked from OSchip/llvm-project
322 lines
9.0 KiB
LLVM
322 lines
9.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=arm %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-ARM
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; RUN: llc -mtriple=thumb-eabi %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-T
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; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-T2
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; Check for clipping against 0 that should result in bic
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;
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; Base tests with different bit widths
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; x < 0 ? 0 : x
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; 32-bit base test
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define i32 @sat0_base_32bit(i32 %x) #0 {
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; CHECK-ARM-LABEL: sat0_base_32bit:
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; CHECK-ARM: @ %bb.0: @ %entry
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; CHECK-ARM-NEXT: bic r0, r0, r0, asr #31
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; CHECK-ARM-NEXT: mov pc, lr
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;
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; CHECK-T-LABEL: sat0_base_32bit:
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; CHECK-T: @ %bb.0: @ %entry
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; CHECK-T-NEXT: asrs r1, r0, #31
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; CHECK-T-NEXT: bics r0, r1
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; CHECK-T-NEXT: bx lr
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;
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; CHECK-T2-LABEL: sat0_base_32bit:
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; CHECK-T2: @ %bb.0: @ %entry
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; CHECK-T2-NEXT: bic.w r0, r0, r0, asr #31
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; CHECK-T2-NEXT: bx lr
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entry:
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%cmpLow = icmp slt i32 %x, 0
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%saturateLow = select i1 %cmpLow, i32 0, i32 %x
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ret i32 %saturateLow
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}
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; x < 0 ? 0 : x
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; 16-bit base test
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define i16 @sat0_base_16bit(i16 %x) #0 {
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; CHECK-ARM-LABEL: sat0_base_16bit:
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; CHECK-ARM: @ %bb.0: @ %entry
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; CHECK-ARM-NEXT: lsl r1, r0, #16
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; CHECK-ARM-NEXT: asr r1, r1, #16
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; CHECK-ARM-NEXT: cmp r1, #0
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; CHECK-ARM-NEXT: movmi r0, #0
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; CHECK-ARM-NEXT: mov pc, lr
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;
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; CHECK-T-LABEL: sat0_base_16bit:
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; CHECK-T: @ %bb.0: @ %entry
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; CHECK-T-NEXT: lsls r1, r0, #16
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; CHECK-T-NEXT: asrs r1, r1, #16
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; CHECK-T-NEXT: bpl .LBB1_2
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; CHECK-T-NEXT: @ %bb.1:
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; CHECK-T-NEXT: movs r0, #0
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; CHECK-T-NEXT: .LBB1_2: @ %entry
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; CHECK-T-NEXT: bx lr
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;
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; CHECK-T2-LABEL: sat0_base_16bit:
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; CHECK-T2: @ %bb.0: @ %entry
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; CHECK-T2-NEXT: sxth r1, r0
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; CHECK-T2-NEXT: cmp r1, #0
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; CHECK-T2-NEXT: it mi
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; CHECK-T2-NEXT: movmi r0, #0
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; CHECK-T2-NEXT: bx lr
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entry:
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%cmpLow = icmp slt i16 %x, 0
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%saturateLow = select i1 %cmpLow, i16 0, i16 %x
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ret i16 %saturateLow
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}
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; x < 0 ? 0 : x
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; 8-bit base test
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define i8 @sat0_base_8bit(i8 %x) #0 {
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; CHECK-ARM-LABEL: sat0_base_8bit:
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; CHECK-ARM: @ %bb.0: @ %entry
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; CHECK-ARM-NEXT: lsl r1, r0, #24
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; CHECK-ARM-NEXT: asr r1, r1, #24
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; CHECK-ARM-NEXT: cmp r1, #0
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; CHECK-ARM-NEXT: movmi r0, #0
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; CHECK-ARM-NEXT: mov pc, lr
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;
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; CHECK-T-LABEL: sat0_base_8bit:
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; CHECK-T: @ %bb.0: @ %entry
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; CHECK-T-NEXT: lsls r1, r0, #24
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; CHECK-T-NEXT: asrs r1, r1, #24
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; CHECK-T-NEXT: bpl .LBB2_2
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; CHECK-T-NEXT: @ %bb.1:
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; CHECK-T-NEXT: movs r0, #0
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; CHECK-T-NEXT: .LBB2_2: @ %entry
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; CHECK-T-NEXT: bx lr
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;
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; CHECK-T2-LABEL: sat0_base_8bit:
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; CHECK-T2: @ %bb.0: @ %entry
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; CHECK-T2-NEXT: sxtb r1, r0
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; CHECK-T2-NEXT: cmp r1, #0
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; CHECK-T2-NEXT: it mi
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; CHECK-T2-NEXT: movmi r0, #0
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; CHECK-T2-NEXT: bx lr
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entry:
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%cmpLow = icmp slt i8 %x, 0
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%saturateLow = select i1 %cmpLow, i8 0, i8 %x
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ret i8 %saturateLow
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}
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; Test where the conditional is formed in a different way
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; x > 0 ? x : 0
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define i32 @sat0_lower_1(i32 %x) #0 {
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; CHECK-ARM-LABEL: sat0_lower_1:
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; CHECK-ARM: @ %bb.0: @ %entry
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; CHECK-ARM-NEXT: bic r0, r0, r0, asr #31
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; CHECK-ARM-NEXT: mov pc, lr
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;
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; CHECK-T-LABEL: sat0_lower_1:
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; CHECK-T: @ %bb.0: @ %entry
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; CHECK-T-NEXT: asrs r1, r0, #31
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; CHECK-T-NEXT: bics r0, r1
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; CHECK-T-NEXT: bx lr
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;
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; CHECK-T2-LABEL: sat0_lower_1:
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; CHECK-T2: @ %bb.0: @ %entry
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; CHECK-T2-NEXT: bic.w r0, r0, r0, asr #31
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; CHECK-T2-NEXT: bx lr
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entry:
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%cmpGt = icmp sgt i32 %x, 0
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%saturateLow = select i1 %cmpGt, i32 %x, i32 0
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ret i32 %saturateLow
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}
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; Check for clipping against -1 that should result in orr
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;
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; Base tests with different bit widths
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;
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; x < -1 ? -1 : x
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; 32-bit base test
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define i32 @sat1_base_32bit(i32 %x) #0 {
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; CHECK-ARM-LABEL: sat1_base_32bit:
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; CHECK-ARM: @ %bb.0: @ %entry
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; CHECK-ARM-NEXT: orr r0, r0, r0, asr #31
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; CHECK-ARM-NEXT: mov pc, lr
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;
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; CHECK-T-LABEL: sat1_base_32bit:
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; CHECK-T: @ %bb.0: @ %entry
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; CHECK-T-NEXT: asrs r1, r0, #31
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; CHECK-T-NEXT: orrs r0, r1
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; CHECK-T-NEXT: bx lr
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;
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; CHECK-T2-LABEL: sat1_base_32bit:
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; CHECK-T2: @ %bb.0: @ %entry
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; CHECK-T2-NEXT: orr.w r0, r0, r0, asr #31
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; CHECK-T2-NEXT: bx lr
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entry:
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%cmpLow = icmp slt i32 %x, -1
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%saturateLow = select i1 %cmpLow, i32 -1, i32 %x
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ret i32 %saturateLow
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}
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; x < -1 ? -1 : x
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; 16-bit base test
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define i16 @sat1_base_16bit(i16 %x) #0 {
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; CHECK-ARM-LABEL: sat1_base_16bit:
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; CHECK-ARM: @ %bb.0: @ %entry
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; CHECK-ARM-NEXT: lsl r1, r0, #16
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; CHECK-ARM-NEXT: asr r1, r1, #16
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; CHECK-ARM-NEXT: cmn r1, #1
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; CHECK-ARM-NEXT: mvnlt r0, #0
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; CHECK-ARM-NEXT: mov pc, lr
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;
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; CHECK-T-LABEL: sat1_base_16bit:
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; CHECK-T: @ %bb.0: @ %entry
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; CHECK-T-NEXT: movs r1, #0
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; CHECK-T-NEXT: mvns r1, r1
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; CHECK-T-NEXT: lsls r2, r0, #16
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; CHECK-T-NEXT: asrs r2, r2, #16
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; CHECK-T-NEXT: cmp r2, r1
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; CHECK-T-NEXT: blt .LBB5_2
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; CHECK-T-NEXT: @ %bb.1: @ %entry
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; CHECK-T-NEXT: movs r1, r0
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; CHECK-T-NEXT: .LBB5_2: @ %entry
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; CHECK-T-NEXT: movs r0, r1
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; CHECK-T-NEXT: bx lr
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;
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; CHECK-T2-LABEL: sat1_base_16bit:
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; CHECK-T2: @ %bb.0: @ %entry
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; CHECK-T2-NEXT: sxth r1, r0
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; CHECK-T2-NEXT: cmp.w r1, #-1
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; CHECK-T2-NEXT: it lt
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; CHECK-T2-NEXT: movlt.w r0, #-1
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; CHECK-T2-NEXT: bx lr
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entry:
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%cmpLow = icmp slt i16 %x, -1
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%saturateLow = select i1 %cmpLow, i16 -1, i16 %x
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ret i16 %saturateLow
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}
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; x < -1 ? -1 : x
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; 8-bit base test
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define i8 @sat1_base_8bit(i8 %x) #0 {
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; CHECK-ARM-LABEL: sat1_base_8bit:
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; CHECK-ARM: @ %bb.0: @ %entry
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; CHECK-ARM-NEXT: lsl r1, r0, #24
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; CHECK-ARM-NEXT: asr r1, r1, #24
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; CHECK-ARM-NEXT: cmn r1, #1
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; CHECK-ARM-NEXT: mvnlt r0, #0
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; CHECK-ARM-NEXT: mov pc, lr
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;
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; CHECK-T-LABEL: sat1_base_8bit:
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; CHECK-T: @ %bb.0: @ %entry
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; CHECK-T-NEXT: movs r1, #0
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; CHECK-T-NEXT: mvns r1, r1
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; CHECK-T-NEXT: lsls r2, r0, #24
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; CHECK-T-NEXT: asrs r2, r2, #24
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; CHECK-T-NEXT: cmp r2, r1
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; CHECK-T-NEXT: blt .LBB6_2
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; CHECK-T-NEXT: @ %bb.1: @ %entry
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; CHECK-T-NEXT: movs r1, r0
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; CHECK-T-NEXT: .LBB6_2: @ %entry
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; CHECK-T-NEXT: movs r0, r1
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; CHECK-T-NEXT: bx lr
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;
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; CHECK-T2-LABEL: sat1_base_8bit:
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; CHECK-T2: @ %bb.0: @ %entry
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; CHECK-T2-NEXT: sxtb r1, r0
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; CHECK-T2-NEXT: cmp.w r1, #-1
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; CHECK-T2-NEXT: it lt
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; CHECK-T2-NEXT: movlt.w r0, #-1
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; CHECK-T2-NEXT: bx lr
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entry:
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%cmpLow = icmp slt i8 %x, -1
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%saturateLow = select i1 %cmpLow, i8 -1, i8 %x
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ret i8 %saturateLow
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}
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; Test where the conditional is formed in a different way
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; x > -1 ? x : -1
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define i32 @sat1_lower_1(i32 %x) #0 {
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; CHECK-ARM-LABEL: sat1_lower_1:
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; CHECK-ARM: @ %bb.0: @ %entry
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; CHECK-ARM-NEXT: orr r0, r0, r0, asr #31
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; CHECK-ARM-NEXT: mov pc, lr
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;
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; CHECK-T-LABEL: sat1_lower_1:
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; CHECK-T: @ %bb.0: @ %entry
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; CHECK-T-NEXT: asrs r1, r0, #31
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; CHECK-T-NEXT: orrs r0, r1
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; CHECK-T-NEXT: bx lr
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;
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; CHECK-T2-LABEL: sat1_lower_1:
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; CHECK-T2: @ %bb.0: @ %entry
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; CHECK-T2-NEXT: orr.w r0, r0, r0, asr #31
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; CHECK-T2-NEXT: bx lr
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entry:
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%cmpGt = icmp sgt i32 %x, -1
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%saturateLow = select i1 %cmpGt, i32 %x, i32 -1
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ret i32 %saturateLow
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}
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; The following tests for patterns that should not transform into bitops
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; but that are similar enough that could confuse the selector.
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; x < 0 ? 0 : y where x and y does not properly match
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define i32 @no_sat0_incorrect_variable(i32 %x, i32 %y) #0 {
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; CHECK-ARM-LABEL: no_sat0_incorrect_variable:
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; CHECK-ARM: @ %bb.0: @ %entry
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; CHECK-ARM-NEXT: cmp r0, #0
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; CHECK-ARM-NEXT: movmi r1, #0
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; CHECK-ARM-NEXT: mov r0, r1
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; CHECK-ARM-NEXT: mov pc, lr
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;
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; CHECK-T-LABEL: no_sat0_incorrect_variable:
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; CHECK-T: @ %bb.0: @ %entry
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; CHECK-T-NEXT: cmp r0, #0
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; CHECK-T-NEXT: bpl .LBB8_2
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; CHECK-T-NEXT: @ %bb.1:
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; CHECK-T-NEXT: movs r1, #0
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; CHECK-T-NEXT: .LBB8_2: @ %entry
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; CHECK-T-NEXT: movs r0, r1
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; CHECK-T-NEXT: bx lr
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;
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; CHECK-T2-LABEL: no_sat0_incorrect_variable:
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; CHECK-T2: @ %bb.0: @ %entry
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; CHECK-T2-NEXT: cmp r0, #0
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; CHECK-T2-NEXT: it mi
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; CHECK-T2-NEXT: movmi r1, #0
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; CHECK-T2-NEXT: mov r0, r1
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; CHECK-T2-NEXT: bx lr
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entry:
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%cmpLow = icmp slt i32 %x, 0
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%saturateLow = select i1 %cmpLow, i32 0, i32 %y
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ret i32 %saturateLow
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}
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; x < 0 ? -1 : x
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define i32 @no_sat0_incorrect_constant(i32 %x) {
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; CHECK-ARM-LABEL: no_sat0_incorrect_constant:
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; CHECK-ARM: @ %bb.0: @ %entry
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; CHECK-ARM-NEXT: cmp r0, #0
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; CHECK-ARM-NEXT: mvnmi r0, #0
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; CHECK-ARM-NEXT: mov pc, lr
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;
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; CHECK-T-LABEL: no_sat0_incorrect_constant:
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; CHECK-T: @ %bb.0: @ %entry
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; CHECK-T-NEXT: cmp r0, #0
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; CHECK-T-NEXT: bpl .LBB9_2
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; CHECK-T-NEXT: @ %bb.1:
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; CHECK-T-NEXT: movs r0, #0
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; CHECK-T-NEXT: mvns r0, r0
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; CHECK-T-NEXT: .LBB9_2: @ %entry
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; CHECK-T-NEXT: bx lr
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;
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; CHECK-T2-LABEL: no_sat0_incorrect_constant:
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; CHECK-T2: @ %bb.0: @ %entry
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; CHECK-T2-NEXT: cmp r0, #0
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; CHECK-T2-NEXT: it mi
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; CHECK-T2-NEXT: movmi.w r0, #-1
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; CHECK-T2-NEXT: bx lr
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entry:
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%cmpLow = icmp slt i32 %x, 0
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%saturateLow = select i1 %cmpLow, i32 -1, i32 %x
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ret i32 %saturateLow
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}
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