forked from OSchip/llvm-project
90 lines
3.0 KiB
C++
90 lines
3.0 KiB
C++
//===-- AArch64MCTargetDesc.h - AArch64 Target Descriptions -----*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file provides AArch64 specific target descriptions.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64MCTARGETDESC_H
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#define LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64MCTARGETDESC_H
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#include "llvm/Support/DataTypes.h"
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#include <memory>
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namespace llvm {
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class formatted_raw_ostream;
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class MCAsmBackend;
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class MCCodeEmitter;
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class MCContext;
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class MCInstrInfo;
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class MCInstPrinter;
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class MCRegisterInfo;
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class MCObjectTargetWriter;
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class MCStreamer;
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class MCSubtargetInfo;
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class MCTargetOptions;
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class MCTargetStreamer;
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class StringRef;
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class Target;
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class Triple;
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class raw_ostream;
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class raw_pwrite_stream;
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MCCodeEmitter *createAArch64MCCodeEmitter(const MCInstrInfo &MCII,
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const MCRegisterInfo &MRI,
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MCContext &Ctx);
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MCAsmBackend *createAArch64leAsmBackend(const Target &T,
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const MCSubtargetInfo &STI,
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const MCRegisterInfo &MRI,
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const MCTargetOptions &Options);
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MCAsmBackend *createAArch64beAsmBackend(const Target &T,
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const MCSubtargetInfo &STI,
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const MCRegisterInfo &MRI,
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const MCTargetOptions &Options);
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std::unique_ptr<MCObjectTargetWriter>
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createAArch64ELFObjectWriter(uint8_t OSABI, bool IsILP32);
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std::unique_ptr<MCObjectTargetWriter>
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createAArch64MachObjectWriter(uint32_t CPUType, uint32_t CPUSubtype,
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bool IsILP32);
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std::unique_ptr<MCObjectTargetWriter> createAArch64WinCOFFObjectWriter();
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MCTargetStreamer *createAArch64AsmTargetStreamer(MCStreamer &S,
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formatted_raw_ostream &OS,
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MCInstPrinter *InstPrint,
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bool isVerboseAsm);
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MCTargetStreamer *createAArch64ObjectTargetStreamer(MCStreamer &S,
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const MCSubtargetInfo &STI);
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namespace AArch64_MC {
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void initLLVMToCVRegMapping(MCRegisterInfo *MRI);
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}
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} // End llvm namespace
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// Defines symbolic names for AArch64 registers. This defines a mapping from
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// register name to register number.
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//
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#define GET_REGINFO_ENUM
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#include "AArch64GenRegisterInfo.inc"
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// Defines symbolic names for the AArch64 instructions.
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//
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#define GET_INSTRINFO_ENUM
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#define GET_INSTRINFO_MC_HELPER_DECLS
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#include "AArch64GenInstrInfo.inc"
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#define GET_SUBTARGETINFO_ENUM
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#include "AArch64GenSubtargetInfo.inc"
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#endif
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