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llvm-project/llvm/test/CodeGen/MIR
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Tim Northover 98a56eb7f4 GlobalISel: allow multiple types on MachineInstrs. 
llvm-svn: 276481
 		2016-07-22 22:13:36 +00:00
..
AArch64 [MIRTesting] Abort when failing to parse a function. 2016-07-21 22:25:57 +00:00
AMDGPU llc: Add support for -run-pass none 2016-07-16 02:24:59 +00:00
ARM llc: Add support for -run-pass none 2016-07-16 02:24:59 +00:00
Generic llc: Add support for -run-pass none 2016-07-16 02:24:59 +00:00
Hexagon [MIR] Print on the given output instead of stderr. 2016-07-13 20:36:03 +00:00
Lanai [MIR] Print on the given output instead of stderr. 2016-07-13 20:36:03 +00:00
Mips llc: Add support for -run-pass none 2016-07-16 02:24:59 +00:00
NVPTX llc: Add support for -run-pass none 2016-07-16 02:24:59 +00:00
PowerPC llc: Add support for -run-pass none 2016-07-16 02:24:59 +00:00
X86 GlobalISel: allow multiple types on MachineInstrs. 2016-07-22 22:13:36 +00:00