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llvm-project/llvm/test/tools/llvm-mca/X86
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Andrea Di Biagio 207e3af501 [MCA] Add support for printing immedate values as hex. Also enable lexing of masm binary and hex literals. 
This patch adds a new llvm-mca flag named -print-imm-hex.

By default, the instruction printer prints immediate operands as decimals. Flag
-print-imm-hex enables the instruction printer to print those operands in hex.

This patch also adds support for MASM binary and hex literal numbers (example
0FFh, 101b).
Added tests to verify the behavior of the new flag. Tests also verify that masm
numeric literal operands are now recognized.

Differential Revision: https://reviews.llvm.org/D65588

llvm-svn: 367671
 		2019-08-02 10:38:25 +00:00
..
Atom [X86] Add missing properties on llvm.x86.sse.{st,ld}mxcsr 2019-06-19 08:44:31 +00:00
Barcelona Fix r363773: Update Barcelona MCA tests. 2019-06-19 10:00:36 +00:00
BdVer2 [NFC][X86][MCA] BdVer2: add load-store-throughput test 2019-06-19 08:53:28 +00:00
Broadwell [X86] Add missing properties on llvm.x86.sse.{st,ld}mxcsr 2019-06-19 08:44:31 +00:00
BtVer2 [MCA][Bottleneck Analysis] Teach how to compute a critical sequence of instructions based on the simulation. 2019-06-21 13:32:54 +00:00
Generic [X86] Add missing properties on llvm.x86.sse.{st,ld}mxcsr 2019-06-19 08:44:31 +00:00
Haswell [X86] Add missing properties on llvm.x86.sse.{st,ld}mxcsr 2019-06-19 08:44:31 +00:00
SLM [X86] Add missing properties on llvm.x86.sse.{st,ld}mxcsr 2019-06-19 08:44:31 +00:00
SandyBridge [X86] Add missing properties on llvm.x86.sse.{st,ld}mxcsr 2019-06-19 08:44:31 +00:00
SkylakeClient Set an explicit x86 triple for test bottleneck-analysis.s added by my r364045. NFC 2019-06-21 14:05:58 +00:00
SkylakeServer [X86] Add missing properties on llvm.x86.sse.{st,ld}mxcsr 2019-06-19 08:44:31 +00:00
Znver1 [X86] Add missing properties on llvm.x86.sse.{st,ld}mxcsr 2019-06-19 08:44:31 +00:00
bextr-read-after-ld.s [X86] AMD Piledriver (BdVer2): major cleanup (mainly inverse throughput) 2019-05-09 13:54:51 +00:00
bzhi-read-after-ld.s [utils] Ensure that update_mca_test_checks.py writes prefixes in alphabetical order 2018-10-04 14:42:19 +00:00
cpus.s [NFC][MCA][X86] Add baseline test coverage for AMD Barcelona (aka K10, fam10h) 2019-06-15 16:12:05 +00:00
default-iterations.s
…
dispatch_width.s
…
fma3-read-after-ld-1.s [utils] Ensure that update_mca_test_checks.py writes prefixes in alphabetical order 2018-10-04 14:42:19 +00:00
fma3-read-after-ld-2.s [utils] Ensure that update_mca_test_checks.py writes prefixes in alphabetical order 2018-10-04 14:42:19 +00:00
in-order-cpu.s
…
intel-syntax.s [MC] Separate masm integer literal lexer support from inline asm 2018-10-24 20:23:57 +00:00
invalid-assembly-sequence.s
…
invalid-cpu.s
…
invalid-empty-file.s
…
lit.local.cfg [lit] Delete empty lines at the end of lit.local.cfg NFC 2019-06-17 09:51:07 +00:00
llvm-mca-markers-1.s
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llvm-mca-markers-2.s [MCA] Don't add a name to the default code region. 2019-05-08 11:00:43 +00:00
llvm-mca-markers-3.s
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llvm-mca-markers-4.s
…
llvm-mca-markers-5.s
…
llvm-mca-markers-6.s [MCA] Add support for nested and overlapping region markers 2019-05-09 15:18:09 +00:00
llvm-mca-markers-7.s [MCA] Add support for nested and overlapping region markers 2019-05-09 15:18:09 +00:00
llvm-mca-markers-8.s [MCA] Add support for nested and overlapping region markers 2019-05-09 15:18:09 +00:00
llvm-mca-markers-9.s [MCA] Add support for nested and overlapping region markers 2019-05-09 15:18:09 +00:00
llvm-mca-markers-10.s [MCA] Add support for nested and overlapping region markers 2019-05-09 15:18:09 +00:00
llvm-mca-markers-11.s [MCA] Add support for nested and overlapping region markers 2019-05-09 15:18:09 +00:00
llvm-mca-markers-12.s [MCA] Add support for nested and overlapping region markers 2019-05-09 15:18:09 +00:00
no-sched-model.s
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option-all-stats-1.s [llvm-mca][scheduler-stats] Print issued micro opcodes per cycle. NFCI 2019-04-08 16:05:54 +00:00
option-all-stats-2.s [llvm-mca][scheduler-stats] Print issued micro opcodes per cycle. NFCI 2019-04-08 16:05:54 +00:00
option-all-views-1.s [MCA][Bottleneck Analysis] Teach how to compute a critical sequence of instructions based on the simulation. 2019-06-21 13:32:54 +00:00
option-all-views-2.s [MCA][Bottleneck Analysis] Teach how to compute a critical sequence of instructions based on the simulation. 2019-06-21 13:32:54 +00:00
option-no-stats-1.s [MCA][Bottleneck Analysis] Teach how to compute a critical sequence of instructions based on the simulation. 2019-06-21 13:32:54 +00:00
print-imm-hex-1.s [MCA] Add support for printing immedate values as hex. Also enable lexing of masm binary and hex literals. 2019-08-02 10:38:25 +00:00
print-imm-hex-2.s [MCA] Add support for printing immedate values as hex. Also enable lexing of masm binary and hex literals. 2019-08-02 10:38:25 +00:00
read-after-ld-1.s [NFC][MCA][X86] Add baseline test coverage for AMD Barcelona (aka K10, fam10h) 2019-06-15 16:12:05 +00:00
read-after-ld-2.s [X86] Fix Skylake ReadAfterLd for PADDrm etc. 2018-10-16 09:50:16 +00:00
read-after-ld-3.s [llvm-mca][x86] Add PR36951 ReadAfterLd test case 2018-10-04 16:26:56 +00:00
register-file-statistics.s [NFC][MCA][X86] Add baseline test coverage for AMD Barcelona (aka K10, fam10h) 2019-06-15 16:12:05 +00:00
scheduler-queue-usage.s [NFC][MCA][X86] Add baseline test coverage for AMD Barcelona (aka K10, fam10h) 2019-06-15 16:12:05 +00:00
sqrt-rsqrt-rcp-memop.s [NFC][MCA][X86] Add baseline test coverage for AMD Barcelona (aka K10, fam10h) 2019-06-15 16:12:05 +00:00
uop-queue.s [MCA] Add an experimental MicroOpQueue stage. 2019-03-29 12:15:37 +00:00
variable-blend-read-after-ld-1.s [X86] AMD Piledriver (BdVer2): major cleanup (mainly inverse throughput) 2019-05-09 13:54:51 +00:00
variable-blend-read-after-ld-2.s [X86] AMD Piledriver (BdVer2): major cleanup (mainly inverse throughput) 2019-05-09 13:54:51 +00:00