forked from OSchip/llvm-project
95 lines
3.9 KiB
LLVM
95 lines
3.9 KiB
LLVM
; RUN: opt %loadPolly -polly-stmt-granularity=scalar-indep -polly-print-instructions -polly-print-scops -disable-output < %s | FileCheck %s -match-full-lines
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target datalayout = "e-m:w-i64:64-f80:128-n8:16:32:64-S128"
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@b = dso_local local_unnamed_addr global i32 1, align 4
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@e = dso_local local_unnamed_addr global i32 3, align 4
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@a = common dso_local local_unnamed_addr global [56 x i32] zeroinitializer, align 16
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@f = common dso_local local_unnamed_addr global i16 0, align 2
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@d = common dso_local local_unnamed_addr global i8 0, align 1
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; Function Attrs: nounwind uwtable
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define dso_local i32 @func() {
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entry:
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br label %entry.split
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entry.split: ; preds = %entry
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br label %for.body
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for.body: ; preds = %for.body, %entry.split
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%indvars.iv = phi i64 [ 0, %entry.split ], [ %indvars.iv.next, %for.body ]
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%arrayidx = getelementptr inbounds [56 x i32], [56 x i32]* @a, i64 0, i64 %indvars.iv
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%0 = trunc i64 %indvars.iv to i32
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store i32 %0, i32* %arrayidx, align 4, !tbaa !0
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond = icmp eq i64 %indvars.iv.next, 56
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br i1 %exitcond, label %for.end, label %for.body
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for.end: ; preds = %for.body
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%1 = load i32, i32* @e, align 4, !tbaa !0
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store i32 2, i32* @e, align 4, !tbaa !0
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%2 = trunc i32 %1 to i16
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%conv = and i16 %2, 1
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%tobool = icmp eq i16 %conv, 0
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br label %for.body3
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for.body3: ; preds = %for.end, %for.inc11
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%storemerge20 = phi i32 [ 2, %for.end ], [ %dec12, %for.inc11 ]
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%3 = load i8, i8* @d, align 1
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%cmp6 = icmp eq i8 %3, 8
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%or.cond = or i1 %tobool, %cmp6
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br i1 %or.cond, label %for.inc11, label %for.inc11.loopexit
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for.inc11.loopexit: ; preds = %for.body3
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store i32 0, i32* @b, align 4, !tbaa !0
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store i8 8, i8* @d, align 1, !tbaa !4
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br label %for.inc11
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for.inc11: ; preds = %for.inc11.loopexit, %for.body3
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%dec12 = add nsw i32 %storemerge20, -1
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%cmp2 = icmp sgt i32 %storemerge20, -18
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br i1 %cmp2, label %for.body3, label %for.end13
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for.end13: ; preds = %for.inc11
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store i16 %conv, i16* @f, align 2, !tbaa !5
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store i32 -19, i32* @e, align 4, !tbaa !0
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%4 = load i32, i32* @b, align 4, !tbaa !0
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ret i32 %4
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}
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!0 = !{!1, !1, i64 0}
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!1 = !{!"int", !2, i64 0}
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!2 = !{!"omnipotent char", !3, i64 0}
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!3 = !{!"Simple C/C++ TBAA"}
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!4 = !{!2, !2, i64 0}
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!5 = !{!6, !6, i64 0}
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!6 = !{!"short", !2, i64 0}
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; CHECK: Stmt_for_end_a
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; CHECK-NEXT: Domain :=
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; CHECK-NEXT: { Stmt_for_end_a[] };
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; CHECK-NEXT: Schedule :=
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; CHECK-NEXT: { Stmt_for_end_a[] -> [1, 0] };
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; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK-NEXT: { Stmt_for_end_a[] -> MemRef_e[0] };
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; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
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; CHECK-NEXT: { Stmt_for_end_a[] -> MemRef_tobool[] };
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; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
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; CHECK-NEXT: { Stmt_for_end_a[] -> MemRef_conv[] };
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; CHECK-NEXT: Instructions {
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; CHECK-NEXT: %1 = load i32, i32* @e, align 4, !tbaa !0
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; CHECK-NEXT: %2 = trunc i32 %1 to i16
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; CHECK-NEXT: %conv = and i16 %2, 1
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; CHECK-NEXT: %tobool = icmp eq i16 %conv, 0
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; CHECK-NEXT: }
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; CHECK-NEXT: Stmt_for_end
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; CHECK-NEXT: Domain :=
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; CHECK-NEXT: { Stmt_for_end[] };
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; CHECK-NEXT: Schedule :=
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; CHECK-NEXT: { Stmt_for_end[] -> [2, 0] };
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; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK-NEXT: { Stmt_for_end[] -> MemRef_e[0] };
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; CHECK-NEXT: Instructions {
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; CHECK-NEXT: store i32 2, i32* @e, align 4, !tbaa !0
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; CHECK-NEXT: }
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