forked from OSchip/llvm-project
96 lines
2.8 KiB
LLVM
96 lines
2.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -aa-pipeline=basic-aa -passes='require<memoryssa>,gvn' -S -verify-memoryssa %s | FileCheck %s
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; REQUIRES: asserts
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declare void @use(i32) readnone
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define i32 @test(i32* %ptr.0, i32** %ptr.1, i1 %c) {
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; CHECK-LABEL: @test(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[LV_0:%.*]] = load i32, i32* [[PTR_0:%.*]], align 8
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; CHECK-NEXT: call void @use(i32 [[LV_0]])
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; CHECK-NEXT: br i1 [[C:%.*]], label [[IF_THEN749:%.*]], label [[FOR_INC774:%.*]]
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; CHECK: if.then749:
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; CHECK-NEXT: [[LV_1:%.*]] = load i32*, i32** [[PTR_1:%.*]], align 8
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; CHECK-NEXT: store i32 10, i32* [[LV_1]], align 4
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; CHECK-NEXT: [[LV_2_PRE:%.*]] = load i32, i32* [[PTR_0]], align 8
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; CHECK-NEXT: br label [[FOR_INC774]]
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; CHECK: for.inc774:
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; CHECK-NEXT: [[LV_2:%.*]] = phi i32 [ [[LV_2_PRE]], [[IF_THEN749]] ], [ [[LV_0]], [[ENTRY:%.*]] ]
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; CHECK-NEXT: call void @use(i32 [[LV_2]])
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; CHECK-NEXT: ret i32 1
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;
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entry:
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br label %for.end435
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for.end435:
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%lv.0 = load i32, i32* %ptr.0, align 8
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call void @use(i32 %lv.0)
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br label %if.end724
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if.end724:
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br i1 %c, label %if.then749, label %for.inc774
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if.then749:
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%lv.1 = load i32*, i32** %ptr.1, align 8
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%arrayidx772 = getelementptr inbounds i32, i32* %lv.1, i64 0
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store i32 10, i32* %arrayidx772, align 4
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br label %for.inc774
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for.inc774:
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br label %for.body830
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for.body830:
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%lv.2 = load i32, i32* %ptr.0, align 8
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call void @use(i32 %lv.2)
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br label %for.body.i22
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for.body.i22:
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ret i32 1
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}
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define i32 @test_volatile(i32* %ptr.0, i32** %ptr.1, i1 %c) {
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; CHECK-LABEL: @test_volatile(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[LV_0:%.*]] = load volatile i32, i32* [[PTR_0:%.*]], align 8
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; CHECK-NEXT: call void @use(i32 [[LV_0]])
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; CHECK-NEXT: br i1 [[C:%.*]], label [[IF_THEN749:%.*]], label [[FOR_INC774:%.*]]
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; CHECK: if.then749:
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; CHECK-NEXT: [[LV_1:%.*]] = load volatile i32*, i32** [[PTR_1:%.*]], align 8
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; CHECK-NEXT: store i32 10, i32* [[LV_1]], align 4
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; CHECK-NEXT: br label [[FOR_INC774]]
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; CHECK: for.inc774:
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; CHECK-NEXT: [[LV_2:%.*]] = load volatile i32, i32* [[PTR_0]], align 8
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; CHECK-NEXT: call void @use(i32 [[LV_2]])
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; CHECK-NEXT: ret i32 1
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;
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entry:
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br label %for.end435
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for.end435:
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%lv.0 = load volatile i32, i32* %ptr.0, align 8
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call void @use(i32 %lv.0)
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br label %if.end724
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if.end724:
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br i1 %c, label %if.then749, label %for.inc774
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if.then749:
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%lv.1 = load volatile i32*, i32** %ptr.1, align 8
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%arrayidx772 = getelementptr inbounds i32, i32* %lv.1, i64 0
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store i32 10, i32* %arrayidx772, align 4
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br label %for.inc774
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for.inc774:
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br label %for.body830
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for.body830:
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%lv.2 = load volatile i32, i32* %ptr.0, align 8
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call void @use(i32 %lv.2)
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br label %for.body.i22
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for.body.i22:
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ret i32 1
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}
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