forked from OSchip/llvm-project
55 lines
1.6 KiB
LLVM
55 lines
1.6 KiB
LLVM
; RUN: llc -verify-machineinstrs -march=ppc64le -mcpu=pwr8 < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -march=ppc64le -mcpu=pwr8 -O0 < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -march=ppc64le < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -march=ppc64le -O0 < %s | FileCheck %s
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; The second run of the test case is to ensure the behaviour is the same
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; without specifying -mcpu=pwr8 as that is now the baseline for ppc64le.
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target datalayout = "e-m:e-i64:64-n32:64"
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target triple = "powerpc64le-unknown-linux-gnu"
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@number64 = global i64 10, align 8
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; CHECK: .abiversion 2
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define i64 @use_toc(i64 %a) nounwind {
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entry:
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; CHECK-LABEL: @use_toc
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; CHECK-NEXT: .L{{.*}}:
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; CHECK-NEXT: .Lfunc_gep[[FN:[0-9]+]]:
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; CHECK-NEXT: addis 2, 12, .TOC.-.Lfunc_gep[[FN]]@ha
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; CHECK-NEXT: addi 2, 2, .TOC.-.Lfunc_gep[[FN]]@l
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; CHECK-NEXT: .Lfunc_lep[[FN]]:
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; CHECK-NEXT: .localentry use_toc, .Lfunc_lep[[FN]]-.Lfunc_gep[[FN]]
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; CHECK-NEXT: %entry
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%0 = load i64, i64* @number64, align 8
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%cmp = icmp eq i64 %0, %a
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%conv1 = zext i1 %cmp to i64
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ret i64 %conv1
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}
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declare void @callee()
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define void @use_toc_implicit() nounwind {
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entry:
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; CHECK-LABEL: @use_toc_implicit
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; CHECK-NEXT: .L{{.*}}:
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; CHECK-NEXT: .Lfunc_gep[[FN:[0-9]+]]:
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; CHECK-NEXT: addis 2, 12, .TOC.-.Lfunc_gep[[FN]]@ha
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; CHECK-NEXT: addi 2, 2, .TOC.-.Lfunc_gep[[FN]]@l
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; CHECK-NEXT: .Lfunc_lep[[FN]]:
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; CHECK-NEXT: .localentry use_toc_implicit, .Lfunc_lep[[FN]]-.Lfunc_gep[[FN]]
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; CHECK-NEXT: %entry
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call void @callee()
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ret void
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}
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define i64 @no_toc(i64 %a) nounwind {
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entry:
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; CHECK-LABEL: @no_toc
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; CHECK-NEXT: .L{{.*}}:
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; CHECK-NEXT: %entry
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ret i64 %a
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}
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