Zlatko Buljan 6afea51a58 [mips][microMIPS] Implement LH, LHE, LHU and LHUE instructions and add CodeGen support ... Differential Revision: http://reviews.llvm.org/D15418 llvm-svn: 269883		2016-05-18 06:54:59 +00:00
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invalid-mips1-wrong-error.s	[mips] Range check simm9 and fix a bug this revealed.	2016-03-31 13:15:23 +00:00
invalid-mips1.s	[mips] Marked the ADDi instruction aliases as not available in Mips32R6 and Mips64R6.	2014-09-16 09:26:09 +00:00
invalid-mips2.s	[mips] Add support for COP1's Branch-On-Cond-Likely instructions	2014-10-17 14:08:28 +00:00
invalid-mips3-wrong-error.s	[mips] Range check simm9 and fix a bug this revealed.	2016-03-31 13:15:23 +00:00
invalid-mips3.s	…
invalid-mips4-wrong-error.s	[mips][microMIPS] Implement PREFX, LHUE, LBE, LBUE, LHE, LWE, SBE, SHE and SWE instructions	2015-09-16 09:14:35 +00:00
invalid-mips4.s	[mips][microMIPS] Implement PREFX, LHUE, LBE, LBUE, LHE, LWE, SBE, SHE and SWE instructions	2015-09-16 09:14:35 +00:00
invalid-mips5-wrong-error.s	[mips] Improve the error messages given by MipsAsmParser.	2014-09-16 15:00:52 +00:00
invalid-mips5.s	…
invalid-mips32-wrong-error.s	[mips] Add support for COP1's Branch-On-Cond-Likely instructions	2014-10-17 14:08:28 +00:00
invalid-mips64.s	…
invalid.s	[mips][microMIPS] Implement LH, LHE, LHU and LHUE instructions and add CodeGen support	2016-05-18 06:54:59 +00:00
relocations.s	[mips] Use MipsMCExpr instead of MCSymbolRefExpr for all relocations.	2016-05-03 13:35:44 +00:00
valid-xfail.s	…
valid.s	Summary:	2016-04-14 13:43:17 +00:00