llvm-project/llvm/test/CodeGen/MIR/AMDGPU
Matt Arsenault f26ed6e47c llc: Change behavior of -mcpu with existing attribute
Don't overwrite existing target-cpu attributes.

I've often found the replacement behavior annoying, and this is
inconsistent with how the fast math command line flags interact with
the function attributes.

Does not yet change target-features, since I think that should behave
as a concatenation.
2020-01-07 10:10:25 -05:00
..
expected-target-index-name.mir [AMDGPU] Extend buffer intrinsics with swizzling 2019-10-02 17:22:36 +00:00
intrinsics.mir
invalid-target-index-operand.mir [AMDGPU] Extend buffer intrinsics with swizzling 2019-10-02 17:22:36 +00:00
lit.local.cfg
llc-target-cpu-attr-from-cmdline-ir.mir llc: Change behavior of -mcpu with existing attribute 2020-01-07 10:10:25 -05:00
llc-target-cpu-attr-from-cmdline.mir llc/MIR: Fix setFunctionAttributes for MIR functions 2020-01-06 17:21:51 -05:00
load-store-opt-dlc.mir [AMDGPU] Extend buffer intrinsics with swizzling 2019-10-02 17:22:36 +00:00
machine-function-info-no-ir.mir AMDGPU: Add default denormal mode to MachineFunctionInfo 2019-11-01 00:03:39 -07:00
machine-function-info-register-parse-error1.mir
machine-function-info-register-parse-error2.mir
machine-function-info.ll AMDGPU: Add default denormal mode to MachineFunctionInfo 2019-11-01 00:03:39 -07:00
mfi-frame-offset-reg-class.mir
mfi-parse-error-frame-offset-reg.mir
mfi-parse-error-scratch-rsrc-reg.mir
mfi-parse-error-scratch-wave-offset-reg.mir
mfi-parse-error-stack-ptr-offset-reg.mir
mfi-scratch-rsrc-reg-reg-class.mir
mfi-scratch-wave-offset-reg-class.mir
mfi-stack-ptr-offset-reg-class.mir
mir-canon-multi.mir [MIRNamer]: Make the check lines in the test robust with regex. 2019-11-16 22:58:45 -08:00
mircanon-memoperands.mir [llvm][MIRVRegNamerUtils] Adding hashing on memoperands. 2019-12-11 22:11:49 -05:00
parse-order-reserved-regs.mir [AMDGPU] Extend buffer intrinsics with swizzling 2019-10-02 17:22:36 +00:00
stack-id.mir
syncscopes.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
target-flags.mir
target-index-operands.mir [AMDGPU] Extend buffer intrinsics with swizzling 2019-10-02 17:22:36 +00:00