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llvm-project/llvm/test/CodeGen
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Jessica Paquette 37910fd0e1 [AArch64][GlobalISel] Fold G_SHL into TB(N)Z bit calculation 
This implements the following optimization:

```
(tbz (shl x, c), b) -> (tbz x, b-c)
```

Which appears in `getTestBitOperand` in AArch64ISelLowering.cpp.

If we test bit `b` of `shl x, c`, we can fold away the `shl` by looking `c` bits
to the right of `b` in `x` when this fits in the type. So, we can just test the
`b-c`th bit.

Differential Revision: https://reviews.llvm.org/D73924
 		2020-02-03 14:27:08 -08:00
..
AArch64 [AArch64][GlobalISel] Fold G_SHL into TB(N)Z bit calculation 2020-02-03 14:27:08 -08:00
AMDGPU AMDGPU: Add flag to control mem intrinsic expansion 2020-02-03 14:26:01 -08:00
ARC
…
ARM [ARM] Expand vector reduction intrinsics on soft float 2020-02-03 18:49:12 +01:00
AVR
…
BPF [BPF] fix a bug in BPFMISimplifyPatchable pass with -O0 2020-01-30 08:28:39 -08:00
Generic [CodeGenPrepare] Make TargetPassConfig required 2020-02-02 09:28:45 -08:00
Hexagon [Hexagon] Add REQUIRES: asserts to a testcase using -debug-only 2020-01-21 13:22:01 -06:00
Inputs
…
Lanai Revert "[Support] make report_fatal_error `abort` instead of `exit`" 2020-01-15 17:52:25 -08:00
MIR Revert "[Support] make report_fatal_error `abort` instead of `exit`" 2020-01-15 17:52:25 -08:00
MSP430 Migrate function attribute "no-frame-pointer-elim"="false" to "frame-pointer"="none" as cleanups after D56351 2019-12-24 16:27:51 -08:00
Mips Don't mark MIPS TRAP as isTerminator 2020-02-01 15:50:22 +00:00
NVPTX Consolidate internal denormal flushing controls 2020-01-17 20:09:53 -05:00
PowerPC [AIX] Don't use a zero fill with a second parameter 2020-02-03 15:16:08 -05:00
RISCV [TargetLowering] SimplifyDemandedBits - Remove ashr if all our demandedbits already match the sign bit 2020-01-25 17:36:46 +00:00
SPARC Revert "[Support] make report_fatal_error `abort` instead of `exit`" 2020-01-15 17:52:25 -08:00
SystemZ Update spelling of {analyze,insert,remove}Branch in strings and comments 2020-01-21 10:15:38 -06:00
Thumb [Thumb][test] Fix CodeGen/Thumb/PR17309.ll after llvmorg-10-init-16046-ga36ddf0aa9d 2019-12-24 16:58:12 -08:00
Thumb2 [ARM] MVE vector reduction fadd and fmul tests. NFC 2020-02-03 22:03:56 +00:00
VE [VE] (fp)trunc+store & load+(fp)ext isel 2020-02-03 16:55:44 +01:00
WebAssembly [WebAssembly] Preserve debug frame base information through register coloring 2020-01-28 16:58:15 -08:00
WinCFGuard Migrate function attribute "no-frame-pointer-elim"="false" to "frame-pointer"="none" as cleanups after D56351 2019-12-24 16:27:51 -08:00
WinEH Migrate function attribute "no-frame-pointer-elim"="false" to "frame-pointer"="none" as cleanups after D56351 2019-12-24 16:27:51 -08:00
X86 [TargetLowering] SimplifyDemandedBits - add basic KnownBits ZEXTLoad handling 2020-02-03 16:50:04 +00:00
XCore Revert "[Support] make report_fatal_error `abort` instead of `exit`" 2020-01-15 17:52:25 -08:00