Dmitry Preobrazhensky 622bde8bc7 [AMDGPU][MC] Added ds_add_src2_f32 ... See bug 36833: https://bugs.llvm.org/show_bug.cgi?id=36833 Differential Revision: https://reviews.llvm.org/D44779 Reviewers: arsenm, artem.tamazov, timcorringham llvm-svn: 328713		2018-03-28 16:21:56 +00:00
..
AArch64	[AArch64] Add support for secrel add/load/store relocations for COFF	2018-03-01 20:42:28 +00:00
AMDGPU	[AMDGPU][MC] Added ds_add_src2_f32	2018-03-28 16:21:56 +00:00
ARM	Revert "Reapply "[DWARFv5] Emit file 0 to the line table.""	2018-03-28 12:36:46 +00:00
AVR	[AVR] Implement some missing code paths	2017-12-11 11:01:27 +00:00
AsmParser	Use .set instead of = when printing assignment in assembly output	2018-03-27 16:44:41 +00:00
BPF	bpf: New disassembler testcases for 32-bit subregister support	2018-02-23 23:49:35 +00:00
COFF	[IR] Avoid the need to prefix MS C++ symbols with '\01'	2018-03-16 20:13:32 +00:00
Disassembler	[AMDGPU][MC] Added ds_add_src2_f32	2018-03-28 16:21:56 +00:00
ELF	Revert "Reapply "[DWARFv5] Emit file 0 to the line table.""	2018-03-28 12:36:46 +00:00
Hexagon	[Hexagon] Always generate mux out of predicated transfers if possible	2018-03-23 18:43:09 +00:00
Lanai	…
MachO	[DebugInfo] Support DWARF v5 source code embedding extension	2018-02-23 23:01:06 +00:00
Markup	…
Mips	Use .set instead of = when printing assignment in assembly output	2018-03-27 16:44:41 +00:00
PowerPC	[PowerPC] Code cleanup. Remove instructions that were withdrawn from Power 9.	2018-02-23 15:55:16 +00:00
RISCV	[RISCV] Implement MC relaxations for compressed instructions.	2018-03-02 22:04:12 +00:00
Sparc	[Sparc] invalid adjustments in TLS_LE/TLS_LDO relocations removed	2017-07-25 15:28:28 +00:00
SystemZ	[SystemZ, AsmParser] Enable the mnemonic spell corrector.	2017-07-18 09:17:00 +00:00
WebAssembly	[WebAssembly] Added initial AsmParser implementation.	2018-03-20 20:06:35 +00:00
X86	[X86] Added support for nocf_check attribute for indirect Branch Tracking	2018-03-17 13:29:46 +00:00