forked from OSchip/llvm-project
103 lines
3.5 KiB
C++
103 lines
3.5 KiB
C++
//===-- Nios2MCTargetDesc.cpp - Nios2 Target Descriptions -----------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file provides Nios2 specific target descriptions.
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//
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//===----------------------------------------------------------------------===//
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#include "Nios2MCTargetDesc.h"
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#include "InstPrinter/Nios2InstPrinter.h"
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#include "Nios2MCAsmInfo.h"
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#include "Nios2TargetStreamer.h"
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#include "llvm/MC/MCInstrInfo.h"
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#include "llvm/MC/MCRegisterInfo.h"
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#include "llvm/MC/MCSubtargetInfo.h"
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#include "llvm/Support/TargetRegistry.h"
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using namespace llvm;
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#define GET_INSTRINFO_MC_DESC
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#include "Nios2GenInstrInfo.inc"
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#define GET_SUBTARGETINFO_MC_DESC
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#include "Nios2GenSubtargetInfo.inc"
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#define GET_REGINFO_MC_DESC
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#include "Nios2GenRegisterInfo.inc"
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static MCInstrInfo *createNios2MCInstrInfo() {
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MCInstrInfo *X = new MCInstrInfo();
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InitNios2MCInstrInfo(X); // defined in Nios2GenInstrInfo.inc
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return X;
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}
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static MCRegisterInfo *createNios2MCRegisterInfo(const Triple &TT) {
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MCRegisterInfo *X = new MCRegisterInfo();
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InitNios2MCRegisterInfo(X, Nios2::R15); // defined in Nios2GenRegisterInfo.inc
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return X;
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}
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static MCSubtargetInfo *
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createNios2MCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS) {
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if (CPU.empty() || CPU == "generic")
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CPU = "nios2r1";
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return createNios2MCSubtargetInfoImpl(TT, CPU, FS);
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// createNios2MCSubtargetInfoImpl defined in Nios2GenSubtargetInfo.inc
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}
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static MCAsmInfo *createNios2MCAsmInfo(const MCRegisterInfo &MRI,
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const Triple &TT) {
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MCAsmInfo *MAI = new Nios2MCAsmInfo(TT);
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unsigned SP = MRI.getDwarfRegNum(Nios2::SP, true);
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MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, SP, 0);
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MAI->addInitialFrameState(Inst);
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return MAI;
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}
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static MCInstPrinter *createNios2MCInstPrinter(const Triple &T,
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unsigned SyntaxVariant,
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const MCAsmInfo &MAI,
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const MCInstrInfo &MII,
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const MCRegisterInfo &MRI) {
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return new Nios2InstPrinter(MAI, MII, MRI);
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}
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static MCTargetStreamer *createNios2AsmTargetStreamer(MCStreamer &S,
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formatted_raw_ostream &OS,
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MCInstPrinter *InstPrint,
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bool isVerboseAsm) {
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return new Nios2TargetAsmStreamer(S, OS);
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}
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extern "C" void LLVMInitializeNios2TargetMC() {
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Target *T = &getTheNios2Target();
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// Register the MC asm info.
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RegisterMCAsmInfoFn X(*T, createNios2MCAsmInfo);
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// Register the MC instruction info.
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TargetRegistry::RegisterMCInstrInfo(*T, createNios2MCInstrInfo);
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// Register the MC register info.
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TargetRegistry::RegisterMCRegInfo(*T, createNios2MCRegisterInfo);
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// Register the asm target streamer.
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TargetRegistry::RegisterAsmTargetStreamer(*T, createNios2AsmTargetStreamer);
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// Register the MC subtarget info.
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TargetRegistry::RegisterMCSubtargetInfo(*T, createNios2MCSubtargetInfo);
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// Register the MCInstPrinter.
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TargetRegistry::RegisterMCInstPrinter(*T, createNios2MCInstPrinter);
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// Register the asm backend.
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TargetRegistry::RegisterMCAsmBackend(*T, createNios2AsmBackend);
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}
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