llvm-project/mlir/test
River Riddle 2d0477a003 [mlir][DeclarativeParser] Add basic support for optional groups in the assembly format.
When operations have optional attributes, or optional operands(i.e. empty variadic operands), the assembly format often has an optional section to represent these arguments. This revision adds basic support for defining an "optional group" in the assembly format to support this. An optional group is defined by wrapping a set of elements in `()` followed by `?` and requires the following:

* The first element of the group must be either a literal or an operand argument.
  - This is because the first element must be optionally parsable.
* There must be exactly one argument variable within the group that is marked as the anchor of the group. The anchor is the element whose presence controls whether the group should be printed/parsed. An element is marked as the anchor by adding a trailing `^`.
* The group must only contain literals, variables, and type directives.
  - Any attribute variables may be used, but only optional attributes can be marked as the anchor.
  - Only variadic, i.e. optional, operand arguments can be used.
  - The elements of a type directive must be defined within the same optional group.

An example of this can be seen with the assembly format for ReturnOp, which has a variadic number of operands.

```
def ReturnOp : ... {
  let arguments = (ins Variadic<AnyType>:$operands);

  // We only print the operands+types if there are a non-zero number
  // of operands.
  let assemblyFormat = "attr-dict ($operands^ `:` type($operands))?";
}
```

Differential Revision: https://reviews.llvm.org/D74681
2020-02-21 15:15:31 -08:00
..
AffineOps [MLIR][Affine] Add affine.parallel op 2020-02-12 18:00:24 -08:00
Analysis [mlir] Update the CallGraph for nested symbol references, and simplify CallableOpInterface 2020-01-13 15:51:28 -08:00
Conversion [mlir][spirv] Add lowering for load/store zero-rank memref from std to SPIR-V. 2020-02-21 14:41:12 -05:00
Dialect [mlir][spirv] Add lowering for load/store zero-rank memref from std to SPIR-V. 2020-02-21 14:41:12 -05:00
EDSC [NFC][mlir] Adding some helpful EDSC intrinsics 2020-02-13 09:21:17 +01:00
Examples [mlir] Replace toy::DeadFunctionEliminationPass with symbolDCEPass. 2020-01-27 23:48:06 -08:00
IR [mlir][DeclarativeParser] Add support for the TypesMatchWith trait. 2020-02-21 15:15:31 -08:00
Pass Refactor the way that pass options are specified. 2019-12-23 16:48:22 -08:00
Quantizer Convert the Canonicalize and CSE passes to generic Operation Passes. 2019-10-24 15:01:09 -07:00
SDBM Remove static registration for dialects, and the "alwayslink" hack for passes 2020-02-12 09:13:02 +00:00
Target [MLIR] change NVVM.mma.sync to the most useful variant. 2020-02-18 17:57:04 -08:00
Transforms [mlir] Add MemRef filter to affine data copy optimization 2020-02-14 13:41:45 -08:00
Unit Add build files and update README. 2019-03-30 11:23:22 -07:00
lib Move StandardOps/Ops.h to StandardOps/IR/Ops.h 2020-02-21 11:58:47 -08:00
mlir-cpu-runner [mlir] Turn flags in ConvertStandardToLLVM into pass flags 2020-02-11 10:28:30 -08:00
mlir-cuda-runner [mlir] use unpacked memref descriptors at function boundaries 2020-02-10 15:03:43 +01:00
mlir-tblgen [mlir][DeclarativeParser] Add basic support for optional groups in the assembly format. 2020-02-21 15:15:31 -08:00
mlir-vulkan-runner [mlir][spirv] Add mlir-vulkan-runner 2020-02-19 11:37:26 -05:00
APITest.h Mass update the MLIR license header to mention "Part of the LLVM project" 2020-01-26 03:58:30 +00:00
CMakeLists.txt [mlir][spirv] Add mlir-vulkan-runner 2020-02-19 11:37:26 -05:00
lit.cfg.py [mlir][spirv] Add mlir-vulkan-runner 2020-02-19 11:37:26 -05:00
lit.site.cfg.py.in [mlir][spirv] Add mlir-vulkan-runner 2020-02-19 11:37:26 -05:00