forked from OSchip/llvm-project
e538fc74d4
Summary: We should always be able to accept AVX512 registers and instructions in llvm-mc. The only subtarget mode that should be checked is 16-bit vs 32-bit vs 64-bit mode. I've also removed all the mattr/mcpu lines from test RUN lines to be consistent with this. Most were due to AVX512, but a few were for other features. Fixes PR36202 Reviewers: RKSimon, echristo, bkramer Reviewed By: echristo Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D42824 llvm-svn: 324106 |
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CMakeLists.txt | ||
LLVMBuild.txt | ||
X86AsmInstrumentation.cpp | ||
X86AsmInstrumentation.h | ||
X86AsmParser.cpp | ||
X86AsmParserCommon.h | ||
X86Operand.h |