forked from OSchip/llvm-project
783 lines
26 KiB
C++
783 lines
26 KiB
C++
//===-- PPCCTRLoops.cpp - Identify and generate CTR loops -----------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This pass identifies loops where we can generate the PPC branch instructions
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// that decrement and test the count register (CTR) (bdnz and friends).
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//
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// The pattern that defines the induction variable can changed depending on
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// prior optimizations. For example, the IndVarSimplify phase run by 'opt'
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// normalizes induction variables, and the Loop Strength Reduction pass
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// run by 'llc' may also make changes to the induction variable.
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//
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// Criteria for CTR loops:
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// - Countable loops (w/ ind. var for a trip count)
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// - Try inner-most loops first
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// - No nested CTR loops.
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// - No function calls in loops.
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//
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//===----------------------------------------------------------------------===//
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#include "PPC.h"
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#include "PPCSubtarget.h"
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#include "PPCTargetMachine.h"
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#include "PPCTargetTransformInfo.h"
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#include "llvm/ADT/STLExtras.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/Analysis/AssumptionCache.h"
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#include "llvm/Analysis/CodeMetrics.h"
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#include "llvm/Analysis/LoopInfo.h"
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#include "llvm/Analysis/ScalarEvolutionExpander.h"
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#include "llvm/Analysis/TargetLibraryInfo.h"
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#include "llvm/Analysis/TargetTransformInfo.h"
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#include "llvm/CodeGen/TargetPassConfig.h"
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#include "llvm/CodeGen/TargetSchedule.h"
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#include "llvm/IR/Constants.h"
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#include "llvm/IR/DerivedTypes.h"
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#include "llvm/IR/Dominators.h"
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#include "llvm/IR/InlineAsm.h"
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#include "llvm/IR/Instructions.h"
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#include "llvm/IR/IntrinsicInst.h"
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#include "llvm/IR/Module.h"
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#include "llvm/IR/ValueHandle.h"
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#include "llvm/PassSupport.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/Transforms/Scalar.h"
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#include "llvm/Transforms/Utils/BasicBlockUtils.h"
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#include "llvm/Transforms/Utils/Local.h"
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#include "llvm/Transforms/Utils/LoopUtils.h"
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#ifndef NDEBUG
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#include "llvm/CodeGen/MachineDominators.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#endif
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using namespace llvm;
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#define DEBUG_TYPE "ctrloops"
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#ifndef NDEBUG
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static cl::opt<int> CTRLoopLimit("ppc-max-ctrloop", cl::Hidden, cl::init(-1));
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#endif
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// The latency of mtctr is only justified if there are more than 4
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// comparisons that will be removed as a result.
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static cl::opt<unsigned>
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SmallCTRLoopThreshold("min-ctr-loop-threshold", cl::init(4), cl::Hidden,
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cl::desc("Loops with a constant trip count smaller than "
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"this value will not use the count register."));
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STATISTIC(NumCTRLoops, "Number of loops converted to CTR loops");
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namespace llvm {
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void initializePPCCTRLoopsPass(PassRegistry&);
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#ifndef NDEBUG
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void initializePPCCTRLoopsVerifyPass(PassRegistry&);
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#endif
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}
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namespace {
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struct PPCCTRLoops : public FunctionPass {
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#ifndef NDEBUG
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static int Counter;
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#endif
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public:
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static char ID;
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PPCCTRLoops() : FunctionPass(ID) {
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initializePPCCTRLoopsPass(*PassRegistry::getPassRegistry());
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}
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bool runOnFunction(Function &F) override;
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void getAnalysisUsage(AnalysisUsage &AU) const override {
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AU.addRequired<LoopInfoWrapperPass>();
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AU.addPreserved<LoopInfoWrapperPass>();
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AU.addRequired<DominatorTreeWrapperPass>();
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AU.addPreserved<DominatorTreeWrapperPass>();
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AU.addRequired<ScalarEvolutionWrapperPass>();
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AU.addRequired<AssumptionCacheTracker>();
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AU.addRequired<TargetTransformInfoWrapperPass>();
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}
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private:
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bool mightUseCTR(BasicBlock *BB);
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bool convertToCTRLoop(Loop *L);
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private:
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const PPCTargetMachine *TM;
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const PPCSubtarget *STI;
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const PPCTargetLowering *TLI;
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const DataLayout *DL;
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const TargetLibraryInfo *LibInfo;
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const TargetTransformInfo *TTI;
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LoopInfo *LI;
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ScalarEvolution *SE;
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DominatorTree *DT;
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bool PreserveLCSSA;
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TargetSchedModel SchedModel;
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};
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char PPCCTRLoops::ID = 0;
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#ifndef NDEBUG
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int PPCCTRLoops::Counter = 0;
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#endif
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#ifndef NDEBUG
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struct PPCCTRLoopsVerify : public MachineFunctionPass {
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public:
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static char ID;
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PPCCTRLoopsVerify() : MachineFunctionPass(ID) {
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initializePPCCTRLoopsVerifyPass(*PassRegistry::getPassRegistry());
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}
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void getAnalysisUsage(AnalysisUsage &AU) const override {
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AU.addRequired<MachineDominatorTree>();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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bool runOnMachineFunction(MachineFunction &MF) override;
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private:
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MachineDominatorTree *MDT;
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};
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char PPCCTRLoopsVerify::ID = 0;
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#endif // NDEBUG
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} // end anonymous namespace
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INITIALIZE_PASS_BEGIN(PPCCTRLoops, "ppc-ctr-loops", "PowerPC CTR Loops",
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false, false)
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INITIALIZE_PASS_DEPENDENCY(DominatorTreeWrapperPass)
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INITIALIZE_PASS_DEPENDENCY(LoopInfoWrapperPass)
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INITIALIZE_PASS_DEPENDENCY(ScalarEvolutionWrapperPass)
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INITIALIZE_PASS_END(PPCCTRLoops, "ppc-ctr-loops", "PowerPC CTR Loops",
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false, false)
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FunctionPass *llvm::createPPCCTRLoops() { return new PPCCTRLoops(); }
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#ifndef NDEBUG
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INITIALIZE_PASS_BEGIN(PPCCTRLoopsVerify, "ppc-ctr-loops-verify",
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"PowerPC CTR Loops Verify", false, false)
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INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
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INITIALIZE_PASS_END(PPCCTRLoopsVerify, "ppc-ctr-loops-verify",
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"PowerPC CTR Loops Verify", false, false)
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FunctionPass *llvm::createPPCCTRLoopsVerify() {
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return new PPCCTRLoopsVerify();
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}
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#endif // NDEBUG
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bool PPCCTRLoops::runOnFunction(Function &F) {
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if (skipFunction(F))
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return false;
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auto *TPC = getAnalysisIfAvailable<TargetPassConfig>();
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if (!TPC)
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return false;
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TM = &TPC->getTM<PPCTargetMachine>();
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STI = TM->getSubtargetImpl(F);
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TLI = STI->getTargetLowering();
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LI = &getAnalysis<LoopInfoWrapperPass>().getLoopInfo();
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SE = &getAnalysis<ScalarEvolutionWrapperPass>().getSE();
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DT = &getAnalysis<DominatorTreeWrapperPass>().getDomTree();
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TTI = &getAnalysis<TargetTransformInfoWrapperPass>().getTTI(F);
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DL = &F.getParent()->getDataLayout();
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auto *TLIP = getAnalysisIfAvailable<TargetLibraryInfoWrapperPass>();
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LibInfo = TLIP ? &TLIP->getTLI() : nullptr;
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PreserveLCSSA = mustPreserveAnalysisID(LCSSAID);
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bool MadeChange = false;
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for (LoopInfo::iterator I = LI->begin(), E = LI->end();
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I != E; ++I) {
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Loop *L = *I;
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if (!L->getParentLoop())
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MadeChange |= convertToCTRLoop(L);
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}
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return MadeChange;
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}
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static bool isLargeIntegerTy(bool Is32Bit, Type *Ty) {
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if (IntegerType *ITy = dyn_cast<IntegerType>(Ty))
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return ITy->getBitWidth() > (Is32Bit ? 32U : 64U);
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return false;
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}
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// Determining the address of a TLS variable results in a function call in
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// certain TLS models.
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static bool memAddrUsesCTR(const PPCTargetMachine &TM, const Value *MemAddr) {
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const auto *GV = dyn_cast<GlobalValue>(MemAddr);
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if (!GV) {
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// Recurse to check for constants that refer to TLS global variables.
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if (const auto *CV = dyn_cast<Constant>(MemAddr))
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for (const auto &CO : CV->operands())
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if (memAddrUsesCTR(TM, CO))
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return true;
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return false;
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}
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if (!GV->isThreadLocal())
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return false;
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TLSModel::Model Model = TM.getTLSModel(GV);
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return Model == TLSModel::GeneralDynamic || Model == TLSModel::LocalDynamic;
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}
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// Loop through the inline asm constraints and look for something that clobbers
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// ctr.
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static bool asmClobbersCTR(InlineAsm *IA) {
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InlineAsm::ConstraintInfoVector CIV = IA->ParseConstraints();
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for (unsigned i = 0, ie = CIV.size(); i < ie; ++i) {
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InlineAsm::ConstraintInfo &C = CIV[i];
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if (C.Type != InlineAsm::isInput)
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for (unsigned j = 0, je = C.Codes.size(); j < je; ++j)
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if (StringRef(C.Codes[j]).equals_lower("{ctr}"))
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return true;
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}
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return false;
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}
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bool PPCCTRLoops::mightUseCTR(BasicBlock *BB) {
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for (BasicBlock::iterator J = BB->begin(), JE = BB->end();
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J != JE; ++J) {
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if (CallInst *CI = dyn_cast<CallInst>(J)) {
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// Inline ASM is okay, unless it clobbers the ctr register.
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if (InlineAsm *IA = dyn_cast<InlineAsm>(CI->getCalledValue())) {
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if (asmClobbersCTR(IA))
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return true;
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continue;
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}
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if (Function *F = CI->getCalledFunction()) {
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// Most intrinsics don't become function calls, but some might.
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// sin, cos, exp and log are always calls.
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unsigned Opcode = 0;
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if (F->getIntrinsicID() != Intrinsic::not_intrinsic) {
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switch (F->getIntrinsicID()) {
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default: continue;
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// If we have a call to ppc_is_decremented_ctr_nonzero, or ppc_mtctr
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// we're definitely using CTR.
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case Intrinsic::ppc_is_decremented_ctr_nonzero:
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case Intrinsic::ppc_mtctr:
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return true;
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// VisualStudio defines setjmp as _setjmp
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#if defined(_MSC_VER) && defined(setjmp) && \
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!defined(setjmp_undefined_for_msvc)
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# pragma push_macro("setjmp")
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# undef setjmp
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# define setjmp_undefined_for_msvc
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#endif
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case Intrinsic::setjmp:
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#if defined(_MSC_VER) && defined(setjmp_undefined_for_msvc)
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// let's return it to _setjmp state
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# pragma pop_macro("setjmp")
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# undef setjmp_undefined_for_msvc
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#endif
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case Intrinsic::longjmp:
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// Exclude eh_sjlj_setjmp; we don't need to exclude eh_sjlj_longjmp
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// because, although it does clobber the counter register, the
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// control can't then return to inside the loop unless there is also
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// an eh_sjlj_setjmp.
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case Intrinsic::eh_sjlj_setjmp:
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case Intrinsic::memcpy:
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case Intrinsic::memmove:
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case Intrinsic::memset:
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case Intrinsic::powi:
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case Intrinsic::log:
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case Intrinsic::log2:
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case Intrinsic::log10:
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case Intrinsic::exp:
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case Intrinsic::exp2:
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case Intrinsic::pow:
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case Intrinsic::sin:
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case Intrinsic::cos:
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return true;
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case Intrinsic::copysign:
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if (CI->getArgOperand(0)->getType()->getScalarType()->
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isPPC_FP128Ty())
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return true;
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else
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continue; // ISD::FCOPYSIGN is never a library call.
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case Intrinsic::sqrt: Opcode = ISD::FSQRT; break;
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case Intrinsic::floor: Opcode = ISD::FFLOOR; break;
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case Intrinsic::ceil: Opcode = ISD::FCEIL; break;
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case Intrinsic::trunc: Opcode = ISD::FTRUNC; break;
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case Intrinsic::rint: Opcode = ISD::FRINT; break;
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case Intrinsic::nearbyint: Opcode = ISD::FNEARBYINT; break;
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case Intrinsic::round: Opcode = ISD::FROUND; break;
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case Intrinsic::minnum: Opcode = ISD::FMINNUM; break;
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case Intrinsic::maxnum: Opcode = ISD::FMAXNUM; break;
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case Intrinsic::umul_with_overflow: Opcode = ISD::UMULO; break;
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case Intrinsic::smul_with_overflow: Opcode = ISD::SMULO; break;
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}
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}
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// PowerPC does not use [US]DIVREM or other library calls for
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// operations on regular types which are not otherwise library calls
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// (i.e. soft float or atomics). If adapting for targets that do,
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// additional care is required here.
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LibFunc Func;
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if (!F->hasLocalLinkage() && F->hasName() && LibInfo &&
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LibInfo->getLibFunc(F->getName(), Func) &&
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LibInfo->hasOptimizedCodeGen(Func)) {
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// Non-read-only functions are never treated as intrinsics.
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if (!CI->onlyReadsMemory())
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return true;
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// Conversion happens only for FP calls.
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if (!CI->getArgOperand(0)->getType()->isFloatingPointTy())
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return true;
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switch (Func) {
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default: return true;
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case LibFunc_copysign:
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case LibFunc_copysignf:
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continue; // ISD::FCOPYSIGN is never a library call.
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case LibFunc_copysignl:
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return true;
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case LibFunc_fabs:
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case LibFunc_fabsf:
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case LibFunc_fabsl:
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continue; // ISD::FABS is never a library call.
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case LibFunc_sqrt:
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case LibFunc_sqrtf:
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case LibFunc_sqrtl:
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Opcode = ISD::FSQRT; break;
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case LibFunc_floor:
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case LibFunc_floorf:
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case LibFunc_floorl:
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Opcode = ISD::FFLOOR; break;
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case LibFunc_nearbyint:
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case LibFunc_nearbyintf:
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case LibFunc_nearbyintl:
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Opcode = ISD::FNEARBYINT; break;
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case LibFunc_ceil:
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case LibFunc_ceilf:
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case LibFunc_ceill:
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Opcode = ISD::FCEIL; break;
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case LibFunc_rint:
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case LibFunc_rintf:
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case LibFunc_rintl:
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Opcode = ISD::FRINT; break;
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case LibFunc_round:
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case LibFunc_roundf:
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case LibFunc_roundl:
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Opcode = ISD::FROUND; break;
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case LibFunc_trunc:
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case LibFunc_truncf:
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case LibFunc_truncl:
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Opcode = ISD::FTRUNC; break;
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case LibFunc_fmin:
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case LibFunc_fminf:
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case LibFunc_fminl:
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Opcode = ISD::FMINNUM; break;
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case LibFunc_fmax:
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case LibFunc_fmaxf:
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case LibFunc_fmaxl:
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Opcode = ISD::FMAXNUM; break;
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}
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}
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if (Opcode) {
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EVT EVTy =
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TLI->getValueType(*DL, CI->getArgOperand(0)->getType(), true);
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if (EVTy == MVT::Other)
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return true;
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if (TLI->isOperationLegalOrCustom(Opcode, EVTy))
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continue;
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else if (EVTy.isVector() &&
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TLI->isOperationLegalOrCustom(Opcode, EVTy.getScalarType()))
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continue;
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return true;
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}
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}
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return true;
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} else if (isa<BinaryOperator>(J) &&
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J->getType()->getScalarType()->isPPC_FP128Ty()) {
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// Most operations on ppc_f128 values become calls.
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return true;
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} else if (isa<UIToFPInst>(J) || isa<SIToFPInst>(J) ||
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isa<FPToUIInst>(J) || isa<FPToSIInst>(J)) {
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CastInst *CI = cast<CastInst>(J);
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if (CI->getSrcTy()->getScalarType()->isPPC_FP128Ty() ||
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CI->getDestTy()->getScalarType()->isPPC_FP128Ty() ||
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isLargeIntegerTy(!TM->isPPC64(), CI->getSrcTy()->getScalarType()) ||
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isLargeIntegerTy(!TM->isPPC64(), CI->getDestTy()->getScalarType()))
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return true;
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} else if (isLargeIntegerTy(!TM->isPPC64(),
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J->getType()->getScalarType()) &&
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(J->getOpcode() == Instruction::UDiv ||
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J->getOpcode() == Instruction::SDiv ||
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J->getOpcode() == Instruction::URem ||
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J->getOpcode() == Instruction::SRem)) {
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return true;
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} else if (!TM->isPPC64() &&
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isLargeIntegerTy(false, J->getType()->getScalarType()) &&
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(J->getOpcode() == Instruction::Shl ||
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J->getOpcode() == Instruction::AShr ||
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J->getOpcode() == Instruction::LShr)) {
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// Only on PPC32, for 128-bit integers (specifically not 64-bit
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// integers), these might be runtime calls.
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return true;
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} else if (isa<IndirectBrInst>(J) || isa<InvokeInst>(J)) {
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// On PowerPC, indirect jumps use the counter register.
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return true;
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} else if (SwitchInst *SI = dyn_cast<SwitchInst>(J)) {
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if (SI->getNumCases() + 1 >= (unsigned)TLI->getMinimumJumpTableEntries())
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return true;
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}
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// FREM is always a call.
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if (J->getOpcode() == Instruction::FRem)
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return true;
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if (STI->useSoftFloat()) {
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switch(J->getOpcode()) {
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case Instruction::FAdd:
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case Instruction::FSub:
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case Instruction::FMul:
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case Instruction::FDiv:
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case Instruction::FPTrunc:
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case Instruction::FPExt:
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case Instruction::FPToUI:
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case Instruction::FPToSI:
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case Instruction::UIToFP:
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case Instruction::SIToFP:
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case Instruction::FCmp:
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return true;
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}
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}
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for (Value *Operand : J->operands())
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if (memAddrUsesCTR(*TM, Operand))
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return true;
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}
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return false;
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}
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bool PPCCTRLoops::convertToCTRLoop(Loop *L) {
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bool MadeChange = false;
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// Do not convert small short loops to CTR loop.
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|
unsigned ConstTripCount = SE->getSmallConstantTripCount(L);
|
|
if (ConstTripCount && ConstTripCount < SmallCTRLoopThreshold) {
|
|
SmallPtrSet<const Value *, 32> EphValues;
|
|
auto AC = getAnalysis<AssumptionCacheTracker>().getAssumptionCache(
|
|
*L->getHeader()->getParent());
|
|
CodeMetrics::collectEphemeralValues(L, &AC, EphValues);
|
|
CodeMetrics Metrics;
|
|
for (BasicBlock *BB : L->blocks())
|
|
Metrics.analyzeBasicBlock(BB, *TTI, EphValues);
|
|
// 6 is an approximate latency for the mtctr instruction.
|
|
if (Metrics.NumInsts <= (6 * SchedModel.getIssueWidth()))
|
|
return false;
|
|
}
|
|
|
|
// Process nested loops first.
|
|
for (Loop::iterator I = L->begin(), E = L->end(); I != E; ++I) {
|
|
MadeChange |= convertToCTRLoop(*I);
|
|
DEBUG(dbgs() << "Nested loop converted\n");
|
|
}
|
|
|
|
// If a nested loop has been converted, then we can't convert this loop.
|
|
if (MadeChange)
|
|
return MadeChange;
|
|
|
|
#ifndef NDEBUG
|
|
// Stop trying after reaching the limit (if any).
|
|
int Limit = CTRLoopLimit;
|
|
if (Limit >= 0) {
|
|
if (Counter >= CTRLoopLimit)
|
|
return false;
|
|
Counter++;
|
|
}
|
|
#endif
|
|
|
|
// We don't want to spill/restore the counter register, and so we don't
|
|
// want to use the counter register if the loop contains calls.
|
|
for (Loop::block_iterator I = L->block_begin(), IE = L->block_end();
|
|
I != IE; ++I)
|
|
if (mightUseCTR(*I))
|
|
return MadeChange;
|
|
|
|
SmallVector<BasicBlock*, 4> ExitingBlocks;
|
|
L->getExitingBlocks(ExitingBlocks);
|
|
|
|
// If there is an exit edge known to be frequently taken,
|
|
// we should not transform this loop.
|
|
for (auto &BB : ExitingBlocks) {
|
|
Instruction *TI = BB->getTerminator();
|
|
if (!TI) continue;
|
|
|
|
if (BranchInst *BI = dyn_cast<BranchInst>(TI)) {
|
|
uint64_t TrueWeight = 0, FalseWeight = 0;
|
|
if (!BI->isConditional() ||
|
|
!BI->extractProfMetadata(TrueWeight, FalseWeight))
|
|
continue;
|
|
|
|
// If the exit path is more frequent than the loop path,
|
|
// we return here without further analysis for this loop.
|
|
bool TrueIsExit = !L->contains(BI->getSuccessor(0));
|
|
if (( TrueIsExit && FalseWeight < TrueWeight) ||
|
|
(!TrueIsExit && FalseWeight > TrueWeight))
|
|
return MadeChange;
|
|
}
|
|
}
|
|
|
|
BasicBlock *CountedExitBlock = nullptr;
|
|
const SCEV *ExitCount = nullptr;
|
|
BranchInst *CountedExitBranch = nullptr;
|
|
for (SmallVectorImpl<BasicBlock *>::iterator I = ExitingBlocks.begin(),
|
|
IE = ExitingBlocks.end(); I != IE; ++I) {
|
|
const SCEV *EC = SE->getExitCount(L, *I);
|
|
DEBUG(dbgs() << "Exit Count for " << *L << " from block " <<
|
|
(*I)->getName() << ": " << *EC << "\n");
|
|
if (isa<SCEVCouldNotCompute>(EC))
|
|
continue;
|
|
if (const SCEVConstant *ConstEC = dyn_cast<SCEVConstant>(EC)) {
|
|
if (ConstEC->getValue()->isZero())
|
|
continue;
|
|
} else if (!SE->isLoopInvariant(EC, L))
|
|
continue;
|
|
|
|
if (SE->getTypeSizeInBits(EC->getType()) > (TM->isPPC64() ? 64 : 32))
|
|
continue;
|
|
|
|
// We now have a loop-invariant count of loop iterations (which is not the
|
|
// constant zero) for which we know that this loop will not exit via this
|
|
// exisiting block.
|
|
|
|
// We need to make sure that this block will run on every loop iteration.
|
|
// For this to be true, we must dominate all blocks with backedges. Such
|
|
// blocks are in-loop predecessors to the header block.
|
|
bool NotAlways = false;
|
|
for (pred_iterator PI = pred_begin(L->getHeader()),
|
|
PIE = pred_end(L->getHeader()); PI != PIE; ++PI) {
|
|
if (!L->contains(*PI))
|
|
continue;
|
|
|
|
if (!DT->dominates(*I, *PI)) {
|
|
NotAlways = true;
|
|
break;
|
|
}
|
|
}
|
|
|
|
if (NotAlways)
|
|
continue;
|
|
|
|
// Make sure this blocks ends with a conditional branch.
|
|
Instruction *TI = (*I)->getTerminator();
|
|
if (!TI)
|
|
continue;
|
|
|
|
if (BranchInst *BI = dyn_cast<BranchInst>(TI)) {
|
|
if (!BI->isConditional())
|
|
continue;
|
|
|
|
CountedExitBranch = BI;
|
|
} else
|
|
continue;
|
|
|
|
// Note that this block may not be the loop latch block, even if the loop
|
|
// has a latch block.
|
|
CountedExitBlock = *I;
|
|
ExitCount = EC;
|
|
break;
|
|
}
|
|
|
|
if (!CountedExitBlock)
|
|
return MadeChange;
|
|
|
|
BasicBlock *Preheader = L->getLoopPreheader();
|
|
|
|
// If we don't have a preheader, then insert one. If we already have a
|
|
// preheader, then we can use it (except if the preheader contains a use of
|
|
// the CTR register because some such uses might be reordered by the
|
|
// selection DAG after the mtctr instruction).
|
|
if (!Preheader || mightUseCTR(Preheader))
|
|
Preheader = InsertPreheaderForLoop(L, DT, LI, PreserveLCSSA);
|
|
if (!Preheader)
|
|
return MadeChange;
|
|
|
|
DEBUG(dbgs() << "Preheader for exit count: " << Preheader->getName() << "\n");
|
|
|
|
// Insert the count into the preheader and replace the condition used by the
|
|
// selected branch.
|
|
MadeChange = true;
|
|
|
|
SCEVExpander SCEVE(*SE, *DL, "loopcnt");
|
|
LLVMContext &C = SE->getContext();
|
|
Type *CountType = TM->isPPC64() ? Type::getInt64Ty(C) : Type::getInt32Ty(C);
|
|
if (!ExitCount->getType()->isPointerTy() &&
|
|
ExitCount->getType() != CountType)
|
|
ExitCount = SE->getZeroExtendExpr(ExitCount, CountType);
|
|
ExitCount = SE->getAddExpr(ExitCount, SE->getOne(CountType));
|
|
Value *ECValue =
|
|
SCEVE.expandCodeFor(ExitCount, CountType, Preheader->getTerminator());
|
|
|
|
IRBuilder<> CountBuilder(Preheader->getTerminator());
|
|
Module *M = Preheader->getParent()->getParent();
|
|
Value *MTCTRFunc = Intrinsic::getDeclaration(M, Intrinsic::ppc_mtctr,
|
|
CountType);
|
|
CountBuilder.CreateCall(MTCTRFunc, ECValue);
|
|
|
|
IRBuilder<> CondBuilder(CountedExitBranch);
|
|
Value *DecFunc =
|
|
Intrinsic::getDeclaration(M, Intrinsic::ppc_is_decremented_ctr_nonzero);
|
|
Value *NewCond = CondBuilder.CreateCall(DecFunc, {});
|
|
Value *OldCond = CountedExitBranch->getCondition();
|
|
CountedExitBranch->setCondition(NewCond);
|
|
|
|
// The false branch must exit the loop.
|
|
if (!L->contains(CountedExitBranch->getSuccessor(0)))
|
|
CountedExitBranch->swapSuccessors();
|
|
|
|
// The old condition may be dead now, and may have even created a dead PHI
|
|
// (the original induction variable).
|
|
RecursivelyDeleteTriviallyDeadInstructions(OldCond);
|
|
// Run through the basic blocks of the loop and see if any of them have dead
|
|
// PHIs that can be removed.
|
|
for (auto I : L->blocks())
|
|
DeleteDeadPHIs(I);
|
|
|
|
++NumCTRLoops;
|
|
return MadeChange;
|
|
}
|
|
|
|
#ifndef NDEBUG
|
|
static bool clobbersCTR(const MachineInstr &MI) {
|
|
for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
|
|
const MachineOperand &MO = MI.getOperand(i);
|
|
if (MO.isReg()) {
|
|
if (MO.isDef() && (MO.getReg() == PPC::CTR || MO.getReg() == PPC::CTR8))
|
|
return true;
|
|
} else if (MO.isRegMask()) {
|
|
if (MO.clobbersPhysReg(PPC::CTR) || MO.clobbersPhysReg(PPC::CTR8))
|
|
return true;
|
|
}
|
|
}
|
|
|
|
return false;
|
|
}
|
|
|
|
static bool verifyCTRBranch(MachineBasicBlock *MBB,
|
|
MachineBasicBlock::iterator I) {
|
|
MachineBasicBlock::iterator BI = I;
|
|
SmallSet<MachineBasicBlock *, 16> Visited;
|
|
SmallVector<MachineBasicBlock *, 8> Preds;
|
|
bool CheckPreds;
|
|
|
|
if (I == MBB->begin()) {
|
|
Visited.insert(MBB);
|
|
goto queue_preds;
|
|
} else
|
|
--I;
|
|
|
|
check_block:
|
|
Visited.insert(MBB);
|
|
if (I == MBB->end())
|
|
goto queue_preds;
|
|
|
|
CheckPreds = true;
|
|
for (MachineBasicBlock::iterator IE = MBB->begin();; --I) {
|
|
unsigned Opc = I->getOpcode();
|
|
if (Opc == PPC::MTCTRloop || Opc == PPC::MTCTR8loop) {
|
|
CheckPreds = false;
|
|
break;
|
|
}
|
|
|
|
if (I != BI && clobbersCTR(*I)) {
|
|
DEBUG(dbgs() << printMBBReference(*MBB) << " (" << MBB->getFullName()
|
|
<< ") instruction " << *I << " clobbers CTR, invalidating "
|
|
<< printMBBReference(*BI->getParent()) << " ("
|
|
<< BI->getParent()->getFullName() << ") instruction " << *BI
|
|
<< "\n");
|
|
return false;
|
|
}
|
|
|
|
if (I == IE)
|
|
break;
|
|
}
|
|
|
|
if (!CheckPreds && Preds.empty())
|
|
return true;
|
|
|
|
if (CheckPreds) {
|
|
queue_preds:
|
|
if (MachineFunction::iterator(MBB) == MBB->getParent()->begin()) {
|
|
DEBUG(dbgs() << "Unable to find a MTCTR instruction for "
|
|
<< printMBBReference(*BI->getParent()) << " ("
|
|
<< BI->getParent()->getFullName() << ") instruction " << *BI
|
|
<< "\n");
|
|
return false;
|
|
}
|
|
|
|
for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
|
|
PIE = MBB->pred_end(); PI != PIE; ++PI)
|
|
Preds.push_back(*PI);
|
|
}
|
|
|
|
do {
|
|
MBB = Preds.pop_back_val();
|
|
if (!Visited.count(MBB)) {
|
|
I = MBB->getLastNonDebugInstr();
|
|
goto check_block;
|
|
}
|
|
} while (!Preds.empty());
|
|
|
|
return true;
|
|
}
|
|
|
|
bool PPCCTRLoopsVerify::runOnMachineFunction(MachineFunction &MF) {
|
|
MDT = &getAnalysis<MachineDominatorTree>();
|
|
|
|
// Verify that all bdnz/bdz instructions are dominated by a loop mtctr before
|
|
// any other instructions that might clobber the ctr register.
|
|
for (MachineFunction::iterator I = MF.begin(), IE = MF.end();
|
|
I != IE; ++I) {
|
|
MachineBasicBlock *MBB = &*I;
|
|
if (!MDT->isReachableFromEntry(MBB))
|
|
continue;
|
|
|
|
for (MachineBasicBlock::iterator MII = MBB->getFirstTerminator(),
|
|
MIIE = MBB->end(); MII != MIIE; ++MII) {
|
|
unsigned Opc = MII->getOpcode();
|
|
if (Opc == PPC::BDNZ8 || Opc == PPC::BDNZ ||
|
|
Opc == PPC::BDZ8 || Opc == PPC::BDZ)
|
|
if (!verifyCTRBranch(MBB, MII))
|
|
llvm_unreachable("Invalid PPC CTR loop!");
|
|
}
|
|
}
|
|
|
|
return false;
|
|
}
|
|
#endif // NDEBUG
|