..
AArch64
[AArch64][SVE] Asm: Support for SEL (vector/predicate) instructions.
2018-06-17 10:11:04 +00:00
AMDGPU
[AMDGPU][MC] Enabled parsing of relocations on VALU instructions
2018-06-13 17:02:03 +00:00
ARM
Fix the test case that places intermediate in source directory.
2018-06-06 18:53:17 +00:00
AVR
[AVR] Implement some missing code paths
2017-12-11 11:01:27 +00:00
AsmParser
[MC] Add assembler support for .cg_profile.
2018-06-02 16:33:01 +00:00
BPF
bpf: New disassembler testcases for 32-bit subregister support
2018-02-23 23:49:35 +00:00
COFF
[CodeView] Add prefix to CodeView registers.
2018-05-29 14:35:34 +00:00
Disassembler
[X86] Properly disassemble gather/scatter instructions where xmm4/ymm4/zmm4 are used as the index.
2018-06-06 19:15:15 +00:00
ELF
[DWARFv5] Tolerate files not all having an MD5 checksum.
2018-06-14 13:38:20 +00:00
Hexagon
[Hexagon] Use addAliasForDirective for data directives
2018-05-17 13:21:18 +00:00
Lanai
…
MachO
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
Mips
[mips] Guard some floating point instructions correctly
2018-06-12 10:28:06 +00:00
PowerPC
[PowerPC] Add support for high and higha symbol modifiers on tls modifers.
2018-06-15 19:47:16 +00:00
RISCV
[RISCV] Implement MC layer support for the fence.tso instruction
2018-06-08 10:39:05 +00:00
Sparc
[Sparc] Add support for 13-bit PIC
2018-06-11 05:50:08 +00:00
SystemZ
[SystemZ, AsmParser] Enable the mnemonic spell corrector.
2017-07-18 09:17:00 +00:00
WebAssembly
[WebAssembly] Ignore explicit section names for functions
2018-06-14 18:48:19 +00:00
X86
[X86] Add encoding tests for avx5124fmaps and avx5124vnni instructions.
2018-06-11 06:22:41 +00:00