forked from OSchip/llvm-project
![]() More efficient implementation of the multiply-reduce pair, no need to add in a zero vector. Microbenchmarking on AVX2 yields the following difference in vector.contract speedup (over strict-order scalar reduction). SPEEDUP SIMD-fma SIMD-mul 4x4 1.45 2.00 8x8 1.40 1.90 32x32 5.32 5.80 Reviewed By: ftynse Differential Revision: https://reviews.llvm.org/D82833 |
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cmake/modules | ||
docs | ||
examples | ||
include | ||
integration_test | ||
lib | ||
test | ||
tools | ||
unittests | ||
utils | ||
.clang-format | ||
.clang-tidy | ||
CMakeLists.txt | ||
LICENSE.TXT | ||
README.md |
README.md
Multi-Level Intermediate Representation
See https://mlir.llvm.org/ for more information.