forked from OSchip/llvm-project
325 lines
11 KiB
LLVM
325 lines
11 KiB
LLVM
; RUN: opt < %s -passes='print<loopnest>' -disable-output 2>&1 | FileCheck %s
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; Test a perfect 2-dim loop nest of the form:
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; for(i=0; i<nx; ++i)
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; for(j=0; j<nx; ++j)
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; y[i][j] = x[i][j];
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define void @perf_nest_2D_1(i32** %y, i32** %x, i64 signext %nx, i64 signext %ny) {
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; CHECK-LABEL: IsPerfect=true, Depth=1, OutermostLoop: perf_nest_2D_1_loop_j, Loops: ( perf_nest_2D_1_loop_j )
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; CHECK-LABEL: IsPerfect=true, Depth=2, OutermostLoop: perf_nest_2D_1_loop_i, Loops: ( perf_nest_2D_1_loop_i perf_nest_2D_1_loop_j )
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entry:
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br label %perf_nest_2D_1_loop_i
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perf_nest_2D_1_loop_i:
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%i = phi i64 [ 0, %entry ], [ %inc13, %inc_i ]
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%cmp21 = icmp slt i64 0, %ny
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br i1 %cmp21, label %perf_nest_2D_1_loop_j, label %inc_i
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perf_nest_2D_1_loop_j:
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%j = phi i64 [ 0, %perf_nest_2D_1_loop_i ], [ %inc, %inc_j ]
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%arrayidx = getelementptr inbounds i32*, i32** %x, i64 %j
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%0 = load i32*, i32** %arrayidx, align 8
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%arrayidx6 = getelementptr inbounds i32, i32* %0, i64 %j
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%1 = load i32, i32* %arrayidx6, align 4
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%arrayidx8 = getelementptr inbounds i32*, i32** %y, i64 %j
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%2 = load i32*, i32** %arrayidx8, align 8
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%arrayidx11 = getelementptr inbounds i32, i32* %2, i64 %i
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store i32 %1, i32* %arrayidx11, align 4
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br label %inc_j
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inc_j:
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%inc = add nsw i64 %j, 1
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%cmp2 = icmp slt i64 %inc, %ny
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br i1 %cmp2, label %perf_nest_2D_1_loop_j, label %inc_i
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inc_i:
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%inc13 = add nsw i64 %i, 1
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%cmp = icmp slt i64 %inc13, %nx
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br i1 %cmp, label %perf_nest_2D_1_loop_i, label %perf_nest_2D_1_loop_i_end
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perf_nest_2D_1_loop_i_end:
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ret void
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}
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; Test a perfect 2-dim loop nest of the form:
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; for (i=0; i<100; ++i)
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; for (j=0; j<100; ++j)
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; y[i][j] = x[i][j];
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define void @perf_nest_2D_2(i32** %y, i32** %x) {
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; CHECK-LABEL: IsPerfect=true, Depth=1, OutermostLoop: perf_nest_2D_2_loop_j, Loops: ( perf_nest_2D_2_loop_j )
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; CHECK-LABEL: IsPerfect=true, Depth=2, OutermostLoop: perf_nest_2D_2_loop_i, Loops: ( perf_nest_2D_2_loop_i perf_nest_2D_2_loop_j )
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entry:
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br label %perf_nest_2D_2_loop_i
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perf_nest_2D_2_loop_i:
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%i = phi i64 [ 0, %entry ], [ %inc13, %inc_i ]
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br label %perf_nest_2D_2_loop_j
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perf_nest_2D_2_loop_j:
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%j = phi i64 [ 0, %perf_nest_2D_2_loop_i ], [ %inc, %inc_j ]
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%arrayidx = getelementptr inbounds i32*, i32** %x, i64 %j
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%0 = load i32*, i32** %arrayidx, align 8
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%arrayidx6 = getelementptr inbounds i32, i32* %0, i64 %j
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%1 = load i32, i32* %arrayidx6, align 4
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%arrayidx8 = getelementptr inbounds i32*, i32** %y, i64 %j
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%2 = load i32*, i32** %arrayidx8, align 8
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%arrayidx11 = getelementptr inbounds i32, i32* %2, i64 %i
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store i32 %1, i32* %arrayidx11, align 4
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br label %inc_j
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inc_j:
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%inc = add nsw i64 %j, 1
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%cmp2 = icmp slt i64 %inc, 100
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br i1 %cmp2, label %perf_nest_2D_2_loop_j, label %loop_j_end
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loop_j_end:
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br label %inc_i
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inc_i:
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%inc13 = add nsw i64 %i, 1
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%cmp = icmp slt i64 %inc13, 100
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br i1 %cmp, label %perf_nest_2D_2_loop_i, label %perf_nest_2D_2_loop_i_end
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perf_nest_2D_2_loop_i_end:
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ret void
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}
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define void @perf_nest_2D_3(i32** %y, i32** %x, i64 signext %nx, i64 signext %ny) {
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; CHECK-LABEL: IsPerfect=true, Depth=1, OutermostLoop: perf_nest_2D_3_loop_j, Loops: ( perf_nest_2D_3_loop_j )
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; CHECK-LABEL: IsPerfect=true, Depth=2, OutermostLoop: perf_nest_2D_3_loop_i, Loops: ( perf_nest_2D_3_loop_i perf_nest_2D_3_loop_j )
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entry:
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br label %perf_nest_2D_3_loop_i
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perf_nest_2D_3_loop_i:
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%i = phi i64 [ 0, %entry ], [ %inc13, %inc_i ]
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%cmp21 = icmp slt i64 0, %ny
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br label %singleSucc
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singleSucc:
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br i1 %cmp21, label %preheader.j, label %for.end
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preheader.j:
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br label %perf_nest_2D_3_loop_j
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perf_nest_2D_3_loop_j:
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%j = phi i64 [ 0, %preheader.j ], [ %inc, %inc_j ]
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%arrayidx = getelementptr inbounds i32*, i32** %x, i64 %j
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%0 = load i32*, i32** %arrayidx, align 8
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%arrayidx6 = getelementptr inbounds i32, i32* %0, i64 %j
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%1 = load i32, i32* %arrayidx6, align 4
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%arrayidx8 = getelementptr inbounds i32*, i32** %y, i64 %j
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%2 = load i32*, i32** %arrayidx8, align 8
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%arrayidx11 = getelementptr inbounds i32, i32* %2, i64 %i
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store i32 %1, i32* %arrayidx11, align 4
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br label %inc_j
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inc_j:
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%inc = add nsw i64 %j, 1
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%cmp2 = icmp slt i64 %inc, %ny
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br i1 %cmp2, label %perf_nest_2D_3_loop_j, label %for.exit
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for.exit:
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br label %for.end
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for.end:
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br label %inc_i
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inc_i:
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%inc13 = add nsw i64 %i, 1
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%cmp = icmp slt i64 %inc13, %nx
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br i1 %cmp, label %perf_nest_2D_3_loop_i, label %perf_nest_2D_3_loop_i_end
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perf_nest_2D_3_loop_i_end:
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ret void
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}
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; Test a perfect 3-dim loop nest of the form:
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; for (i=0; i<nx; ++i)
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; for (j=0; j<ny; ++j)
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; for (k=0; j<nk; ++k)
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; y[j][j][k] = x[i][j][k];
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;
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define void @perf_nest_3D_1(i32*** %y, i32*** %x, i32 signext %nx, i32 signext %ny, i32 signext %nk) {
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; CHECK-LABEL: IsPerfect=true, Depth=1, OutermostLoop: perf_nest_3D_1_loop_k, Loops: ( perf_nest_3D_1_loop_k )
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; CHECK-NEXT: IsPerfect=true, Depth=2, OutermostLoop: perf_nest_3D_1_loop_j, Loops: ( perf_nest_3D_1_loop_j perf_nest_3D_1_loop_k )
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; CHECK-NEXT: IsPerfect=true, Depth=3, OutermostLoop: perf_nest_3D_1_loop_i, Loops: ( perf_nest_3D_1_loop_i perf_nest_3D_1_loop_j perf_nest_3D_1_loop_k )
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entry:
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br label %perf_nest_3D_1_loop_i
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perf_nest_3D_1_loop_i:
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%i = phi i32 [ 0, %entry ], [ %inci, %for.inci ]
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%cmp21 = icmp slt i32 0, %ny
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br i1 %cmp21, label %perf_nest_3D_1_loop_j, label %for.inci
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perf_nest_3D_1_loop_j:
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%j = phi i32 [ 0, %perf_nest_3D_1_loop_i ], [ %incj, %for.incj ]
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%cmp22 = icmp slt i32 0, %nk
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br i1 %cmp22, label %perf_nest_3D_1_loop_k, label %for.incj
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perf_nest_3D_1_loop_k:
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%k = phi i32 [ 0, %perf_nest_3D_1_loop_j ], [ %inck, %for.inck ]
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%idxprom = sext i32 %i to i64
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%arrayidx = getelementptr inbounds i32**, i32*** %x, i64 %idxprom
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%0 = load i32**, i32*** %arrayidx, align 8
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%idxprom7 = sext i32 %j to i64
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%arrayidx8 = getelementptr inbounds i32*, i32** %0, i64 %idxprom7
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%1 = load i32*, i32** %arrayidx8, align 8
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%idxprom9 = sext i32 %k to i64
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%arrayidx10 = getelementptr inbounds i32, i32* %1, i64 %idxprom9
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%2 = load i32, i32* %arrayidx10, align 4
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%idxprom11 = sext i32 %j to i64
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%arrayidx12 = getelementptr inbounds i32**, i32*** %y, i64 %idxprom11
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%3 = load i32**, i32*** %arrayidx12, align 8
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%idxprom13 = sext i32 %j to i64
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%arrayidx14 = getelementptr inbounds i32*, i32** %3, i64 %idxprom13
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%4 = load i32*, i32** %arrayidx14, align 8
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%idxprom15 = sext i32 %k to i64
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%arrayidx16 = getelementptr inbounds i32, i32* %4, i64 %idxprom15
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store i32 %2, i32* %arrayidx16, align 4
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br label %for.inck
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for.inck:
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%inck = add nsw i32 %k, 1
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%cmp5 = icmp slt i32 %inck, %nk
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br i1 %cmp5, label %perf_nest_3D_1_loop_k, label %for.incj
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for.incj:
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%incj = add nsw i32 %j, 1
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%cmp2 = icmp slt i32 %incj, %ny
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br i1 %cmp2, label %perf_nest_3D_1_loop_j, label %for.inci
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for.inci:
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%inci = add nsw i32 %i, 1
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%cmp = icmp slt i32 %inci, %nx
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br i1 %cmp, label %perf_nest_3D_1_loop_i, label %perf_nest_3D_1_loop_i_end
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perf_nest_3D_1_loop_i_end:
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ret void
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}
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; Test a perfect 3-dim loop nest of the form:
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; for (i=0; i<100; ++i)
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; for (j=0; j<100; ++j)
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; for (k=0; j<100; ++k)
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; y[j][j][k] = x[i][j][k];
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;
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define void @perf_nest_3D_2(i32*** %y, i32*** %x) {
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; CHECK-LABEL: IsPerfect=true, Depth=1, OutermostLoop: perf_nest_3D_2_loop_k, Loops: ( perf_nest_3D_2_loop_k )
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; CHECK-NEXT: IsPerfect=true, Depth=2, OutermostLoop: perf_nest_3D_2_loop_j, Loops: ( perf_nest_3D_2_loop_j perf_nest_3D_2_loop_k )
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; CHECK-NEXT: IsPerfect=true, Depth=3, OutermostLoop: perf_nest_3D_2_loop_i, Loops: ( perf_nest_3D_2_loop_i perf_nest_3D_2_loop_j perf_nest_3D_2_loop_k )
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entry:
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br label %perf_nest_3D_2_loop_i
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perf_nest_3D_2_loop_i:
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%i = phi i32 [ 0, %entry ], [ %inci, %for.inci ]
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br label %perf_nest_3D_2_loop_j
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perf_nest_3D_2_loop_j:
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%j = phi i32 [ 0, %perf_nest_3D_2_loop_i ], [ %incj, %for.incj ]
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br label %perf_nest_3D_2_loop_k
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perf_nest_3D_2_loop_k:
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%k = phi i32 [ 0, %perf_nest_3D_2_loop_j ], [ %inck, %for.inck ]
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%idxprom = sext i32 %i to i64
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%arrayidx = getelementptr inbounds i32**, i32*** %x, i64 %idxprom
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%0 = load i32**, i32*** %arrayidx, align 8
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%idxprom7 = sext i32 %j to i64
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%arrayidx8 = getelementptr inbounds i32*, i32** %0, i64 %idxprom7
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%1 = load i32*, i32** %arrayidx8, align 8
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%idxprom9 = sext i32 %k to i64
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%arrayidx10 = getelementptr inbounds i32, i32* %1, i64 %idxprom9
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%2 = load i32, i32* %arrayidx10, align 4
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%idxprom11 = sext i32 %j to i64
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%arrayidx12 = getelementptr inbounds i32**, i32*** %y, i64 %idxprom11
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%3 = load i32**, i32*** %arrayidx12, align 8
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%idxprom13 = sext i32 %j to i64
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%arrayidx14 = getelementptr inbounds i32*, i32** %3, i64 %idxprom13
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%4 = load i32*, i32** %arrayidx14, align 8
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%idxprom15 = sext i32 %k to i64
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%arrayidx16 = getelementptr inbounds i32, i32* %4, i64 %idxprom15
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store i32 %2, i32* %arrayidx16, align 4
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br label %for.inck
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for.inck:
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%inck = add nsw i32 %k, 1
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%cmp5 = icmp slt i32 %inck, 100
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br i1 %cmp5, label %perf_nest_3D_2_loop_k, label %loop_k_end
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loop_k_end:
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br label %for.incj
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for.incj:
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%incj = add nsw i32 %j, 1
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%cmp2 = icmp slt i32 %incj, 100
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br i1 %cmp2, label %perf_nest_3D_2_loop_j, label %loop_j_end
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loop_j_end:
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br label %for.inci
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for.inci:
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%inci = add nsw i32 %i, 1
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%cmp = icmp slt i32 %inci, 100
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br i1 %cmp, label %perf_nest_3D_2_loop_i, label %perf_nest_3D_2_loop_i_end
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perf_nest_3D_2_loop_i_end:
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ret void
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}
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; Test a perfect loop nest with a live out reduction:
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; for (i = 0; i<ni; ++i)
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; if (0<nj) { // guard branch for the j-loop
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; for (j=0; j<nj; j+=1)
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; x+=(i+j);
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; }
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; return x;
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define signext i32 @perf_nest_live_out(i32 signext %x, i32 signext %ni, i32 signext %nj) {
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; CHECK-LABEL: IsPerfect=true, Depth=1, OutermostLoop: perf_nest_live_out_loop_j, Loops: ( perf_nest_live_out_loop_j )
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; CHECK-LABEL: IsPerfect=true, Depth=2, OutermostLoop: perf_nest_live_out_loop_i, Loops: ( perf_nest_live_out_loop_i perf_nest_live_out_loop_j )
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entry:
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%cmp4 = icmp slt i32 0, %ni
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br i1 %cmp4, label %perf_nest_live_out_loop_i.lr.ph, label %for.end7
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perf_nest_live_out_loop_i.lr.ph:
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br label %perf_nest_live_out_loop_i
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perf_nest_live_out_loop_i:
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%x.addr.06 = phi i32 [ %x, %perf_nest_live_out_loop_i.lr.ph ], [ %x.addr.1.lcssa, %for.inc5 ]
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%i.05 = phi i32 [ 0, %perf_nest_live_out_loop_i.lr.ph ], [ %inc6, %for.inc5 ]
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%cmp21 = icmp slt i32 0, %nj
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br i1 %cmp21, label %perf_nest_live_out_loop_j.lr.ph, label %for.inc5
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perf_nest_live_out_loop_j.lr.ph:
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br label %perf_nest_live_out_loop_j
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perf_nest_live_out_loop_j:
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%x.addr.13 = phi i32 [ %x.addr.06, %perf_nest_live_out_loop_j.lr.ph ], [ %add4, %perf_nest_live_out_loop_j ]
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%j.02 = phi i32 [ 0, %perf_nest_live_out_loop_j.lr.ph ], [ %inc, %perf_nest_live_out_loop_j ]
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%add = add nsw i32 %i.05, %j.02
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%add4 = add nsw i32 %x.addr.13, %add
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%inc = add nsw i32 %j.02, 1
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%cmp2 = icmp slt i32 %inc, %nj
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br i1 %cmp2, label %perf_nest_live_out_loop_j, label %for.cond1.for.inc5_crit_edge
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for.cond1.for.inc5_crit_edge:
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%split = phi i32 [ %add4, %perf_nest_live_out_loop_j ]
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br label %for.inc5
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for.inc5:
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%x.addr.1.lcssa = phi i32 [ %split, %for.cond1.for.inc5_crit_edge ], [ %x.addr.06, %perf_nest_live_out_loop_i ]
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%inc6 = add nsw i32 %i.05, 1
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%cmp = icmp slt i32 %inc6, %ni
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br i1 %cmp, label %perf_nest_live_out_loop_i, label %for.cond.for.end7_crit_edge
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for.cond.for.end7_crit_edge:
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%split7 = phi i32 [ %x.addr.1.lcssa, %for.inc5 ]
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br label %for.end7
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for.end7:
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%x.addr.0.lcssa = phi i32 [ %split7, %for.cond.for.end7_crit_edge ], [ %x, %entry ]
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ret i32 %x.addr.0.lcssa
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}
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