forked from OSchip/llvm-project
163 lines
3.8 KiB
YAML
163 lines
3.8 KiB
YAML
# RUN: llc -mtriple=i386-linux-gnu -global-isel -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X32
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# RUN: llc -mtriple=x86_64-linux-gnu -global-isel -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X64
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--- |
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define i32 @test_zext_i1(i1 %a) {
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%r = zext i1 %a to i32
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ret i32 %r
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}
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define i32 @test_zext_i8(i8 %val) {
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%r = zext i8 %val to i32
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ret i32 %r
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}
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define i32 @test_zext_i16(i16 %val) {
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%r = zext i16 %val to i32
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ret i32 %r
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}
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define i32 @test_sext_i8(i8 %val) {
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%r = sext i8 %val to i32
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ret i32 %r
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}
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define i32 @test_sext_i16(i16 %val) {
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%r = sext i16 %val to i32
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ret i32 %r
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}
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...
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---
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name: test_zext_i1
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# ALL-LABEL: name: test_zext_i1
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alignment: 4
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legalized: true
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regBankSelected: true
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# ALL: registers:
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# ALL-NEXT: - { id: 0, class: gr8 }
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# ALL-NEXT: - { id: 1, class: gr32 }
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# ALL-NEXT: - { id: 2, class: gr32 }
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registers:
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- { id: 0, class: gpr }
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- { id: 1, class: gpr }
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# ALL: %0 = COPY %dil
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# ALL-NEXT: %2 = SUBREG_TO_REG 0, %0, 1
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# ALL-NEXT: %1 = AND32ri8 %2, 1, implicit-def %eflags
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# ALL-NEXT: %eax = COPY %1
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# ALL-NEXT: RET 0, implicit %eax
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body: |
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bb.1 (%ir-block.0):
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liveins: %edi
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%0(s1) = COPY %edi
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%1(s32) = G_ZEXT %0(s1)
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%eax = COPY %1(s32)
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RET 0, implicit %eax
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...
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---
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name: test_zext_i8
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# ALL-LABEL: name: test_zext_i8
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alignment: 4
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legalized: true
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regBankSelected: true
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# ALL: registers:
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# ALL-NEXT: - { id: 0, class: gr8 }
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# ALL-NEXT: - { id: 1, class: gr32 }
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registers:
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- { id: 0, class: gpr }
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- { id: 1, class: gpr }
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# ALL: %0 = COPY %dil
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# ALL-NEXT: %1 = MOVZX32rr8 %0
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# ALL-NEXT: %eax = COPY %1
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# ALL-NEXT: RET 0, implicit %eax
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body: |
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bb.1 (%ir-block.0):
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liveins: %edi
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%0(s8) = COPY %edi
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%1(s32) = G_ZEXT %0(s8)
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%eax = COPY %1(s32)
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RET 0, implicit %eax
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...
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---
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name: test_zext_i16
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# ALL-LABEL: name: test_zext_i16
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alignment: 4
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legalized: true
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regBankSelected: true
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# ALL: registers:
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# ALL-NEXT: - { id: 0, class: gr16 }
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# ALL-NEXT: - { id: 1, class: gr32 }
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registers:
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- { id: 0, class: gpr }
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- { id: 1, class: gpr }
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# ALL: %0 = COPY %di
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# ALL-NEXT: %1 = MOVZX32rr16 %0
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# ALL-NEXT: %eax = COPY %1
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# ALL-NEXT: RET 0, implicit %eax
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body: |
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bb.1 (%ir-block.0):
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liveins: %edi
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%0(s16) = COPY %edi
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%1(s32) = G_ZEXT %0(s16)
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%eax = COPY %1(s32)
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RET 0, implicit %eax
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...
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---
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name: test_sext_i8
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# ALL-LABEL: name: test_sext_i8
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alignment: 4
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legalized: true
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regBankSelected: true
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# ALL: registers:
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# ALL-NEXT: - { id: 0, class: gr8 }
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# ALL-NEXT: - { id: 1, class: gr32 }
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registers:
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- { id: 0, class: gpr }
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- { id: 1, class: gpr }
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# ALL: %0 = COPY %dil
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# ALL-NEXT: %1 = MOVSX32rr8 %0
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# ALL-NEXT: %eax = COPY %1
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# ALL-NEXT: RET 0, implicit %eax
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body: |
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bb.1 (%ir-block.0):
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liveins: %edi
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%0(s8) = COPY %edi
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%1(s32) = G_SEXT %0(s8)
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%eax = COPY %1(s32)
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RET 0, implicit %eax
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...
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---
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name: test_sext_i16
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# ALL-LABEL: name: test_sext_i16
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alignment: 4
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legalized: true
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regBankSelected: true
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# ALL: registers:
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# ALL-NEXT: - { id: 0, class: gr16 }
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# ALL-NEXT: - { id: 1, class: gr32 }
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registers:
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- { id: 0, class: gpr }
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- { id: 1, class: gpr }
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# ALL: %0 = COPY %di
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# ALL-NEXT: %1 = MOVSX32rr16 %0
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# ALL-NEXT: %eax = COPY %1
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# ALL-NEXT: RET 0, implicit %eax
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body: |
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bb.1 (%ir-block.0):
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liveins: %edi
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%0(s16) = COPY %edi
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%1(s32) = G_SEXT %0(s16)
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%eax = COPY %1(s32)
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RET 0, implicit %eax
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...
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