forked from OSchip/llvm-project
64 lines
1.9 KiB
YAML
64 lines
1.9 KiB
YAML
# RUN: llc -mtriple=i386-linux-gnu -global-isel -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=X32
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--- |
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define i64 @test_add_i64(i64 %a, i64 %b) {
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%r = add i64 %a, %b
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ret i64 %r
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}
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...
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---
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name: test_add_i64
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# X32-LABEL: name: test_add_i64
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alignment: 4
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legalized: true
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regBankSelected: true
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# X32: registers:
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# X32-NEXT: - { id: 0, class: gr32 }
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# X32-NEXT: - { id: 1, class: gr32 }
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# X32-NEXT: - { id: 2, class: gr32 }
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# X32-NEXT: - { id: 3, class: gr32 }
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# X32-NEXT: - { id: 4, class: gpr }
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# X32-NEXT: - { id: 5, class: gr32 }
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# X32-NEXT: - { id: 6, class: gr32 }
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# X32-NEXT: - { id: 7, class: gr32 }
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# X32-NEXT: - { id: 8, class: gr32 }
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# X32-NEXT: - { id: 9, class: gpr }
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registers:
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- { id: 0, class: gpr }
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- { id: 1, class: gpr }
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- { id: 2, class: gpr }
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- { id: 3, class: gpr }
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- { id: 4, class: gpr }
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- { id: 5, class: gpr }
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- { id: 6, class: gpr }
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- { id: 7, class: gpr }
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- { id: 8, class: gpr }
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- { id: 9, class: gpr }
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# X32: %0 = IMPLICIT_DEF
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# X32-NEXT: %1 = IMPLICIT_DEF
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# X32-NEXT: %2 = IMPLICIT_DEF
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# X32-NEXT: %3 = IMPLICIT_DEF
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# X32-NEXT: %5 = ADD32rr %0, %2, implicit-def %eflags
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# X32-NEXT: %6 = COPY %eflags
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# X32-NEXT: %eflags = COPY %6
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# X32-NEXT: %7 = ADC32rr %1, %3, implicit-def %eflags, implicit %eflags
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# X32-NEXT: %8 = COPY %eflags
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# X32-NEXT: %eax = COPY %5
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# X32-NEXT: %edx = COPY %7
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# X32-NEXT: RET 0, implicit %eax, implicit %edx
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body: |
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bb.0 (%ir-block.0):
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%0(s32) = IMPLICIT_DEF
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%1(s32) = IMPLICIT_DEF
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%2(s32) = IMPLICIT_DEF
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%3(s32) = IMPLICIT_DEF
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%9(s8) = G_CONSTANT i8 0
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%4(s1) = G_TRUNC %9(s8)
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%5(s32), %6(s1) = G_UADDE %0, %2, %4
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%7(s32), %8(s1) = G_UADDE %1, %3, %6
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%eax = COPY %5(s32)
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%edx = COPY %7(s32)
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RET 0, implicit %eax, implicit %edx
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...
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