llvm-project/llvm/test/CodeGen/X86/GlobalISel/select-add-x32.mir

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# RUN: llc -mtriple=i386-linux-gnu -global-isel -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=X32
--- |
define i64 @test_add_i64(i64 %a, i64 %b) {
%r = add i64 %a, %b
ret i64 %r
}
...
---
name: test_add_i64
# X32-LABEL: name: test_add_i64
alignment: 4
legalized: true
regBankSelected: true
# X32: registers:
# X32-NEXT: - { id: 0, class: gr32 }
# X32-NEXT: - { id: 1, class: gr32 }
# X32-NEXT: - { id: 2, class: gr32 }
# X32-NEXT: - { id: 3, class: gr32 }
# X32-NEXT: - { id: 4, class: gpr }
# X32-NEXT: - { id: 5, class: gr32 }
# X32-NEXT: - { id: 6, class: gr32 }
# X32-NEXT: - { id: 7, class: gr32 }
# X32-NEXT: - { id: 8, class: gr32 }
# X32-NEXT: - { id: 9, class: gpr }
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
- { id: 2, class: gpr }
- { id: 3, class: gpr }
- { id: 4, class: gpr }
- { id: 5, class: gpr }
- { id: 6, class: gpr }
- { id: 7, class: gpr }
- { id: 8, class: gpr }
- { id: 9, class: gpr }
# X32: %0 = IMPLICIT_DEF
# X32-NEXT: %1 = IMPLICIT_DEF
# X32-NEXT: %2 = IMPLICIT_DEF
# X32-NEXT: %3 = IMPLICIT_DEF
# X32-NEXT: %5 = ADD32rr %0, %2, implicit-def %eflags
# X32-NEXT: %6 = COPY %eflags
# X32-NEXT: %eflags = COPY %6
# X32-NEXT: %7 = ADC32rr %1, %3, implicit-def %eflags, implicit %eflags
# X32-NEXT: %8 = COPY %eflags
# X32-NEXT: %eax = COPY %5
# X32-NEXT: %edx = COPY %7
# X32-NEXT: RET 0, implicit %eax, implicit %edx
body: |
bb.0 (%ir-block.0):
%0(s32) = IMPLICIT_DEF
%1(s32) = IMPLICIT_DEF
%2(s32) = IMPLICIT_DEF
%3(s32) = IMPLICIT_DEF
%9(s8) = G_CONSTANT i8 0
%4(s1) = G_TRUNC %9(s8)
%5(s32), %6(s1) = G_UADDE %0, %2, %4
%7(s32), %8(s1) = G_UADDE %1, %3, %6
%eax = COPY %5(s32)
%edx = COPY %7(s32)
RET 0, implicit %eax, implicit %edx
...