Andrew Trick 8370c7c38f LSR: fix expansion of scaled reg in non-address type formulae. ... For non-address users, Base and Scaled registers are not specially associated to fit an address mode, so SCEVExpander should apply normal expansion rules. Otherwise we may sink computation into inner loops that have already been optimized. llvm-svn: 158537		2012-06-15 20:07:29 +00:00
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Hello	Since the Hello pass is built as a loadable dynamic library, don't try to convert it to new-style registration yet.	2010-10-07 00:31:16 +00:00
IPO	Some optimizations done by globalopt are safe only for internal linkage, not	2012-06-15 18:00:24 +00:00
InstCombine	InstCombine: fix a bug when combining (fcmp cc0 x, y) && (fcmp cc1 x, y).	2012-06-14 05:57:42 +00:00
Instrumentation	Register the gcov "writeout" at init time. Don't list this as a d'tor. Instead,	2012-06-01 23:14:32 +00:00
Scalar	LSR: fix expansion of scaled reg in non-address type formulae.	2012-06-15 20:07:29 +00:00
Utils	SimplifyCFG: fold unconditional branch to its predecessor if profitable.	2012-06-13 05:43:29 +00:00
Vectorize	Don't vectorize target-specific types (ppc_fp128, x86_fp80, etc.).	2012-04-27 19:34:00 +00:00
CMakeLists.txt	Add a basic-block autovectorization pass.	2012-02-01 03:51:43 +00:00
LLVMBuild.txt	Add a basic-block autovectorization pass.	2012-02-01 03:51:43 +00:00
Makefile	Add a basic-block autovectorization pass.	2012-02-01 03:51:43 +00:00