| .. |
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AsmParser
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AMDGPU: Re-apply r341982 after fixing the layering issue
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2018-09-12 18:50:47 +00:00 |
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Disassembler
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AMDGPU: Separate R600 and GCN TableGen files
|
2018-06-28 23:47:12 +00:00 |
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InstPrinter
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AMDGPU: Re-apply r341982 after fixing the layering issue
|
2018-09-12 18:50:47 +00:00 |
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MCTargetDesc
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[AMDGPU] Defined gfx909 Raven Ridge 2
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2018-10-24 08:14:07 +00:00 |
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TargetInfo
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Remove \brief commands from doxygen comments.
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2018-05-01 15:54:18 +00:00 |
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Utils
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AMDGPU: Rewrite SILowerI1Copies to always stay on SALU
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2018-10-31 13:27:08 +00:00 |
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AMDGPU.h
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[AMDGPU] Add a pass to promote bitcast calls
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2018-10-26 13:18:36 +00:00 |
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AMDGPU.td
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[AMDGPU] Remove FeatureVGPRSpilling
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2018-10-31 18:54:06 +00:00 |
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AMDGPUAliasAnalysis.cpp
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AMDGPU: Remove leftovers from configurable address spaces
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2018-09-11 04:00:49 +00:00 |
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AMDGPUAliasAnalysis.h
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AMDGPU: Remove leftovers from configurable address spaces
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2018-09-11 04:00:49 +00:00 |
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AMDGPUAlwaysInlinePass.cpp
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AMDGPU: Remove remnants of old address space mapping
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2018-08-31 05:49:54 +00:00 |
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AMDGPUAnnotateKernelFeatures.cpp
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AMDGPU: Remove remnants of old address space mapping
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2018-08-31 05:49:54 +00:00 |
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AMDGPUAnnotateUniformValues.cpp
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AMDGPU: Remove remnants of old address space mapping
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2018-08-31 05:49:54 +00:00 |
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AMDGPUArgumentUsageInfo.cpp
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AMDGPU/AMDHSA: Remove GridWorkGroupCountX/Y/Z
|
2018-06-21 18:36:04 +00:00 |
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AMDGPUArgumentUsageInfo.h
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AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
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AMDGPUAsmPrinter.cpp
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[AMDGPU] Remove FeatureVGPRSpilling
|
2018-10-31 18:54:06 +00:00 |
|
AMDGPUAsmPrinter.h
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AMDGPU: Remove remnants of old address space mapping
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2018-08-31 05:49:54 +00:00 |
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AMDGPUAtomicOptimizer.cpp
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[AMDGPU] Add an AMDGPU specific atomic optimizer.
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2018-10-08 15:49:19 +00:00 |
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AMDGPUCallLowering.cpp
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AMDGPU: Remove remnants of old address space mapping
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2018-08-31 05:49:54 +00:00 |
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AMDGPUCallLowering.h
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AMDGPU: Remove remnants of old address space mapping
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2018-08-31 05:49:54 +00:00 |
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AMDGPUCallingConv.td
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AMDGPU: Partially fix handling of packed amdgpu_ps arguments
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2018-08-01 19:57:34 +00:00 |
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AMDGPUCodeGenPrepare.cpp
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[IRBuilder] Fixup CreateIntrinsic to allow specifying Types to Mangle.
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2018-10-08 10:32:33 +00:00 |
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AMDGPUFeatures.td
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AMDGPU: Allow fp32-denormals feature for r600 targets
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2018-08-01 15:04:36 +00:00 |
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AMDGPUFixFunctionBitcasts.cpp
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[AMDGPU] Add a pass to promote bitcast calls
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2018-10-26 13:18:36 +00:00 |
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AMDGPUFrameLowering.cpp
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…
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|
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AMDGPUFrameLowering.h
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Remove \brief commands from doxygen comments.
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2018-05-01 15:54:18 +00:00 |
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AMDGPUGISel.td
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AMDGPU/GlobalISel: Select amdgcn.cvt.pkrtz to 64-bit instructions
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2018-10-08 17:49:29 +00:00 |
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AMDGPUGenRegisterBankInfo.def
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AMDGPU/GlobalISel: Fix crash in regbankselect on non-power-of-2 types
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2018-07-27 06:04:40 +00:00 |
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AMDGPUHSAMetadataStreamer.cpp
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AMDGPU: Don't abort on unknown addrspace argument
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2018-09-10 02:23:30 +00:00 |
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AMDGPUHSAMetadataStreamer.h
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AMDGPU: Remove remnants of old address space mapping
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2018-08-31 05:49:54 +00:00 |
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AMDGPUISelDAGToDAG.cpp
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AMDGPU: Avoid selecting ds_{read,write}2_b32 on SI
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2018-10-17 15:37:48 +00:00 |
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AMDGPUISelLowering.cpp
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AMDGPU: Fix assertion with bitcast from i64 constant to v4i16
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2018-11-02 02:43:55 +00:00 |
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AMDGPUISelLowering.h
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DAG: Change behavior of fminnum/fmaxnum nodes
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2018-10-22 16:27:27 +00:00 |
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AMDGPUInline.cpp
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AMDGPU: Remove remnants of old address space mapping
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2018-08-31 05:49:54 +00:00 |
|
AMDGPUInstrInfo.cpp
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AMDGPU: Refactor Subtarget classes
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2018-07-11 20:59:01 +00:00 |
|
AMDGPUInstrInfo.h
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AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
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AMDGPUInstrInfo.td
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AMDGPU: Remove PHI loop condition optimization
|
2018-10-31 13:26:48 +00:00 |
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AMDGPUInstructionSelector.cpp
|
Revert "AMDGPU/GlobalISel: Implement select for G_INSERT"
|
2018-10-11 23:36:46 +00:00 |
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AMDGPUInstructionSelector.h
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Revert "AMDGPU/GlobalISel: Implement select for G_INSERT"
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2018-10-11 23:36:46 +00:00 |
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AMDGPUInstructions.td
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DAG: Change behavior of fminnum/fmaxnum nodes
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2018-10-22 16:27:27 +00:00 |
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AMDGPUIntrinsicInfo.cpp
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[AMDGPU] Update includes for intrinsic changes :(
|
2018-06-23 03:05:39 +00:00 |
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AMDGPUIntrinsicInfo.h
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[AMDGPU] Update includes for intrinsic changes :(
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2018-06-23 03:05:39 +00:00 |
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AMDGPUIntrinsics.td
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AMDGPU: Separate R600 and GCN TableGen files
|
2018-06-28 23:47:12 +00:00 |
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AMDGPULegalizerInfo.cpp
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AMDGPU/GlobalISel: Add support for G_INTTOPTR
|
2018-10-05 04:34:09 +00:00 |
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AMDGPULegalizerInfo.h
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AMDGPU: Refactor Subtarget classes
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2018-07-11 20:59:01 +00:00 |
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AMDGPULibCalls.cpp
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AMDGPU: Remove remnants of old address space mapping
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2018-08-31 05:49:54 +00:00 |
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AMDGPULibFunc.cpp
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[cxx2a] Fix warning triggered by r343285
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2018-09-29 02:17:12 +00:00 |
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AMDGPULibFunc.h
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AMDGPU: Fix missing C++ mode comment
|
2018-06-20 19:45:40 +00:00 |
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AMDGPULowerIntrinsics.cpp
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AMDGPU: Refactor Subtarget classes
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2018-07-11 20:59:01 +00:00 |
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AMDGPULowerKernelArguments.cpp
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[IRBuilder] Fixup CreateIntrinsic to allow specifying Types to Mangle.
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2018-10-08 10:32:33 +00:00 |
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AMDGPULowerKernelAttributes.cpp
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AMDGPU: Add pass to optimize reqd_work_group_size
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2018-05-18 21:35:00 +00:00 |
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AMDGPUMCInstLower.cpp
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AMDGPU: Fix getInstSizeInBytes
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2018-08-29 07:46:09 +00:00 |
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AMDGPUMachineCFGStructurizer.cpp
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AMDGPU: Refactor Subtarget classes
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2018-07-11 20:59:01 +00:00 |
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AMDGPUMachineFunction.cpp
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Reapply "AMDGPU: Fix handling of alignment padding in DAG argument lowering"
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2018-07-20 09:05:08 +00:00 |
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AMDGPUMachineFunction.h
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Reapply "AMDGPU: Fix handling of alignment padding in DAG argument lowering"
|
2018-07-20 09:05:08 +00:00 |
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AMDGPUMachineModuleInfo.cpp
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Remove \brief commands from doxygen comments.
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2018-05-01 15:54:18 +00:00 |
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AMDGPUMachineModuleInfo.h
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Remove \brief commands from doxygen comments.
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2018-05-01 15:54:18 +00:00 |
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AMDGPUMacroFusion.cpp
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AMDGPU: Remove #include "MCTargetDesc/AMDGPUMCTargetDesc.h" from common headers
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2018-05-22 02:03:23 +00:00 |
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AMDGPUMacroFusion.h
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…
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|
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AMDGPUOpenCLEnqueuedBlockLowering.cpp
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[AMDGPU] Change enqueue kernel handle type
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2018-06-13 17:31:51 +00:00 |
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AMDGPUPTNote.h
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AMDGPU/NFC: Move AMDGPU specific note types to ELF.h
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2017-10-12 18:59:54 +00:00 |
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AMDGPUPerfHintAnalysis.cpp
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AMDGPU: Remove remnants of old address space mapping
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2018-08-31 05:49:54 +00:00 |
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AMDGPUPerfHintAnalysis.h
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Fix -Winconsistent-missing-overrides in AMDGPU code
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2018-05-25 17:46:24 +00:00 |
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AMDGPUPromoteAlloca.cpp
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AMDGPU: Remove remnants of old address space mapping
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2018-08-31 05:49:54 +00:00 |
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AMDGPURegAsmNames.inc.cpp
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…
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|
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AMDGPURegisterBankInfo.cpp
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Fix clang -Wimplicit-fallthrough warnings across llvm, NFC
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2018-11-01 19:54:45 +00:00 |
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AMDGPURegisterBankInfo.h
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AMDGPU/GlobalISel: Define instruction mapping for G_OR
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2018-03-01 21:25:25 +00:00 |
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AMDGPURegisterBanks.td
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AMDGPU/GlobalISel: Define InstrMappings for G_ICMP
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2018-03-01 19:27:10 +00:00 |
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AMDGPURegisterInfo.cpp
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AMDGPU: Remove #include "MCTargetDesc/AMDGPUMCTargetDesc.h" from common headers
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2018-05-22 02:03:23 +00:00 |
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AMDGPURegisterInfo.h
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[TargetRegisterInfo] Remove temporary hook enableMultipleCopyHints()
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2018-10-05 14:23:11 +00:00 |
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AMDGPURegisterInfo.td
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AMDGPU: Separate R600 and GCN TableGen files
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2018-06-28 23:47:12 +00:00 |
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AMDGPURewriteOutArguments.cpp
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Rename DEBUG macro to LLVM_DEBUG.
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2018-05-14 12:53:11 +00:00 |
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AMDGPUSearchableTables.td
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AMDGPU: Remove old-style image intrinsics
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2018-06-21 13:37:45 +00:00 |
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AMDGPUSubtarget.cpp
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[AMDGPU] Remove FeatureVGPRSpilling
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2018-10-31 18:54:06 +00:00 |
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AMDGPUSubtarget.h
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[AMDGPU] Remove FeatureVGPRSpilling
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2018-10-31 18:54:06 +00:00 |
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AMDGPUTargetMachine.cpp
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AMDGPU: Rewrite SILowerI1Copies to always stay on SALU
|
2018-10-31 13:27:08 +00:00 |
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AMDGPUTargetMachine.h
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AMDGPU: Remove remnants of old address space mapping
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2018-08-31 05:49:54 +00:00 |
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AMDGPUTargetObjectFile.cpp
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AMDGPU: Fix set but not used warnings related to AMDGPUAS
|
2017-11-01 19:12:38 +00:00 |
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AMDGPUTargetObjectFile.h
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Remove \brief commands from doxygen comments.
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2018-05-01 15:54:18 +00:00 |
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AMDGPUTargetTransformInfo.cpp
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AMDGPU: Remove remnants of old address space mapping
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2018-08-31 05:49:54 +00:00 |
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AMDGPUTargetTransformInfo.h
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AMDGPU: Remove remnants of old address space mapping
|
2018-08-31 05:49:54 +00:00 |
|
AMDGPUUnifyDivergentExitNodes.cpp
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[NFC] Rename the DivergenceAnalysis to LegacyDivergenceAnalysis
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2018-08-30 14:21:36 +00:00 |
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AMDGPUUnifyMetadata.cpp
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Remove \brief commands from doxygen comments.
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2018-05-01 15:54:18 +00:00 |
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AMDILCFGStructurizer.cpp
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AMDGPU: Separate R600 and GCN TableGen files
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2018-06-28 23:47:12 +00:00 |
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AMDKernelCodeT.h
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Remove @brief commands from doxygen comments, too.
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2018-05-01 16:10:38 +00:00 |
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BUFInstructions.td
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AMDGPU: Remove dead TableGen code
|
2018-10-17 12:14:26 +00:00 |
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CMakeLists.txt
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[AMDGPU] Add a pass to promote bitcast calls
|
2018-10-26 13:18:36 +00:00 |
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CaymanInstructions.td
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[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.
|
2017-12-07 10:40:31 +00:00 |
|
DSInstructions.td
|
AMDGPU: Avoid selecting ds_{read,write}2_b32 on SI
|
2018-10-17 15:37:48 +00:00 |
|
EvergreenInstructions.td
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
FLATInstructions.td
|
AMDGPU: Remove remnants of old address space mapping
|
2018-08-31 05:49:54 +00:00 |
|
GCNHazardRecognizer.cpp
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[AMDGPU] Prevent sequences of non-instructions disrupting GCNHazardRecognizer wait state counting
|
2018-09-10 10:14:48 +00:00 |
|
GCNHazardRecognizer.h
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
GCNILPSched.cpp
|
ScheduleDAG: Cleanup dumping code; NFC
|
2018-09-19 00:23:35 +00:00 |
|
GCNIterativeScheduler.cpp
|
llvm::sort(C.begin(), C.end(), ...) -> llvm::sort(C, ...)
|
2018-09-27 02:13:45 +00:00 |
|
GCNIterativeScheduler.h
|
AMDGPU: Partial ILP scheduler port from SelectionDAG to SchedulingDAG (experimental)
|
2017-11-20 14:35:53 +00:00 |
|
GCNMinRegStrategy.cpp
|
ScheduleDAG: Cleanup dumping code; NFC
|
2018-09-19 00:23:35 +00:00 |
|
GCNProcessors.td
|
[AMDGPU] Defined gfx909 Raven Ridge 2
|
2018-10-24 08:14:07 +00:00 |
|
GCNRegPressure.cpp
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
GCNRegPressure.h
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
GCNSchedStrategy.cpp
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
GCNSchedStrategy.h
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
LLVMBuild.txt
|
…
|
|
|
MIMGInstructions.td
|
[AMDGPU] Add support for a16 modifiear for gfx9
|
2018-08-28 15:07:30 +00:00 |
|
R600.td
|
Reapply "AMDGPU: Fix handling of alignment padding in DAG argument lowering"
|
2018-07-20 09:05:08 +00:00 |
|
R600AsmPrinter.cpp
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
R600AsmPrinter.h
|
AMDGPU: Split R600 AsmPrinter code into its own class
|
2018-05-24 20:02:01 +00:00 |
|
R600ClauseMergePass.cpp
|
AMDGPU: Separate R600 and GCN TableGen files
|
2018-06-28 23:47:12 +00:00 |
|
R600ControlFlowFinalizer.cpp
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
R600Defines.h
|
Remove \brief commands from doxygen comments.
|
2018-05-01 15:54:18 +00:00 |
|
R600EmitClauseMarkers.cpp
|
AMDGPU: Separate R600 and GCN TableGen files
|
2018-06-28 23:47:12 +00:00 |
|
R600ExpandSpecialInstrs.cpp
|
AMDGPU: Separate R600 and GCN TableGen files
|
2018-06-28 23:47:12 +00:00 |
|
R600FrameLowering.cpp
|
…
|
|
|
R600FrameLowering.h
|
…
|
|
|
R600ISelLowering.cpp
|
[SelectionDAG] Add FoldBUILD_VECTOR to simplify new BUILD_VECTOR nodes
|
2018-10-30 10:32:11 +00:00 |
|
R600ISelLowering.h
|
AMDGPU/R600: Convert kernel param loads to use PARAM_I_ADDRESS
|
2018-08-01 18:36:07 +00:00 |
|
R600InstrFormats.td
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
R600InstrInfo.cpp
|
AMDGPU: Remove remnants of old address space mapping
|
2018-08-31 05:49:54 +00:00 |
|
R600InstrInfo.h
|
[PSV] Update API to be able to use TargetCustom without UB.
|
2018-08-20 19:23:45 +00:00 |
|
R600Instructions.td
|
AMDGPU: Remove remnants of old address space mapping
|
2018-08-31 05:49:54 +00:00 |
|
R600MachineFunctionInfo.cpp
|
…
|
|
|
R600MachineFunctionInfo.h
|
…
|
|
|
R600MachineScheduler.cpp
|
Fix clang -Wimplicit-fallthrough warnings across llvm, NFC
|
2018-11-01 19:54:45 +00:00 |
|
R600MachineScheduler.h
|
Remove \brief commands from doxygen comments.
|
2018-05-01 15:54:18 +00:00 |
|
R600OpenCLImageTypeLoweringPass.cpp
|
AMDGPU: Rename OpenCL lowering pass to be R600 specific.
|
2018-05-13 10:04:48 +00:00 |
|
R600OptimizeVectorRegisters.cpp
|
AMDGPU: Separate R600 and GCN TableGen files
|
2018-06-28 23:47:12 +00:00 |
|
R600Packetizer.cpp
|
AMDGPU: Separate R600 and GCN TableGen files
|
2018-06-28 23:47:12 +00:00 |
|
R600Processors.td
|
AMDGPU: Separate R600 and GCN TableGen files
|
2018-06-28 23:47:12 +00:00 |
|
R600RegisterInfo.cpp
|
AMDGPU: Separate R600 and GCN TableGen files
|
2018-06-28 23:47:12 +00:00 |
|
R600RegisterInfo.h
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
R600RegisterInfo.td
|
AMDGPU: Separate R600 and GCN TableGen files
|
2018-06-28 23:47:12 +00:00 |
|
R600Schedule.td
|
…
|
|
|
R700Instructions.td
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
SIAnnotateControlFlow.cpp
|
AMDGPU: Remove PHI loop condition optimization
|
2018-10-31 13:26:48 +00:00 |
|
SIDebuggerInsertNops.cpp
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
SIDefines.h
|
AMDGPU: Turn D16 for MIMG instructions into a regular operand
|
2018-06-21 13:36:01 +00:00 |
|
SIFixSGPRCopies.cpp
|
AMDGPU: Rewrite SILowerI1Copies to always stay on SALU
|
2018-10-31 13:27:08 +00:00 |
|
SIFixVGPRCopies.cpp
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
SIFixWWMLiveness.cpp
|
[AMDGPU] Reworked SIFixWWMLiveness
|
2018-08-02 23:31:32 +00:00 |
|
SIFoldOperands.cpp
|
[AMDGPU] Fold copy (copy vgpr)
|
2018-09-27 18:55:20 +00:00 |
|
SIFormMemoryClauses.cpp
|
llvm::sort(C.begin(), C.end(), ...) -> llvm::sort(C, ...)
|
2018-09-27 02:13:45 +00:00 |
|
SIFrameLowering.cpp
|
AMDGPU: Rename isAmdCodeObjectV2 -> isAmdHsaOrMesa
|
2018-10-04 21:02:16 +00:00 |
|
SIFrameLowering.h
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
SIISelLowering.cpp
|
Fixed inclusion of M_PI fow MinGW-w64
|
2018-11-02 17:25:40 +00:00 |
|
SIISelLowering.h
|
AMDGPU: Remove custom BUILD_VECTOR combine
|
2018-10-30 01:37:59 +00:00 |
|
SIInsertSkips.cpp
|
AMDGPU: Force skip over s_sendmsg and exp instructions
|
2018-07-30 09:23:59 +00:00 |
|
SIInsertWaitcnts.cpp
|
AMDGPU: Re-apply r341982 after fixing the layering issue
|
2018-09-12 18:50:47 +00:00 |
|
SIInstrFormats.td
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
SIInstrInfo.cpp
|
[AMDGPU] Remove FeatureVGPRSpilling
|
2018-10-31 18:54:06 +00:00 |
|
SIInstrInfo.h
|
AMDGPU: Divergence-driven selection of scalar buffer load intrinsics
|
2018-10-17 15:37:30 +00:00 |
|
SIInstrInfo.td
|
[AMDGPU] Legalize VGPR Rsrc operands for MUBUF instructions
|
2018-10-08 18:47:01 +00:00 |
|
SIInstructions.td
|
AMDGPU: Remove PHI loop condition optimization
|
2018-10-31 13:26:48 +00:00 |
|
SIIntrinsics.td
|
…
|
|
|
SILoadStoreOptimizer.cpp
|
[AMDGPU] Fix ds combine with subregs
|
2018-09-25 23:33:18 +00:00 |
|
SILowerControlFlow.cpp
|
AMDGPU: Remove PHI loop condition optimization
|
2018-10-31 13:26:48 +00:00 |
|
SILowerI1Copies.cpp
|
AMDGPU: Rewrite SILowerI1Copies to always stay on SALU
|
2018-10-31 13:27:08 +00:00 |
|
SIMachineFunctionInfo.cpp
|
[AMDGPU] Remove FeatureVGPRSpilling
|
2018-10-31 18:54:06 +00:00 |
|
SIMachineFunctionInfo.h
|
AMDGPU/AMDHSA: Remove GridWorkGroupCountX/Y/Z
|
2018-06-21 18:36:04 +00:00 |
|
SIMachineScheduler.cpp
|
ScheduleDAG: Cleanup dumping code; NFC
|
2018-09-19 00:23:35 +00:00 |
|
SIMachineScheduler.h
|
Remove \brief commands from doxygen comments.
|
2018-05-01 15:54:18 +00:00 |
|
SIMemoryLegalizer.cpp
|
AMDGPU: Re-apply r341982 after fixing the layering issue
|
2018-09-12 18:50:47 +00:00 |
|
SIOptimizeExecMasking.cpp
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
SIOptimizeExecMaskingPreRA.cpp
|
AMDGPU: Don't delete instructions if S_ENDPGM has implicit uses
|
2018-08-28 18:55:55 +00:00 |
|
SIPeepholeSDWA.cpp
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
SIProgramInfo.h
|
[AMDGPU] Refactor HSAMetadataStream::emitKernel (NFC)
|
2018-07-10 17:31:32 +00:00 |
|
SIRegisterInfo.cpp
|
[MI] Change the array of `MachineMemOperand` pointers to be
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2018-08-16 21:30:05 +00:00 |
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SIRegisterInfo.h
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AMDGPU: Refactor Subtarget classes
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2018-07-11 20:59:01 +00:00 |
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SIRegisterInfo.td
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AMDGPU: Make v4i16/v4f16 legal
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2018-06-15 15:15:46 +00:00 |
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SISchedule.td
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[SchedModel] Complete models shouldn't match against itineraries when they don't use them (PR35639)
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2018-04-05 13:11:36 +00:00 |
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SIShrinkInstructions.cpp
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[AMDGPU] Fixed return value causing warning and regression
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2018-10-29 17:53:23 +00:00 |
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SIWholeQuadMode.cpp
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AMDGPU: Refactor Subtarget classes
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2018-07-11 20:59:01 +00:00 |
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SMInstructions.td
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AMDGPU: Consolidate SMRD TableGen patterns
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2018-10-06 03:32:43 +00:00 |
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SOPInstructions.td
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[AMDGPU] Divergence driven instruction selection. Shift operations.
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2018-10-01 11:06:35 +00:00 |
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VIInstrFormats.td
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VIInstructions.td
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VOP1Instructions.td
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AMDGPU: Split HasExt into HasExtDPP/SDWA/SDWA9
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2018-09-27 20:49:00 +00:00 |
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VOP2Instructions.td
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DAG: Change behavior of fminnum/fmaxnum nodes
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2018-10-22 16:27:27 +00:00 |
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VOP3Instructions.td
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DAG: Change behavior of fminnum/fmaxnum nodes
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2018-10-22 16:27:27 +00:00 |
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VOP3PInstructions.td
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[AMDGPU] Handle the idot8 pattern generated by FE.
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2018-11-01 22:48:19 +00:00 |
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VOPCInstructions.td
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AMDGPU: Implement llvm.amdgcn.icmp/fcmp for i16/f16
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2018-08-15 21:25:20 +00:00 |
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VOPInstructions.td
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[AMDGPU] Divergence driven instruction selection. Shift operations.
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2018-10-01 11:06:35 +00:00 |
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