forked from OSchip/llvm-project
72 lines
1.9 KiB
ArmAsm
72 lines
1.9 KiB
ArmAsm
// REQUIRES: arm
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// RUN: llvm-mc -filetype=obj --arm-add-build-attributes -triple=armv7a-none-linux-gnueabi %s -o %t
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// RUN: ld.lld --emit-relocs %t -o %t2
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// RUN: llvm-objdump -s --triple=armv7a-none-linux-gnueabi %t2 | FileCheck %s
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// RUN: llvm-readelf --relocs %t2 | FileCheck -check-prefix=CHECK-RELOCS %s
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/// LLD does not support --emit-relocs for .ARM.exidx sections as the relocations
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/// from synthetic table entries won't be represented. Given the known use cases
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/// of --emit-relocs, relocating kernels, and binary analysis, the former doesn't
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/// use exceptions and the latter can derive the relocations from the table if
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/// they need them.
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.syntax unified
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/// Will produce an ARM.exidx entry with inline unwinding instructions
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.section .text.func1, "ax",%progbits
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.global func1
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func1:
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.fnstart
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bx lr
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.save {r7, lr}
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.setfp r7, sp, #0
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.fnend
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.syntax unified
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.section .text.func2, "ax",%progbits
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/// A function with the same inline unwinding instructions, expect merge.
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.global func2
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func2:
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.fnstart
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bx lr
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.save {r7, lr}
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.setfp r7, sp, #0
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.fnend
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.section .text.25, "ax", %progbits
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.global func25
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func25:
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.fnstart
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bx lr
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.cantunwind
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.fnend
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.section .text.26, "ax", %progbits
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.global func26
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func26:
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.fnstart
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bx lr
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.cantunwind
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.fnend
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.syntax unified
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.section .text.func3, "ax",%progbits
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/// A function with the same inline unwinding instructions, expect merge.
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.global func3
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func3:
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.fnstart
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bx lr
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.save {r7, lr}
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.setfp r7, sp, #0
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.fnend
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.section .text.__aeabi_unwind_cpp_pr0, "ax", %progbits
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.global __aeabi_unwind_cpp_pr0
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__aeabi_unwind_cpp_pr0:
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bx lr
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// CHECK: Contents of section .ARM.exidx:
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// CHECK-NEXT: 100d4 28000100 08849780 28000100 01000000
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// CHECK-NEXT: 100e4 28000100 08849780 24000100 01000000
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// CHECK-NEXT: 100f4 20000100 01000000
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// CHECK-RELOCS-NOT: Relocation section '.rel.ARM.exidx'
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