forked from OSchip/llvm-project
39 lines
1.2 KiB
ArmAsm
39 lines
1.2 KiB
ArmAsm
// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck %s
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// RUN: not llvm-mc -arch=amdgcn -mcpu=SI %s 2>&1 | FileCheck %s
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//===----------------------------------------------------------------------===//
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// Generic checks
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//===----------------------------------------------------------------------===//
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v_mul_i32_i24 v1, v2, 100
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// CHECK: error: invalid operand for instruction
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//===----------------------------------------------------------------------===//
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// _e32 checks
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//===----------------------------------------------------------------------===//
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// Immediate src1
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v_mul_i32_i24_e32 v1, v2, 100
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// CHECK: error: invalid operand for instruction
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// sgpr src1
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v_mul_i32_i24_e32 v1, v2, s3
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// CHECK: error: invalid operand for instruction
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//===----------------------------------------------------------------------===//
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// _e64 checks
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//===----------------------------------------------------------------------===//
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// Immediate src0
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v_mul_i32_i24_e64 v1, 100, v3
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// CHECK: error: invalid operand for instruction
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// Immediate src1
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v_mul_i32_i24_e64 v1, v2, 100
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// CHECK: error: invalid operand for instruction
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v_add_i32_e32 v1, s[0:1], v2, v3
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// CHECK: error: invalid operand for instruction
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// TODO: Constant bus restrictions
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