forked from OSchip/llvm-project
455 lines
14 KiB
LLVM
455 lines
14 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -S | FileCheck %s
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32"
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define i32 @test1(i32 %i) {
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; CHECK-LABEL: @test1(
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; CHECK-NEXT: [[TMP12:%.*]] = call i32 @llvm.bswap.i32(i32 [[I:%.*]])
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; CHECK-NEXT: ret i32 [[TMP12]]
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;
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%tmp1 = lshr i32 %i, 24
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%tmp3 = lshr i32 %i, 8
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%tmp4 = and i32 %tmp3, 65280
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%tmp5 = or i32 %tmp1, %tmp4
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%tmp7 = shl i32 %i, 8
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%tmp8 = and i32 %tmp7, 16711680
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%tmp9 = or i32 %tmp5, %tmp8
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%tmp11 = shl i32 %i, 24
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%tmp12 = or i32 %tmp9, %tmp11
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ret i32 %tmp12
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}
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define i32 @test2(i32 %arg) {
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; CHECK-LABEL: @test2(
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; CHECK-NEXT: [[TMP14:%.*]] = call i32 @llvm.bswap.i32(i32 [[ARG:%.*]])
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; CHECK-NEXT: ret i32 [[TMP14]]
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;
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%tmp2 = shl i32 %arg, 24
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%tmp4 = shl i32 %arg, 8
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%tmp5 = and i32 %tmp4, 16711680
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%tmp6 = or i32 %tmp2, %tmp5
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%tmp8 = lshr i32 %arg, 8
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%tmp9 = and i32 %tmp8, 65280
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%tmp10 = or i32 %tmp6, %tmp9
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%tmp12 = lshr i32 %arg, 24
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%tmp14 = or i32 %tmp10, %tmp12
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ret i32 %tmp14
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}
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define i16 @test3(i16 %s) {
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; CHECK-LABEL: @test3(
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; CHECK-NEXT: [[TMP5:%.*]] = call i16 @llvm.bswap.i16(i16 [[S:%.*]])
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; CHECK-NEXT: ret i16 [[TMP5]]
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;
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%tmp2 = lshr i16 %s, 8
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%tmp4 = shl i16 %s, 8
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%tmp5 = or i16 %tmp2, %tmp4
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ret i16 %tmp5
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}
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define i16 @test4(i16 %s) {
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; CHECK-LABEL: @test4(
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; CHECK-NEXT: [[TMP5:%.*]] = call i16 @llvm.bswap.i16(i16 [[S:%.*]])
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; CHECK-NEXT: ret i16 [[TMP5]]
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;
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%tmp2 = lshr i16 %s, 8
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%tmp4 = shl i16 %s, 8
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%tmp5 = or i16 %tmp4, %tmp2
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ret i16 %tmp5
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}
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define i16 @test5(i16 %a) {
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; CHECK-LABEL: @test5(
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; CHECK-NEXT: [[TMP_UPGRD_3:%.*]] = call i16 @llvm.bswap.i16(i16 [[A:%.*]])
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; CHECK-NEXT: ret i16 [[TMP_UPGRD_3]]
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;
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%tmp = zext i16 %a to i32
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%tmp1 = and i32 %tmp, 65280
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%tmp2 = ashr i32 %tmp1, 8
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%tmp2.upgrd.1 = trunc i32 %tmp2 to i16
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%tmp4 = and i32 %tmp, 255
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%tmp5 = shl i32 %tmp4, 8
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%tmp5.upgrd.2 = trunc i32 %tmp5 to i16
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%tmp.upgrd.3 = or i16 %tmp2.upgrd.1, %tmp5.upgrd.2
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%tmp6 = bitcast i16 %tmp.upgrd.3 to i16
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%tmp6.upgrd.4 = zext i16 %tmp6 to i32
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%retval = trunc i32 %tmp6.upgrd.4 to i16
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ret i16 %retval
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}
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; PR2842
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define i32 @test6(i32 %x) nounwind readnone {
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; CHECK-LABEL: @test6(
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; CHECK-NEXT: [[TMP7:%.*]] = call i32 @llvm.bswap.i32(i32 [[X:%.*]])
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; CHECK-NEXT: ret i32 [[TMP7]]
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;
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%tmp = shl i32 %x, 16
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%x.mask = and i32 %x, 65280
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%tmp1 = lshr i32 %x, 16
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%tmp2 = and i32 %tmp1, 255
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%tmp3 = or i32 %x.mask, %tmp
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%tmp4 = or i32 %tmp3, %tmp2
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%tmp5 = shl i32 %tmp4, 8
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%tmp6 = lshr i32 %x, 24
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%tmp7 = or i32 %tmp5, %tmp6
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ret i32 %tmp7
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}
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declare void @extra_use(i32)
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; swaphalf = (x << 16 | x >> 16)
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; ((swaphalf & 0x00ff00ff) << 8) | ((swaphalf >> 8) & 0x00ff00ff)
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define i32 @bswap32_and_first(i32 %x) {
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; CHECK-LABEL: @bswap32_and_first(
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; CHECK-NEXT: [[BSWAP:%.*]] = call i32 @llvm.bswap.i32(i32 [[X:%.*]])
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; CHECK-NEXT: ret i32 [[BSWAP]]
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;
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%shl = shl i32 %x, 16
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%shr = lshr i32 %x, 16
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%swaphalf = or i32 %shl, %shr
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%t = and i32 %swaphalf, 16711935
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%tshl = shl nuw i32 %t, 8
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%b = lshr i32 %swaphalf, 8
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%band = and i32 %b, 16711935
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%bswap = or i32 %tshl, %band
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ret i32 %bswap
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}
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; Extra use should not prevent matching to bswap.
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; swaphalf = (x << 16 | x >> 16)
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; ((swaphalf & 0x00ff00ff) << 8) | ((swaphalf >> 8) & 0x00ff00ff)
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define i32 @bswap32_and_first_extra_use(i32 %x) {
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; CHECK-LABEL: @bswap32_and_first_extra_use(
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; CHECK-NEXT: [[SWAPHALF:%.*]] = call i32 @llvm.fshl.i32(i32 [[X:%.*]], i32 [[X]], i32 16)
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; CHECK-NEXT: [[T:%.*]] = and i32 [[SWAPHALF]], 16711935
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; CHECK-NEXT: [[BSWAP:%.*]] = call i32 @llvm.bswap.i32(i32 [[X]])
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; CHECK-NEXT: call void @extra_use(i32 [[T]])
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; CHECK-NEXT: ret i32 [[BSWAP]]
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;
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%shl = shl i32 %x, 16
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%shr = lshr i32 %x, 16
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%swaphalf = or i32 %shl, %shr
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%t = and i32 %swaphalf, 16711935
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%tshl = shl nuw i32 %t, 8
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%b = lshr i32 %swaphalf, 8
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%band = and i32 %b, 16711935
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%bswap = or i32 %tshl, %band
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call void @extra_use(i32 %t)
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ret i32 %bswap
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}
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; swaphalf = (x << 16 | x >> 16)
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; ((swaphalf << 8) & 0xff00ff00) | ((swaphalf >> 8) & 0x00ff00ff)
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; PR23863
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define i32 @bswap32_shl_first(i32 %x) {
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; CHECK-LABEL: @bswap32_shl_first(
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; CHECK-NEXT: [[BSWAP:%.*]] = call i32 @llvm.bswap.i32(i32 [[X:%.*]])
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; CHECK-NEXT: ret i32 [[BSWAP]]
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;
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%shl = shl i32 %x, 16
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%shr = lshr i32 %x, 16
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%swaphalf = or i32 %shl, %shr
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%t = shl i32 %swaphalf, 8
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%tand = and i32 %t, -16711936
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%b = lshr i32 %swaphalf, 8
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%band = and i32 %b, 16711935
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%bswap = or i32 %tand, %band
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ret i32 %bswap
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}
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; Extra use should not prevent matching to bswap.
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; swaphalf = (x << 16 | x >> 16)
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; ((swaphalf << 8) & 0xff00ff00) | ((swaphalf >> 8) & 0x00ff00ff)
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define i32 @bswap32_shl_first_extra_use(i32 %x) {
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; CHECK-LABEL: @bswap32_shl_first_extra_use(
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; CHECK-NEXT: [[SWAPHALF:%.*]] = call i32 @llvm.fshl.i32(i32 [[X:%.*]], i32 [[X]], i32 16)
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; CHECK-NEXT: [[T:%.*]] = shl i32 [[SWAPHALF]], 8
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; CHECK-NEXT: [[BSWAP:%.*]] = call i32 @llvm.bswap.i32(i32 [[X]])
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; CHECK-NEXT: call void @extra_use(i32 [[T]])
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; CHECK-NEXT: ret i32 [[BSWAP]]
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;
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%shl = shl i32 %x, 16
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%shr = lshr i32 %x, 16
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%swaphalf = or i32 %shl, %shr
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%t = shl i32 %swaphalf, 8
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%tand = and i32 %t, -16711936
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%b = lshr i32 %swaphalf, 8
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%band = and i32 %b, 16711935
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%bswap = or i32 %tand, %band
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call void @extra_use(i32 %t)
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ret i32 %bswap
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}
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define i16 @test8(i16 %a) {
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; CHECK-LABEL: @test8(
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; CHECK-NEXT: [[REV:%.*]] = call i16 @llvm.bswap.i16(i16 [[A:%.*]])
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; CHECK-NEXT: ret i16 [[REV]]
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;
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%conv = zext i16 %a to i32
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%shr = lshr i16 %a, 8
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%shl = shl i32 %conv, 8
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%conv1 = zext i16 %shr to i32
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%or = or i32 %conv1, %shl
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%conv2 = trunc i32 %or to i16
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ret i16 %conv2
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}
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define i16 @test9(i16 %a) {
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; CHECK-LABEL: @test9(
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; CHECK-NEXT: [[REV:%.*]] = call i16 @llvm.bswap.i16(i16 [[A:%.*]])
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; CHECK-NEXT: ret i16 [[REV]]
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;
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%conv = zext i16 %a to i32
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%shr = lshr i32 %conv, 8
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%shl = shl i32 %conv, 8
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%or = or i32 %shr, %shl
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%conv2 = trunc i32 %or to i16
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ret i16 %conv2
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}
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define i16 @test10(i32 %a) {
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; CHECK-LABEL: @test10(
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; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 [[A:%.*]] to i16
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; CHECK-NEXT: [[REV:%.*]] = call i16 @llvm.bswap.i16(i16 [[TRUNC]])
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; CHECK-NEXT: ret i16 [[REV]]
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;
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%shr1 = lshr i32 %a, 8
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%and1 = and i32 %shr1, 255
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%and2 = shl i32 %a, 8
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%shl1 = and i32 %and2, 65280
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%or = or i32 %and1, %shl1
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%conv = trunc i32 %or to i16
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ret i16 %conv
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}
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define i64 @PR39793_bswap_u64_as_u32(i64 %0) {
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; CHECK-LABEL: @PR39793_bswap_u64_as_u32(
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; CHECK-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP0:%.*]], 24
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; CHECK-NEXT: [[TMP3:%.*]] = and i64 [[TMP2]], 255
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; CHECK-NEXT: [[TMP4:%.*]] = lshr i64 [[TMP0]], 8
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; CHECK-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], 65280
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; CHECK-NEXT: [[TMP6:%.*]] = or i64 [[TMP3]], [[TMP5]]
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; CHECK-NEXT: [[TMP7:%.*]] = shl i64 [[TMP0]], 8
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; CHECK-NEXT: [[TMP8:%.*]] = and i64 [[TMP7]], 16711680
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; CHECK-NEXT: [[TMP9:%.*]] = or i64 [[TMP6]], [[TMP8]]
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; CHECK-NEXT: [[TMP10:%.*]] = shl i64 [[TMP0]], 24
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; CHECK-NEXT: [[TMP11:%.*]] = and i64 [[TMP10]], 4278190080
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; CHECK-NEXT: [[TMP12:%.*]] = or i64 [[TMP9]], [[TMP11]]
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; CHECK-NEXT: ret i64 [[TMP12]]
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;
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%2 = lshr i64 %0, 24
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%3 = and i64 %2, 255
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%4 = lshr i64 %0, 8
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%5 = and i64 %4, 65280
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%6 = or i64 %3, %5
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%7 = shl i64 %0, 8
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%8 = and i64 %7, 16711680
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%9 = or i64 %6, %8
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%10 = shl i64 %0, 24
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%11 = and i64 %10, 4278190080
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%12 = or i64 %9, %11
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ret i64 %12
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}
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define i16 @PR39793_bswap_u64_as_u32_trunc(i64 %0) {
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; CHECK-LABEL: @PR39793_bswap_u64_as_u32_trunc(
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; CHECK-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP0:%.*]], 24
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; CHECK-NEXT: [[TMP3:%.*]] = and i64 [[TMP2]], 255
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; CHECK-NEXT: [[TMP4:%.*]] = lshr i64 [[TMP0]], 8
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; CHECK-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], 65280
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; CHECK-NEXT: [[TMP6:%.*]] = or i64 [[TMP3]], [[TMP5]]
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; CHECK-NEXT: [[TMP7:%.*]] = trunc i64 [[TMP6]] to i16
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; CHECK-NEXT: ret i16 [[TMP7]]
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;
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%2 = lshr i64 %0, 24
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%3 = and i64 %2, 255
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%4 = lshr i64 %0, 8
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%5 = and i64 %4, 65280
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%6 = or i64 %3, %5
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%7 = shl i64 %0, 8
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%8 = and i64 %7, 16711680
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%9 = or i64 %6, %8
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%10 = shl i64 %0, 24
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%11 = and i64 %10, 4278190080
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%12 = or i64 %9, %11
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%13 = trunc i64 %12 to i16
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ret i16 %13
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}
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define i64 @PR39793_bswap_u64_as_u16(i64 %0) {
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; CHECK-LABEL: @PR39793_bswap_u64_as_u16(
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; CHECK-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP0:%.*]], 8
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; CHECK-NEXT: [[TMP3:%.*]] = and i64 [[TMP2]], 255
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; CHECK-NEXT: [[TMP4:%.*]] = shl i64 [[TMP0]], 8
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; CHECK-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], 65280
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; CHECK-NEXT: [[TMP6:%.*]] = or i64 [[TMP3]], [[TMP5]]
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; CHECK-NEXT: ret i64 [[TMP6]]
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;
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%2 = lshr i64 %0, 8
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%3 = and i64 %2, 255
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%4 = shl i64 %0, 8
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%5 = and i64 %4, 65280
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%6 = or i64 %3, %5
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ret i64 %6
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}
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define i8 @PR39793_bswap_u64_as_u16_trunc(i64 %0) {
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; CHECK-LABEL: @PR39793_bswap_u64_as_u16_trunc(
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; CHECK-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP0:%.*]], 8
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; CHECK-NEXT: [[TMP3:%.*]] = trunc i64 [[TMP2]] to i8
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; CHECK-NEXT: ret i8 [[TMP3]]
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;
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%2 = lshr i64 %0, 8
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%3 = and i64 %2, 255
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%4 = shl i64 %0, 8
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%5 = and i64 %4, 65280
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%6 = or i64 %3, %5
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%7 = trunc i64 %6 to i8
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ret i8 %7
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}
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define i32 @PR39793_bswap_u32_as_u16(i32 %0) {
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; CHECK-LABEL: @PR39793_bswap_u32_as_u16(
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; CHECK-NEXT: [[TMP2:%.*]] = lshr i32 [[TMP0:%.*]], 8
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; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[TMP2]], 255
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; CHECK-NEXT: [[TMP4:%.*]] = shl i32 [[TMP0]], 8
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; CHECK-NEXT: [[TMP5:%.*]] = and i32 [[TMP4]], 65280
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; CHECK-NEXT: [[TMP6:%.*]] = or i32 [[TMP3]], [[TMP5]]
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; CHECK-NEXT: ret i32 [[TMP6]]
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;
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%2 = lshr i32 %0, 8
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%3 = and i32 %2, 255
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%4 = shl i32 %0, 8
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%5 = and i32 %4, 65280
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%6 = or i32 %3, %5
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ret i32 %6
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}
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define i8 @PR39793_bswap_u32_as_u16_trunc(i32 %0) {
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; CHECK-LABEL: @PR39793_bswap_u32_as_u16_trunc(
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; CHECK-NEXT: [[TMP2:%.*]] = lshr i32 [[TMP0:%.*]], 8
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; CHECK-NEXT: [[TMP3:%.*]] = trunc i32 [[TMP2]] to i8
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; CHECK-NEXT: ret i8 [[TMP3]]
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;
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%2 = lshr i32 %0, 8
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%3 = and i32 %2, 255
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%4 = shl i32 %0, 8
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%5 = and i32 %4, 65280
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%6 = or i32 %3, %5
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%7 = trunc i32 %6 to i8
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ret i8 %7
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}
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define i32 @shuf_4bytes(<4 x i8> %x) {
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; CHECK-LABEL: @shuf_4bytes(
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; CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i8> [[X:%.*]] to i32
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; CHECK-NEXT: [[CAST:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP1]])
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; CHECK-NEXT: ret i32 [[CAST]]
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;
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%bswap = shufflevector <4 x i8> %x, <4 x i8> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
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%cast = bitcast <4 x i8> %bswap to i32
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ret i32 %cast
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}
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define i32 @shuf_load_4bytes(<4 x i8>* %p) {
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; CHECK-LABEL: @shuf_load_4bytes(
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; CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i8>* [[P:%.*]] to i32*
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; CHECK-NEXT: [[X1:%.*]] = load i32, i32* [[TMP1]], align 4
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; CHECK-NEXT: [[CAST:%.*]] = call i32 @llvm.bswap.i32(i32 [[X1]])
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; CHECK-NEXT: ret i32 [[CAST]]
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;
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%x = load <4 x i8>, <4 x i8>* %p
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%bswap = shufflevector <4 x i8> %x, <4 x i8> undef, <4 x i32> <i32 3, i32 2, i32 undef, i32 0>
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%cast = bitcast <4 x i8> %bswap to i32
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ret i32 %cast
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}
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define i32 @shuf_bitcast_twice_4bytes(i32 %x) {
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; CHECK-LABEL: @shuf_bitcast_twice_4bytes(
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; CHECK-NEXT: [[CAST2:%.*]] = call i32 @llvm.bswap.i32(i32 [[X:%.*]])
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; CHECK-NEXT: ret i32 [[CAST2]]
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;
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%cast1 = bitcast i32 %x to <4 x i8>
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%bswap = shufflevector <4 x i8> %cast1, <4 x i8> undef, <4 x i32> <i32 undef, i32 2, i32 1, i32 0>
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%cast2 = bitcast <4 x i8> %bswap to i32
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ret i32 %cast2
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}
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|
|
; Negative test - extra use
|
|
declare void @use(<4 x i8>)
|
|
|
|
define i32 @shuf_4bytes_extra_use(<4 x i8> %x) {
|
|
; CHECK-LABEL: @shuf_4bytes_extra_use(
|
|
; CHECK-NEXT: [[BSWAP:%.*]] = shufflevector <4 x i8> [[X:%.*]], <4 x i8> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
|
|
; CHECK-NEXT: call void @use(<4 x i8> [[BSWAP]])
|
|
; CHECK-NEXT: [[CAST:%.*]] = bitcast <4 x i8> [[BSWAP]] to i32
|
|
; CHECK-NEXT: ret i32 [[CAST]]
|
|
;
|
|
%bswap = shufflevector <4 x i8> %x, <4 x i8> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
|
|
call void @use(<4 x i8> %bswap)
|
|
%cast = bitcast <4 x i8> %bswap to i32
|
|
ret i32 %cast
|
|
}
|
|
|
|
; Negative test - scalar type is not in the data layout
|
|
|
|
define i128 @shuf_16bytes(<16 x i8> %x) {
|
|
; CHECK-LABEL: @shuf_16bytes(
|
|
; CHECK-NEXT: [[BSWAP:%.*]] = shufflevector <16 x i8> [[X:%.*]], <16 x i8> undef, <16 x i32> <i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>
|
|
; CHECK-NEXT: [[CAST:%.*]] = bitcast <16 x i8> [[BSWAP]] to i128
|
|
; CHECK-NEXT: ret i128 [[CAST]]
|
|
;
|
|
%bswap = shufflevector <16 x i8> %x, <16 x i8> undef, <16 x i32> <i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>
|
|
%cast = bitcast <16 x i8> %bswap to i128
|
|
ret i128 %cast
|
|
}
|
|
|
|
; Negative test - don't touch widening shuffles (for now)
|
|
|
|
define i32 @shuf_2bytes_widening(<2 x i8> %x) {
|
|
; CHECK-LABEL: @shuf_2bytes_widening(
|
|
; CHECK-NEXT: [[BSWAP:%.*]] = shufflevector <2 x i8> [[X:%.*]], <2 x i8> undef, <4 x i32> <i32 1, i32 0, i32 undef, i32 undef>
|
|
; CHECK-NEXT: [[CAST:%.*]] = bitcast <4 x i8> [[BSWAP]] to i32
|
|
; CHECK-NEXT: ret i32 [[CAST]]
|
|
;
|
|
%bswap = shufflevector <2 x i8> %x, <2 x i8> undef, <4 x i32> <i32 1, i32 0, i32 undef, i32 undef>
|
|
%cast = bitcast <4 x i8> %bswap to i32
|
|
ret i32 %cast
|
|
}
|
|
|
|
declare i32 @llvm.fshl.i32(i32, i32, i32)
|
|
declare i32 @llvm.fshr.i32(i32, i32, i32)
|
|
|
|
define i32 @funnel_unary(i32 %abcd) {
|
|
; CHECK-LABEL: @funnel_unary(
|
|
; CHECK-NEXT: [[DCBA:%.*]] = call i32 @llvm.bswap.i32(i32 [[ABCD:%.*]])
|
|
; CHECK-NEXT: ret i32 [[DCBA]]
|
|
;
|
|
%dabc = call i32 @llvm.fshl.i32(i32 %abcd, i32 %abcd, i32 24)
|
|
%bcda = call i32 @llvm.fshr.i32(i32 %abcd, i32 %abcd, i32 24)
|
|
%dzbz = and i32 %dabc, -16711936
|
|
%zcza = and i32 %bcda, 16711935
|
|
%dcba = or i32 %dzbz, %zcza
|
|
ret i32 %dcba
|
|
}
|
|
|
|
define i32 @funnel_binary(i32 %abcd) {
|
|
; CHECK-LABEL: @funnel_binary(
|
|
; CHECK-NEXT: [[DCBA:%.*]] = call i32 @llvm.bswap.i32(i32 [[ABCD:%.*]])
|
|
; CHECK-NEXT: ret i32 [[DCBA]]
|
|
;
|
|
%cdzz = shl i32 %abcd, 16
|
|
%dcdz = call i32 @llvm.fshl.i32(i32 %abcd, i32 %cdzz, i32 24)
|
|
%zzab = lshr i32 %abcd, 16
|
|
%zaba = call i32 @llvm.fshr.i32(i32 %zzab, i32 %abcd, i32 24)
|
|
%dczz = and i32 %dcdz, -65536
|
|
%zzba = and i32 %zaba, 65535
|
|
%dcba = or i32 %dczz, %zzba
|
|
ret i32 %dcba
|
|
}
|