forked from OSchip/llvm-project
122 lines
2.6 KiB
LLVM
122 lines
2.6 KiB
LLVM
; Test SELR and SELGR.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z15 -verify-machineinstrs | FileCheck %s
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; Test SELR.
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define i32 @f1(i32 %limit, i32 %a, i32 %b) {
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; CHECK-LABEL: f1:
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; CHECK: clfi %r2, 42
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; CHECK: selrl %r2, %r3, %r4
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; CHECK: br %r14
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%cond = icmp ult i32 %limit, 42
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%res = select i1 %cond, i32 %a, i32 %b
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ret i32 %res
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}
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; Test SELGR.
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define i64 @f2(i64 %limit, i64 %a, i64 %b) {
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; CHECK-LABEL: f2:
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; CHECK: clgfi %r2, 42
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; CHECK: selgrl %r2, %r3, %r4
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; CHECK: br %r14
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%cond = icmp ult i64 %limit, 42
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%res = select i1 %cond, i64 %a, i64 %b
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ret i64 %res
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}
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; Test SELR in a case that could use COMPARE AND BRANCH. We prefer using
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; SELR if possible.
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define i32 @f3(i32 %limit, i32 %a, i32 %b) {
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; CHECK-LABEL: f3:
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; CHECK: chi %r2, 42
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; CHECK: selre %r2, %r3, %r4
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; CHECK: br %r14
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%cond = icmp eq i32 %limit, 42
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%res = select i1 %cond, i32 %a, i32 %b
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ret i32 %res
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}
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; ...and again for SELGR.
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define i64 @f4(i64 %limit, i64 %a, i64 %b) {
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; CHECK-LABEL: f4:
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; CHECK: cghi %r2, 42
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; CHECK: selgre %r2, %r3, %r4
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; CHECK: br %r14
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%cond = icmp eq i64 %limit, 42
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%res = select i1 %cond, i64 %a, i64 %b
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ret i64 %res
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}
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; Check that we also get SELR as a result of early if-conversion.
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define i32 @f5(i32 %limit, i32 %a, i32 %b) {
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; CHECK-LABEL: f5:
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; CHECK: clfi %r2, 41
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; CHECK: selrh %r2, %r4, %r3
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; CHECK: br %r14
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entry:
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%cond = icmp ult i32 %limit, 42
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br i1 %cond, label %if.then, label %return
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if.then:
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br label %return
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return:
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%res = phi i32 [ %a, %if.then ], [ %b, %entry ]
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ret i32 %res
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}
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; ... and likewise for SELGR.
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define i64 @f6(i64 %limit, i64 %a, i64 %b) {
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; CHECK-LABEL: f6:
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; CHECK: clgfi %r2, 41
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; CHECK: selgrh %r2, %r4, %r3
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; CHECK: br %r14
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entry:
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%cond = icmp ult i64 %limit, 42
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br i1 %cond, label %if.then, label %return
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if.then:
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br label %return
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return:
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%res = phi i64 [ %a, %if.then ], [ %b, %entry ]
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ret i64 %res
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}
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; Check that inverting the condition works as well.
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define i32 @f7(i32 %limit, i32 %a, i32 %b) {
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; CHECK-LABEL: f7:
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; CHECK: clfi %r2, 41
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; CHECK: selrh %r2, %r3, %r4
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; CHECK: br %r14
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entry:
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%cond = icmp ult i32 %limit, 42
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br i1 %cond, label %if.then, label %return
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if.then:
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br label %return
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return:
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%res = phi i32 [ %b, %if.then ], [ %a, %entry ]
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ret i32 %res
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}
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; ... and likewise for SELGR.
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define i64 @f8(i64 %limit, i64 %a, i64 %b) {
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; CHECK-LABEL: f8:
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; CHECK: clgfi %r2, 41
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; CHECK: selgrh %r2, %r3, %r4
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; CHECK: br %r14
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entry:
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%cond = icmp ult i64 %limit, 42
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br i1 %cond, label %if.then, label %return
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if.then:
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br label %return
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return:
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%res = phi i64 [ %b, %if.then ], [ %a, %entry ]
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ret i64 %res
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}
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